xref: /openbmc/qemu/docs/system/arm/mps2.rst (revision ced8bb04)
1*ced8bb04SPeter MaydellArm MPS2 and MPS3 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an500``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``, ``mps3-an524``)
2*ced8bb04SPeter Maydell=========================================================================================================================================
3ba7912a5SPeter Maydell
4ba7912a5SPeter MaydellThese board models all use Arm M-profile CPUs.
5ba7912a5SPeter Maydell
6*ced8bb04SPeter MaydellThe Arm MPS2, MPS2+ and MPS3 dev boards are FPGA based (the 2+ has a
7*ced8bb04SPeter Maydellbigger FPGA but is otherwise the same as the 2; the 3 has a bigger
8*ced8bb04SPeter MaydellFPGA again, can handle 4GB of RAM and has a USB controller and QSPI flash).
9*ced8bb04SPeter Maydell
10*ced8bb04SPeter MaydellSince the CPU itself and most of the devices are in the FPGA, the
11*ced8bb04SPeter Maydelldetails of the board as seen by the guest depend significantly on the
12*ced8bb04SPeter MaydellFPGA image.
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14ba7912a5SPeter MaydellQEMU models the following FPGA images:
15ba7912a5SPeter Maydell
16ba7912a5SPeter Maydell``mps2-an385``
1799dfb04aSPeter Maydell  Cortex-M3 as documented in Arm Application Note AN385
18897d2726SPeter Maydell``mps2-an386``
1999dfb04aSPeter Maydell  Cortex-M4 as documented in Arm Application Note AN386
206d4811c4SPeter Maydell``mps2-an500``
2199dfb04aSPeter Maydell  Cortex-M7 as documented in Arm Application Note AN500
22ba7912a5SPeter Maydell``mps2-an505``
2399dfb04aSPeter Maydell  Cortex-M33 as documented in Arm Application Note AN505
2499dfb04aSPeter Maydell``mps2-an511``
2599dfb04aSPeter Maydell  Cortex-M3 'DesignStart' as documented in Arm Application Note AN511
26ba7912a5SPeter Maydell``mps2-an521``
2799dfb04aSPeter Maydell  Dual Cortex-M33 as documented in Arm Application Note AN521
28*ced8bb04SPeter Maydell``mps3-an524``
29*ced8bb04SPeter Maydell  Dual Cortex-M33 on an MPS3, as documented in Arm Application Note AN524
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31ba7912a5SPeter MaydellDifferences between QEMU and real hardware:
32ba7912a5SPeter Maydell
33897d2726SPeter Maydell- AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to
34ba7912a5SPeter Maydell  block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
35ba7912a5SPeter Maydell  if zbt_boot_ctrl is always zero)
36*ced8bb04SPeter Maydell- AN524 remapping of low memory to either BRAM or to QSPI flash is
37*ced8bb04SPeter Maydell  unimplemented (QEMU always maps this to BRAM, ignoring the
38*ced8bb04SPeter Maydell  SCC CFG_REG0 memory-remap bit)
39ba7912a5SPeter Maydell- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest
40ba7912a5SPeter Maydell  visible difference is that the LAN9118 doesn't support checksum
41ba7912a5SPeter Maydell  offloading
42*ced8bb04SPeter Maydell- QEMU does not model the QSPI flash in MPS3 boards as real QSPI
43*ced8bb04SPeter Maydell  flash, but only as simple ROM, so attempting to rewrite the flash
44*ced8bb04SPeter Maydell  from the guest will fail
45*ced8bb04SPeter Maydell- QEMU does not model the USB controller in MPS3 boards
46