1*ba7912a5SPeter MaydellArm MPS2 boards (``mps2-an385``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``) 2*ba7912a5SPeter Maydell================================================================================ 3*ba7912a5SPeter Maydell 4*ba7912a5SPeter MaydellThese board models all use Arm M-profile CPUs. 5*ba7912a5SPeter Maydell 6*ba7912a5SPeter MaydellThe Arm MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger 7*ba7912a5SPeter MaydellFPGA but is otherwise the same as the 2). Since the CPU itself 8*ba7912a5SPeter Maydelland most of the devices are in the FPGA, the details of the board 9*ba7912a5SPeter Maydellas seen by the guest depend significantly on the FPGA image. 10*ba7912a5SPeter Maydell 11*ba7912a5SPeter MaydellQEMU models the following FPGA images: 12*ba7912a5SPeter Maydell 13*ba7912a5SPeter Maydell``mps2-an385`` 14*ba7912a5SPeter Maydell Cortex-M3 as documented in ARM Application Note AN385 15*ba7912a5SPeter Maydell``mps2-an511`` 16*ba7912a5SPeter Maydell Cortex-M3 'DesignStart' as documented in AN511 17*ba7912a5SPeter Maydell``mps2-an505`` 18*ba7912a5SPeter Maydell Cortex-M33 as documented in ARM Application Note AN505 19*ba7912a5SPeter Maydell``mps2-an521`` 20*ba7912a5SPeter Maydell Dual Cortex-M33 as documented in Application Note AN521 21*ba7912a5SPeter Maydell 22*ba7912a5SPeter MaydellDifferences between QEMU and real hardware: 23*ba7912a5SPeter Maydell 24*ba7912a5SPeter Maydell- AN385 remapping of low 16K of memory to either ZBT SSRAM1 or to 25*ba7912a5SPeter Maydell block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as 26*ba7912a5SPeter Maydell if zbt_boot_ctrl is always zero) 27*ba7912a5SPeter Maydell- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest 28*ba7912a5SPeter Maydell visible difference is that the LAN9118 doesn't support checksum 29*ba7912a5SPeter Maydell offloading 30