1*897d2726SPeter MaydellArm MPS2 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``) 2*897d2726SPeter Maydell================================================================================================ 3ba7912a5SPeter Maydell 4ba7912a5SPeter MaydellThese board models all use Arm M-profile CPUs. 5ba7912a5SPeter Maydell 6ba7912a5SPeter MaydellThe Arm MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger 7ba7912a5SPeter MaydellFPGA but is otherwise the same as the 2). Since the CPU itself 8ba7912a5SPeter Maydelland most of the devices are in the FPGA, the details of the board 9ba7912a5SPeter Maydellas seen by the guest depend significantly on the FPGA image. 10ba7912a5SPeter Maydell 11ba7912a5SPeter MaydellQEMU models the following FPGA images: 12ba7912a5SPeter Maydell 13ba7912a5SPeter Maydell``mps2-an385`` 14ba7912a5SPeter Maydell Cortex-M3 as documented in ARM Application Note AN385 15*897d2726SPeter Maydell``mps2-an386`` 16*897d2726SPeter Maydell Cortex-M4 as documented in ARM Application Note AN386 17ba7912a5SPeter Maydell``mps2-an511`` 18ba7912a5SPeter Maydell Cortex-M3 'DesignStart' as documented in AN511 19ba7912a5SPeter Maydell``mps2-an505`` 20ba7912a5SPeter Maydell Cortex-M33 as documented in ARM Application Note AN505 21ba7912a5SPeter Maydell``mps2-an521`` 22ba7912a5SPeter Maydell Dual Cortex-M33 as documented in Application Note AN521 23ba7912a5SPeter Maydell 24ba7912a5SPeter MaydellDifferences between QEMU and real hardware: 25ba7912a5SPeter Maydell 26*897d2726SPeter Maydell- AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to 27ba7912a5SPeter Maydell block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as 28ba7912a5SPeter Maydell if zbt_boot_ctrl is always zero) 29ba7912a5SPeter Maydell- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest 30ba7912a5SPeter Maydell visible difference is that the LAN9118 doesn't support checksum 31ba7912a5SPeter Maydell offloading 32