1 /* 2 * QEMU RISC-V Disassembler for xventana. 3 * 4 * SPDX-License-Identifier: GPL-2.0-or-later 5 */ 6 7 #include "disas/riscv.h" 8 #include "disas/riscv-xventana.h" 9 10 typedef enum { 11 /* 0 is reserved for rv_op_illegal. */ 12 ventana_op_vt_maskc = 1, 13 ventana_op_vt_maskcn = 2, 14 } rv_ventana_op; 15 16 const rv_opcode_data ventana_opcode_data[] = { 17 { "vt.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 }, 18 { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 19 { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 }, 20 }; 21 22 void decode_xventanacondops(rv_decode *dec, rv_isa isa) 23 { 24 rv_inst inst = dec->inst; 25 rv_opcode op = rv_op_illegal; 26 27 switch (((inst >> 0) & 0b11)) { 28 case 3: 29 switch (((inst >> 2) & 0b11111)) { 30 case 30: 31 switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) { 32 case 6: op = ventana_op_vt_maskc; break; 33 case 7: op = ventana_op_vt_maskcn; break; 34 } 35 break; 36 } 37 break; 38 } 39 40 dec->op = op; 41 } 42