xref: /openbmc/qemu/disas/m68k.c (revision 8692aa29)
1  /* This file is composed of several different files from the upstream
2     sourceware.org CVS.  Original file boundaries marked with **** */
3  
4  #include "qemu/osdep.h"
5  #include <math.h>
6  
7  #include "disas/bfd.h"
8  
9  /* **** floatformat.h from sourceware.org CVS 2005-08-14.  */
10  /* IEEE floating point support declarations, for GDB, the GNU Debugger.
11     Copyright 1991, 1994, 1995, 1997, 2000, 2003 Free Software Foundation, Inc.
12  
13  This file is part of GDB.
14  
15  This program is free software; you can redistribute it and/or modify
16  it under the terms of the GNU General Public License as published by
17  the Free Software Foundation; either version 2 of the License, or
18  (at your option) any later version.
19  
20  This program is distributed in the hope that it will be useful,
21  but WITHOUT ANY WARRANTY; without even the implied warranty of
22  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  GNU General Public License for more details.
24  
25  You should have received a copy of the GNU General Public License
26  along with this program; if not, see <http://www.gnu.org/licenses/>.  */
27  
28  #if !defined (FLOATFORMAT_H)
29  #define FLOATFORMAT_H 1
30  
31  /*#include "ansidecl.h" */
32  
33  /* A floatformat consists of a sign bit, an exponent and a mantissa.  Once the
34     bytes are concatenated according to the byteorder flag, then each of those
35     fields is contiguous.  We number the bits with 0 being the most significant
36     (i.e. BITS_BIG_ENDIAN type numbering), and specify which bits each field
37     contains with the *_start and *_len fields.  */
38  
39  /* What is the order of the bytes. */
40  
41  enum floatformat_byteorders {
42  
43    /* Standard little endian byte order.
44       EX: 1.2345678e10 => 00 00 80 c5 e0 fe 06 42 */
45  
46    floatformat_little,
47  
48    /* Standard big endian byte order.
49       EX: 1.2345678e10 => 42 06 fe e0 c5 80 00 00 */
50  
51    floatformat_big,
52  
53    /* Little endian byte order but big endian word order.
54       EX: 1.2345678e10 => e0 fe 06 42 00 00 80 c5 */
55  
56    floatformat_littlebyte_bigword
57  
58  };
59  
60  enum floatformat_intbit { floatformat_intbit_yes, floatformat_intbit_no };
61  
62  struct floatformat
63  {
64    enum floatformat_byteorders byteorder;
65    unsigned int totalsize;	/* Total size of number in bits */
66  
67    /* Sign bit is always one bit long.  1 means negative, 0 means positive.  */
68    unsigned int sign_start;
69  
70    unsigned int exp_start;
71    unsigned int exp_len;
72    /* Bias added to a "true" exponent to form the biased exponent.  It
73       is intentionally signed as, otherwize, -exp_bias can turn into a
74       very large number (e.g., given the exp_bias of 0x3fff and a 64
75       bit long, the equation (long)(1 - exp_bias) evaluates to
76       4294950914) instead of -16382).  */
77    int exp_bias;
78    /* Exponent value which indicates NaN.  This is the actual value stored in
79       the float, not adjusted by the exp_bias.  This usually consists of all
80       one bits.  */
81    unsigned int exp_nan;
82  
83    unsigned int man_start;
84    unsigned int man_len;
85  
86    /* Is the integer bit explicit or implicit?  */
87    enum floatformat_intbit intbit;
88  
89    /* Internal name for debugging. */
90    const char *name;
91  
92    /* Validator method.  */
93    int (*is_valid) (const struct floatformat *fmt, const char *from);
94  };
95  
96  /* floatformats for IEEE single and double, big and little endian.  */
97  
98  extern const struct floatformat floatformat_ieee_single_big;
99  extern const struct floatformat floatformat_ieee_single_little;
100  extern const struct floatformat floatformat_ieee_double_big;
101  extern const struct floatformat floatformat_ieee_double_little;
102  
103  /* floatformat for ARM IEEE double, little endian bytes and big endian words */
104  
105  extern const struct floatformat floatformat_ieee_double_littlebyte_bigword;
106  
107  /* floatformats for various extendeds.  */
108  
109  extern const struct floatformat floatformat_i387_ext;
110  extern const struct floatformat floatformat_m68881_ext;
111  extern const struct floatformat floatformat_i960_ext;
112  extern const struct floatformat floatformat_m88110_ext;
113  extern const struct floatformat floatformat_m88110_harris_ext;
114  extern const struct floatformat floatformat_arm_ext_big;
115  extern const struct floatformat floatformat_arm_ext_littlebyte_bigword;
116  /* IA-64 Floating Point register spilt into memory.  */
117  extern const struct floatformat floatformat_ia64_spill_big;
118  extern const struct floatformat floatformat_ia64_spill_little;
119  extern const struct floatformat floatformat_ia64_quad_big;
120  extern const struct floatformat floatformat_ia64_quad_little;
121  
122  /* Convert from FMT to a double.
123     FROM is the address of the extended float.
124     Store the double in *TO.  */
125  
126  extern void
127  floatformat_to_double (const struct floatformat *, const char *, double *);
128  
129  /* The converse: convert the double *FROM to FMT
130     and store where TO points.  */
131  
132  extern void
133  floatformat_from_double (const struct floatformat *, const double *, char *);
134  
135  /* Return non-zero iff the data at FROM is a valid number in format FMT.  */
136  
137  extern int
138  floatformat_is_valid (const struct floatformat *fmt, const char *from);
139  
140  #endif	/* defined (FLOATFORMAT_H) */
141  /* **** End of floatformat.h */
142  /* **** m68k-dis.h from sourceware.org CVS 2005-08-14.  */
143  /* Opcode table header for m680[01234]0/m6888[12]/m68851.
144     Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001,
145     2003, 2004 Free Software Foundation, Inc.
146  
147     This file is part of GDB, GAS, and the GNU binutils.
148  
149     GDB, GAS, and the GNU binutils are free software; you can redistribute
150     them and/or modify them under the terms of the GNU General Public
151     License as published by the Free Software Foundation; either version
152     1, or (at your option) any later version.
153  
154     GDB, GAS, and the GNU binutils are distributed in the hope that they
155     will be useful, but WITHOUT ANY WARRANTY; without even the implied
156     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
157     the GNU General Public License for more details.
158  
159     You should have received a copy of the GNU General Public License
160     along with this file; see the file COPYING.  If not,
161     see <http://www.gnu.org/licenses/>.  */
162  
163  /* These are used as bit flags for the arch field in the m68k_opcode
164     structure.  */
165  #define	_m68k_undef  0
166  #define	m68000   0x001
167  #define	m68008   m68000 /* Synonym for -m68000.  otherwise unused.  */
168  #define	m68010   0x002
169  #define	m68020   0x004
170  #define	m68030   0x008
171  #define m68ec030 m68030 /* Similar enough to -m68030 to ignore differences;
172  			   gas will deal with the few differences.  */
173  #define	m68040   0x010
174  /* There is no 68050.  */
175  #define m68060   0x020
176  #define	m68881   0x040
177  #define	m68882   m68881 /* Synonym for -m68881.  otherwise unused.  */
178  #define	m68851   0x080
179  #define cpu32	 0x100		/* e.g., 68332 */
180  
181  #define mcfmac   0x200		/* ColdFire MAC. */
182  #define mcfemac  0x400		/* ColdFire EMAC. */
183  #define cfloat   0x800		/* ColdFire FPU.  */
184  #define mcfhwdiv 0x1000		/* ColdFire hardware divide.  */
185  
186  #define mcfisa_a 0x2000		/* ColdFire ISA_A.  */
187  #define mcfisa_aa 0x4000	/* ColdFire ISA_A+.  */
188  #define mcfisa_b 0x8000		/* ColdFire ISA_B.  */
189  #define mcfusp   0x10000	/* ColdFire USP instructions.  */
190  
191  #define mcf5200  0x20000
192  #define mcf5206e 0x40000
193  #define mcf521x  0x80000
194  #define mcf5249  0x100000
195  #define mcf528x  0x200000
196  #define mcf5307  0x400000
197  #define mcf5407  0x800000
198  #define mcf5470  0x1000000
199  #define mcf5480  0x2000000
200  
201   /* Handy aliases.  */
202  #define	m68040up   (m68040 | m68060)
203  #define	m68030up   (m68030 | m68040up)
204  #define	m68020up   (m68020 | m68030up)
205  #define	m68010up   (m68010 | cpu32 | m68020up)
206  #define	m68000up   (m68000 | m68010up)
207  
208  #define	mfloat  (m68881 | m68882 | m68040 | m68060)
209  #define	mmmu    (m68851 | m68030 | m68040 | m68060)
210  
211  /* The structure used to hold information for an opcode.  */
212  
213  struct m68k_opcode
214  {
215    /* The opcode name.  */
216    const char *name;
217    /* The pseudo-size of the instruction(in bytes).  Used to determine
218       number of bytes necessary to disassemble the instruction.  */
219    unsigned int size;
220    /* The opcode itself.  */
221    unsigned long opcode;
222    /* The mask used by the disassembler.  */
223    unsigned long match;
224    /* The arguments.  */
225    const char *args;
226    /* The architectures which support this opcode.  */
227    unsigned int arch;
228  };
229  
230  /* The structure used to hold information for an opcode alias.  */
231  
232  struct m68k_opcode_alias
233  {
234    /* The alias name.  */
235    const char *alias;
236    /* The instruction for which this is an alias.  */
237    const char *primary;
238  };
239  
240  /* We store four bytes of opcode for all opcodes because that is the
241     most any of them need.  The actual length of an instruction is
242     always at least 2 bytes, and is as much longer as necessary to hold
243     the operands it has.
244  
245     The match field is a mask saying which bits must match particular
246     opcode in order for an instruction to be an instance of that
247     opcode.
248  
249     The args field is a string containing two characters for each
250     operand of the instruction.  The first specifies the kind of
251     operand; the second, the place it is stored.  */
252  
253  /* Kinds of operands:
254     Characters used: AaBbCcDdEeFfGgHIiJkLlMmnOopQqRrSsTtU VvWwXxYyZz01234|*~%;@!&$?/<>#^+-
255  
256     D  data register only.  Stored as 3 bits.
257     A  address register only.  Stored as 3 bits.
258     a  address register indirect only.  Stored as 3 bits.
259     R  either kind of register.  Stored as 4 bits.
260     r  either kind of register indirect only.  Stored as 4 bits.
261        At the moment, used only for cas2 instruction.
262     F  floating point coprocessor register only.   Stored as 3 bits.
263     O  an offset (or width): immediate data 0-31 or data register.
264        Stored as 6 bits in special format for BF... insns.
265     +  autoincrement only.  Stored as 3 bits (number of the address register).
266     -  autodecrement only.  Stored as 3 bits (number of the address register).
267     Q  quick immediate data.  Stored as 3 bits.
268        This matches an immediate operand only when value is in range 1 .. 8.
269     M  moveq immediate data.  Stored as 8 bits.
270        This matches an immediate operand only when value is in range -128..127
271     T  trap vector immediate data.  Stored as 4 bits.
272  
273     k  K-factor for fmove.p instruction.   Stored as a 7-bit constant or
274        a three bit register offset, depending on the field type.
275  
276     #  immediate data.  Stored in special places (b, w or l)
277        which say how many bits to store.
278     ^  immediate data for floating point instructions.   Special places
279        are offset by 2 bytes from '#'...
280     B  pc-relative address, converted to an offset
281        that is treated as immediate data.
282     d  displacement and register.  Stores the register as 3 bits
283        and stores the displacement in the entire second word.
284  
285     C  the CCR.  No need to store it; this is just for filtering validity.
286     S  the SR.  No need to store, just as with CCR.
287     U  the USP.  No need to store, just as with CCR.
288     E  the MAC ACC.  No need to store, just as with CCR.
289     e  the EMAC ACC[0123].
290     G  the MAC/EMAC MACSR.  No need to store, just as with CCR.
291     g  the EMAC ACCEXT{01,23}.
292     H  the MASK.  No need to store, just as with CCR.
293     i  the MAC/EMAC scale factor.
294  
295     I  Coprocessor ID.   Not printed if 1.   The Coprocessor ID is always
296        extracted from the 'd' field of word one, which means that an extended
297        coprocessor opcode can be skipped using the 'i' place, if needed.
298  
299     s  System Control register for the floating point coprocessor.
300  
301     J  Misc register for movec instruction, stored in 'j' format.
302  	Possible values:
303  	0x000	SFC	Source Function Code reg	[60, 40, 30, 20, 10]
304  	0x001	DFC	Data Function Code reg		[60, 40, 30, 20, 10]
305  	0x002   CACR    Cache Control Register          [60, 40, 30, 20, mcf]
306  	0x003	TC	MMU Translation Control		[60, 40]
307  	0x004	ITT0	Instruction Transparent
308  				Translation reg 0	[60, 40]
309  	0x005	ITT1	Instruction Transparent
310  				Translation reg 1	[60, 40]
311  	0x006	DTT0	Data Transparent
312  				Translation reg 0	[60, 40]
313  	0x007	DTT1	Data Transparent
314  				Translation reg 1	[60, 40]
315  	0x008	BUSCR	Bus Control Register		[60]
316  	0x800	USP	User Stack Pointer		[60, 40, 30, 20, 10]
317          0x801   VBR     Vector Base reg                 [60, 40, 30, 20, 10, mcf]
318  	0x802	CAAR	Cache Address Register		[        30, 20]
319  	0x803	MSP	Master Stack Pointer		[    40, 30, 20]
320  	0x804	ISP	Interrupt Stack Pointer		[    40, 30, 20]
321  	0x805	MMUSR	MMU Status reg			[    40]
322  	0x806	URP	User Root Pointer		[60, 40]
323  	0x807	SRP	Supervisor Root Pointer		[60, 40]
324  	0x808	PCR	Processor Configuration reg	[60]
325  	0xC00	ROMBAR	ROM Base Address Register	[520X]
326  	0xC04	RAMBAR0	RAM Base Address Register 0	[520X]
327  	0xC05	RAMBAR1	RAM Base Address Register 0	[520X]
328  	0xC0F	MBAR0	RAM Base Address Register 0	[520X]
329          0xC04   FLASHBAR FLASH Base Address Register    [mcf528x]
330          0xC05   RAMBAR  Static RAM Base Address Register [mcf528x]
331  
332      L  Register list of the type d0-d7/a0-a7 etc.
333         (New!  Improved!  Can also hold fp0-fp7, as well!)
334         The assembler tries to see if the registers match the insn by
335         looking at where the insn wants them stored.
336  
337      l  Register list like L, but with all the bits reversed.
338         Used for going the other way. . .
339  
340      c  cache identifier which may be "nc" for no cache, "ic"
341         for instruction cache, "dc" for data cache, or "bc"
342         for both caches.  Used in cinv and cpush.  Always
343         stored in position "d".
344  
345      u  Any register, with ``upper'' or ``lower'' specification.  Used
346         in the mac instructions with size word.
347  
348   The remainder are all stored as 6 bits using an address mode and a
349   register number; they differ in which addressing modes they match.
350  
351     *  all					(modes 0-6,7.0-4)
352     ~  alterable memory				(modes 2-6,7.0,7.1)
353     						(not 0,1,7.2-4)
354     %  alterable					(modes 0-6,7.0,7.1)
355  						(not 7.2-4)
356     ;  data					(modes 0,2-6,7.0-4)
357  						(not 1)
358     @  data, but not immediate			(modes 0,2-6,7.0-3)
359  						(not 1,7.4)
360     !  control					(modes 2,5,6,7.0-3)
361  						(not 0,1,3,4,7.4)
362     &  alterable control				(modes 2,5,6,7.0,7.1)
363  						(not 0,1,3,4,7.2-4)
364     $  alterable data				(modes 0,2-6,7.0,7.1)
365  						(not 1,7.2-4)
366     ?  alterable control, or data register	(modes 0,2,5,6,7.0,7.1)
367  						(not 1,3,4,7.2-4)
368     /  control, or data register			(modes 0,2,5,6,7.0-3)
369  						(not 1,3,4,7.4)
370     >  *save operands				(modes 2,4,5,6,7.0,7.1)
371  						(not 0,1,3,7.2-4)
372     <  *restore operands				(modes 2,3,5,6,7.0-3)
373  						(not 0,1,4,7.4)
374  
375     coldfire move operands:
376     m  						(modes 0-4)
377     n						(modes 5,7.2)
378     o						(modes 6,7.0,7.1,7.3,7.4)
379     p						(modes 0-5)
380  
381     coldfire bset/bclr/btst/mulsl/mulul operands:
382     q						(modes 0,2-5)
383     v						(modes 0,2-5,7.0,7.1)
384     b                                            (modes 0,2-5,7.2)
385     w                                            (modes 2-5,7.2)
386     y						(modes 2,5)
387     z						(modes 2,5,7.2)
388     x  mov3q immediate operand.
389     4						(modes 2,3,4,5)
390    */
391  
392  /* For the 68851:  */
393  /* I didn't use much imagination in choosing the
394     following codes, so many of them aren't very
395     mnemonic. -rab
396  
397     0  32 bit pmmu register
398  	Possible values:
399  	000	TC	Translation Control Register (68030, 68851)
400  
401     1  16 bit pmmu register
402  	111	AC	Access Control (68851)
403  
404     2  8 bit pmmu register
405  	100	CAL	Current Access Level (68851)
406  	101	VAL	Validate Access Level (68851)
407  	110	SCC	Stack Change Control (68851)
408  
409     3  68030-only pmmu registers (32 bit)
410  	010	TT0	Transparent Translation reg 0
411  			(aka Access Control reg 0 -- AC0 -- on 68ec030)
412  	011	TT1	Transparent Translation reg 1
413  			(aka Access Control reg 1 -- AC1 -- on 68ec030)
414  
415     W  wide pmmu registers
416  	Possible values:
417  	001	DRP	Dma Root Pointer (68851)
418  	010	SRP	Supervisor Root Pointer (68030, 68851)
419  	011	CRP	Cpu Root Pointer (68030, 68851)
420  
421     f	function code register (68030, 68851)
422  	0	SFC
423  	1	DFC
424  
425     V	VAL register only (68851)
426  
427     X	BADx, BACx (16 bit)
428  	100	BAD	Breakpoint Acknowledge Data (68851)
429  	101	BAC	Breakpoint Acknowledge Control (68851)
430  
431     Y	PSR (68851) (MMUSR on 68030) (ACUSR on 68ec030)
432     Z	PCSR (68851)
433  
434     |	memory 		(modes 2-6, 7.*)
435  
436     t  address test level (68030 only)
437        Stored as 3 bits, range 0-7.
438        Also used for breakpoint instruction now.
439  
440  */
441  
442  /* Places to put an operand, for non-general operands:
443     Characters used: BbCcDdFfGgHhIijkLlMmNnostWw123456789/
444  
445     s  source, low bits of first word.
446     d  dest, shifted 9 in first word
447     1  second word, shifted 12
448     2  second word, shifted 6
449     3  second word, shifted 0
450     4  third word, shifted 12
451     5  third word, shifted 6
452     6  third word, shifted 0
453     7  second word, shifted 7
454     8  second word, shifted 10
455     9  second word, shifted 5
456     D  store in both place 1 and place 3; for divul and divsl.
457     B  first word, low byte, for branch displacements
458     W  second word (entire), for branch displacements
459     L  second and third words (entire), for branch displacements
460        (also overloaded for move16)
461     b  second word, low byte
462     w  second word (entire) [variable word/long branch offset for dbra]
463     W  second word (entire) (must be signed 16 bit value)
464     l  second and third word (entire)
465     g  variable branch offset for bra and similar instructions.
466        The place to store depends on the magnitude of offset.
467     t  store in both place 7 and place 8; for floating point operations
468     c  branch offset for cpBcc operations.
469        The place to store is word two if bit six of word one is zero,
470        and words two and three if bit six of word one is one.
471     i  Increment by two, to skip over coprocessor extended operands.   Only
472        works with the 'I' format.
473     k  Dynamic K-factor field.   Bits 6-4 of word 2, used as a register number.
474        Also used for dynamic fmovem instruction.
475     C  floating point coprocessor constant - 7 bits.  Also used for static
476        K-factors...
477     j  Movec register #, stored in 12 low bits of second word.
478     m  For M[S]ACx; 4 bits split with MSB shifted 6 bits in first word
479        and remaining 3 bits of register shifted 9 bits in first word.
480        Indicate upper/lower in 1 bit shifted 7 bits in second word.
481        Use with `R' or `u' format.
482     n  `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split
483        with MSB shifted 6 bits in first word and remaining 3 bits of
484        register shifted 9 bits in first word.  No upper/lower
485        indication is done.)  Use with `R' or `u' format.
486     o  For M[S]ACw; 4 bits shifted 12 in second word (like `1').
487        Indicate upper/lower in 1 bit shifted 7 bits in second word.
488        Use with `R' or `u' format.
489     M  For M[S]ACw; 4 bits in low bits of first word.  Indicate
490        upper/lower in 1 bit shifted 6 bits in second word.  Use with
491        `R' or `u' format.
492     N  For M[S]ACw; 4 bits in low bits of second word.  Indicate
493        upper/lower in 1 bit shifted 6 bits in second word.  Use with
494        `R' or `u' format.
495     h  shift indicator (scale factor), 1 bit shifted 10 in second word
496  
497   Places to put operand, for general operands:
498     d  destination, shifted 6 bits in first word
499     b  source, at low bit of first word, and immediate uses one byte
500     w  source, at low bit of first word, and immediate uses two bytes
501     l  source, at low bit of first word, and immediate uses four bytes
502     s  source, at low bit of first word.
503        Used sometimes in contexts where immediate is not allowed anyway.
504     f  single precision float, low bit of 1st word, immediate uses 4 bytes
505     F  double precision float, low bit of 1st word, immediate uses 8 bytes
506     x  extended precision float, low bit of 1st word, immediate uses 12 bytes
507     p  packed float, low bit of 1st word, immediate uses 12 bytes
508     G  EMAC accumulator, load  (bit 4 2nd word, !bit8 first word)
509     H  EMAC accumulator, non load  (bit 4 2nd word, bit 8 first word)
510     F  EMAC ACCx
511     f  EMAC ACCy
512     I  MAC/EMAC scale factor
513     /  Like 's', but set 2nd word, bit 5 if trailing_ampersand set
514     ]  first word, bit 10
515  */
516  
517  extern const struct m68k_opcode m68k_opcodes[];
518  extern const struct m68k_opcode_alias m68k_opcode_aliases[];
519  
520  extern const int m68k_numopcodes, m68k_numaliases;
521  
522  /* **** End of m68k-opcode.h */
523  /* **** m68k-dis.c from sourceware.org CVS 2005-08-14.  */
524  /* Print Motorola 68k instructions.
525     Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
526     1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
527     Free Software Foundation, Inc.
528  
529     This file is free software; you can redistribute it and/or modify
530     it under the terms of the GNU General Public License as published by
531     the Free Software Foundation; either version 2 of the License, or
532     (at your option) any later version.
533  
534     This program is distributed in the hope that it will be useful,
535     but WITHOUT ANY WARRANTY; without even the implied warranty of
536     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
537     GNU General Public License for more details.
538  
539     You should have received a copy of the GNU General Public License
540     along with this program; if not, see <http://www.gnu.org/licenses/>.  */
541  
542  /* Local function prototypes.  */
543  
544  static const char * const fpcr_names[] =
545  {
546    "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
547    "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
548  };
549  
550  static const char *const reg_names[] =
551  {
552    "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
553    "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
554    "%ps", "%pc"
555  };
556  
557  /* Name of register halves for MAC/EMAC.
558     Separate from reg_names since 'spu', 'fpl' look weird.  */
559  static const char *const reg_half_names[] =
560  {
561    "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
562    "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
563    "%ps", "%pc"
564  };
565  
566  /* Sign-extend an (unsigned char).  */
567  #if __STDC__ == 1
568  #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
569  #else
570  #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
571  #endif
572  
573  /* Get a 1 byte signed integer.  */
574  #define NEXTBYTE(p)  (p += 2, fetch_data(info, p), COERCE_SIGNED_CHAR(p[-1]))
575  
576  /* Get a 2 byte signed integer.  */
577  #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
578  #define NEXTWORD(p)  \
579    (p += 2, fetch_data(info, p), \
580     COERCE16 ((p[-2] << 8) + p[-1]))
581  
582  /* Get a 4 byte signed integer.  */
583  #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
584  #define NEXTLONG(p)  \
585    (p += 4, fetch_data(info, p), \
586     (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
587  
588  /* Get a 4 byte unsigned integer.  */
589  #define NEXTULONG(p)  \
590    (p += 4, fetch_data(info, p), \
591     (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
592  
593  /* Get a single precision float.  */
594  #define NEXTSINGLE(val, p) \
595    (p += 4, fetch_data(info, p), \
596     floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
597  
598  /* Get a double precision float.  */
599  #define NEXTDOUBLE(val, p) \
600    (p += 8, fetch_data(info, p), \
601     floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
602  
603  /* Get an extended precision float.  */
604  #define NEXTEXTEND(val, p) \
605    (p += 12, fetch_data(info, p), \
606     floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
607  
608  /* Need a function to convert from packed to double
609     precision.   Actually, it's easier to print a
610     packed number than a double anyway, so maybe
611     there should be a special case to handle this... */
612  #define NEXTPACKED(p) \
613    (p += 12, fetch_data(info, p), 0.0)
614  
615  /* Maximum length of an instruction.  */
616  #define MAXLEN 22
617  
618  struct private
619  {
620    /* Points to first byte not fetched.  */
621    bfd_byte *max_fetched;
622    bfd_byte the_buffer[MAXLEN];
623    bfd_vma insn_start;
624    sigjmp_buf bailout;
625  };
626  
627  /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
628     to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
629     on error.  */
630  static int
631  fetch_data2(struct disassemble_info *info, bfd_byte *addr)
632  {
633    int status;
634    struct private *priv = (struct private *)info->private_data;
635    bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
636  
637    status = (*info->read_memory_func) (start,
638  				      priv->max_fetched,
639  				      addr - priv->max_fetched,
640  				      info);
641    if (status != 0)
642      {
643        (*info->memory_error_func) (status, start, info);
644        siglongjmp(priv->bailout, 1);
645      }
646    else
647      priv->max_fetched = addr;
648    return 1;
649  }
650  
651  static int
652  fetch_data(struct disassemble_info *info, bfd_byte *addr)
653  {
654      if (addr <= ((struct private *) (info->private_data))->max_fetched) {
655          return 1;
656      } else {
657          return fetch_data2(info, addr);
658      }
659  }
660  
661  /* This function is used to print to the bit-bucket.  */
662  static int
663  dummy_printer (FILE *file ATTRIBUTE_UNUSED,
664  	       const char *format ATTRIBUTE_UNUSED,
665  	       ...)
666  {
667    return 0;
668  }
669  
670  static void
671  dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
672  		     struct disassemble_info *info ATTRIBUTE_UNUSED)
673  {
674  }
675  
676  /* Fetch BITS bits from a position in the instruction specified by CODE.
677     CODE is a "place to put an argument", or 'x' for a destination
678     that is a general address (mode and register).
679     BUFFER contains the instruction.  */
680  
681  static int
682  fetch_arg (unsigned char *buffer,
683  	   int code,
684  	   int bits,
685  	   disassemble_info *info)
686  {
687    int val = 0;
688  
689    switch (code)
690      {
691      case '/': /* MAC/EMAC mask bit.  */
692        val = buffer[3] >> 5;
693        break;
694  
695      case 'G': /* EMAC ACC load.  */
696        val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
697        break;
698  
699      case 'H': /* EMAC ACC !load.  */
700        val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
701        break;
702  
703      case ']': /* EMAC ACCEXT bit.  */
704        val = buffer[0] >> 2;
705        break;
706  
707      case 'I': /* MAC/EMAC scale factor.  */
708        val = buffer[2] >> 1;
709        break;
710  
711      case 'F': /* EMAC ACCx.  */
712        val = buffer[0] >> 1;
713        break;
714  
715      case 'f':
716        val = buffer[1];
717        break;
718  
719      case 's':
720        val = buffer[1];
721        break;
722  
723      case 'd':			/* Destination, for register or quick.  */
724        val = (buffer[0] << 8) + buffer[1];
725        val >>= 9;
726        break;
727  
728      case 'x':			/* Destination, for general arg.  */
729        val = (buffer[0] << 8) + buffer[1];
730        val >>= 6;
731        break;
732  
733      case 'k':
734        fetch_data(info, buffer + 3);
735        val = (buffer[3] >> 4);
736        break;
737  
738      case 'C':
739        fetch_data(info, buffer + 3);
740        val = buffer[3];
741        break;
742  
743      case '1':
744        fetch_data(info, buffer + 3);
745        val = (buffer[2] << 8) + buffer[3];
746        val >>= 12;
747        break;
748  
749      case '2':
750        fetch_data(info, buffer + 3);
751        val = (buffer[2] << 8) + buffer[3];
752        val >>= 6;
753        break;
754  
755      case '3':
756      case 'j':
757        fetch_data(info, buffer + 3);
758        val = (buffer[2] << 8) + buffer[3];
759        break;
760  
761      case '4':
762        fetch_data(info, buffer + 5);
763        val = (buffer[4] << 8) + buffer[5];
764        val >>= 12;
765        break;
766  
767      case '5':
768        fetch_data(info, buffer + 5);
769        val = (buffer[4] << 8) + buffer[5];
770        val >>= 6;
771        break;
772  
773      case '6':
774        fetch_data(info, buffer + 5);
775        val = (buffer[4] << 8) + buffer[5];
776        break;
777  
778      case '7':
779        fetch_data(info, buffer + 3);
780        val = (buffer[2] << 8) + buffer[3];
781        val >>= 7;
782        break;
783  
784      case '8':
785        fetch_data(info, buffer + 3);
786        val = (buffer[2] << 8) + buffer[3];
787        val >>= 10;
788        break;
789  
790      case '9':
791        fetch_data(info, buffer + 3);
792        val = (buffer[2] << 8) + buffer[3];
793        val >>= 5;
794        break;
795  
796      case 'e':
797        val = (buffer[1] >> 6);
798        break;
799  
800      case 'm':
801        val = (buffer[1] & 0x40 ? 0x8 : 0)
802  	| ((buffer[0] >> 1) & 0x7)
803  	| (buffer[3] & 0x80 ? 0x10 : 0);
804        break;
805  
806      case 'n':
807        val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
808        break;
809  
810      case 'o':
811        val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
812        break;
813  
814      case 'M':
815        val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
816        break;
817  
818      case 'N':
819        val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
820        break;
821  
822      case 'h':
823        val = buffer[2] >> 2;
824        break;
825  
826      default:
827        abort ();
828      }
829  
830    switch (bits)
831      {
832      case 1:
833        return val & 1;
834      case 2:
835        return val & 3;
836      case 3:
837        return val & 7;
838      case 4:
839        return val & 017;
840      case 5:
841        return val & 037;
842      case 6:
843        return val & 077;
844      case 7:
845        return val & 0177;
846      case 8:
847        return val & 0377;
848      case 12:
849        return val & 07777;
850      default:
851        abort ();
852      }
853  }
854  
855  /* Check if an EA is valid for a particular code.  This is required
856     for the EMAC instructions since the type of source address determines
857     if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
858     is a non-load EMAC instruction and the bits mean register Ry.
859     A similar case exists for the movem instructions where the register
860     mask is interpreted differently for different EAs.  */
861  
862  static bfd_boolean
863  m68k_valid_ea (char code, int val)
864  {
865    int mode, mask;
866  #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
867    (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
868     | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
869  
870    switch (code)
871      {
872      case '*':
873        mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
874        break;
875      case '~':
876        mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
877        break;
878      case '%':
879        mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
880        break;
881      case ';':
882        mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
883        break;
884      case '@':
885        mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
886        break;
887      case '!':
888        mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
889        break;
890      case '&':
891        mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
892        break;
893      case '$':
894        mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
895        break;
896      case '?':
897        mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
898        break;
899      case '/':
900        mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
901        break;
902      case '|':
903        mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
904        break;
905      case '>':
906        mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
907        break;
908      case '<':
909        mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
910        break;
911      case 'm':
912        mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
913        break;
914      case 'n':
915        mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
916        break;
917      case 'o':
918        mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
919        break;
920      case 'p':
921        mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
922        break;
923      case 'q':
924        mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
925        break;
926      case 'v':
927        mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
928        break;
929      case 'b':
930        mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
931        break;
932      case 'w':
933        mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
934        break;
935      case 'y':
936        mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
937        break;
938      case 'z':
939        mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
940        break;
941      case '4':
942        mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
943        break;
944      default:
945        abort ();
946      }
947  #undef M
948  
949    mode = (val >> 3) & 7;
950    if (mode == 7)
951      mode += val & 7;
952    return (mask & (1 << mode)) != 0;
953  }
954  
955  /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
956     REGNO = -1 for pc, -2 for none (suppressed).  */
957  
958  static void
959  print_base (int regno, bfd_vma disp, disassemble_info *info)
960  {
961    if (regno == -1)
962      {
963        (*info->fprintf_func) (info->stream, "%%pc@(");
964        (*info->print_address_func) (disp, info);
965      }
966    else
967      {
968        char buf[50];
969  
970        if (regno == -2)
971  	(*info->fprintf_func) (info->stream, "@(");
972        else if (regno == -3)
973  	(*info->fprintf_func) (info->stream, "%%zpc@(");
974        else
975  	(*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
976  
977        sprintf_vma (buf, disp);
978        (*info->fprintf_func) (info->stream, "%s", buf);
979      }
980  }
981  
982  /* Print an indexed argument.  The base register is BASEREG (-1 for pc).
983     P points to extension word, in buffer.
984     ADDR is the nominal core address of that extension word.  */
985  
986  static unsigned char *
987  print_indexed (int basereg,
988  	       unsigned char *p,
989  	       bfd_vma addr,
990  	       disassemble_info *info)
991  {
992    int word;
993    static const char *const scales[] = { "", ":2", ":4", ":8" };
994    bfd_vma base_disp;
995    bfd_vma outer_disp;
996    char buf[40];
997    char vmabuf[50];
998  
999    word = NEXTWORD (p);
1000  
1001    /* Generate the text for the index register.
1002       Where this will be output is not yet determined.  */
1003    sprintf (buf, "%s:%c%s",
1004  	   reg_names[(word >> 12) & 0xf],
1005  	   (word & 0x800) ? 'l' : 'w',
1006  	   scales[(word >> 9) & 3]);
1007  
1008    /* Handle the 68000 style of indexing.  */
1009  
1010    if ((word & 0x100) == 0)
1011      {
1012        base_disp = word & 0xff;
1013        if ((base_disp & 0x80) != 0)
1014  	base_disp -= 0x100;
1015        if (basereg == -1)
1016  	base_disp += addr;
1017        print_base (basereg, base_disp, info);
1018        (*info->fprintf_func) (info->stream, ",%s)", buf);
1019        return p;
1020      }
1021  
1022    /* Handle the generalized kind.  */
1023    /* First, compute the displacement to add to the base register.  */
1024    if (word & 0200)
1025      {
1026        if (basereg == -1)
1027  	basereg = -3;
1028        else
1029  	basereg = -2;
1030      }
1031    if (word & 0100)
1032      buf[0] = '\0';
1033    base_disp = 0;
1034    switch ((word >> 4) & 3)
1035      {
1036      case 2:
1037        base_disp = NEXTWORD (p);
1038        break;
1039      case 3:
1040        base_disp = NEXTLONG (p);
1041      }
1042    if (basereg == -1)
1043      base_disp += addr;
1044  
1045    /* Handle single-level case (not indirect).  */
1046    if ((word & 7) == 0)
1047      {
1048        print_base (basereg, base_disp, info);
1049        if (buf[0] != '\0')
1050  	(*info->fprintf_func) (info->stream, ",%s", buf);
1051        (*info->fprintf_func) (info->stream, ")");
1052        return p;
1053      }
1054  
1055    /* Two level.  Compute displacement to add after indirection.  */
1056    outer_disp = 0;
1057    switch (word & 3)
1058      {
1059      case 2:
1060        outer_disp = NEXTWORD (p);
1061        break;
1062      case 3:
1063        outer_disp = NEXTLONG (p);
1064      }
1065  
1066    print_base (basereg, base_disp, info);
1067    if ((word & 4) == 0 && buf[0] != '\0')
1068      {
1069        (*info->fprintf_func) (info->stream, ",%s", buf);
1070        buf[0] = '\0';
1071      }
1072    sprintf_vma (vmabuf, outer_disp);
1073    (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
1074    if (buf[0] != '\0')
1075      (*info->fprintf_func) (info->stream, ",%s", buf);
1076    (*info->fprintf_func) (info->stream, ")");
1077  
1078    return p;
1079  }
1080  
1081  /* Returns number of bytes "eaten" by the operand, or
1082     return -1 if an invalid operand was found, or -2 if
1083     an opcode tabe error was found.
1084     ADDR is the pc for this arg to be relative to.  */
1085  
1086  static int
1087  print_insn_arg (const char *d,
1088  		unsigned char *buffer,
1089  		unsigned char *p0,
1090  		bfd_vma addr,
1091  		disassemble_info *info)
1092  {
1093    int val = 0;
1094    int place = d[1];
1095    unsigned char *p = p0;
1096    int regno;
1097    const char *regname;
1098    unsigned char *p1;
1099    double flval;
1100    int flt_p;
1101    bfd_signed_vma disp;
1102    unsigned int uval;
1103  
1104    switch (*d)
1105      {
1106      case 'c':		/* Cache identifier.  */
1107        {
1108          static const char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
1109          val = fetch_arg (buffer, place, 2, info);
1110          (*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
1111          break;
1112        }
1113  
1114      case 'a':		/* Address register indirect only. Cf. case '+'.  */
1115        {
1116          (*info->fprintf_func)
1117  	  (info->stream,
1118  	   "%s@",
1119  	   reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1120          break;
1121        }
1122  
1123      case '_':		/* 32-bit absolute address for move16.  */
1124        {
1125          uval = NEXTULONG (p);
1126  	(*info->print_address_func) (uval, info);
1127          break;
1128        }
1129  
1130      case 'C':
1131        (*info->fprintf_func) (info->stream, "%%ccr");
1132        break;
1133  
1134      case 'S':
1135        (*info->fprintf_func) (info->stream, "%%sr");
1136        break;
1137  
1138      case 'U':
1139        (*info->fprintf_func) (info->stream, "%%usp");
1140        break;
1141  
1142      case 'E':
1143        (*info->fprintf_func) (info->stream, "%%acc");
1144        break;
1145  
1146      case 'G':
1147        (*info->fprintf_func) (info->stream, "%%macsr");
1148        break;
1149  
1150      case 'H':
1151        (*info->fprintf_func) (info->stream, "%%mask");
1152        break;
1153  
1154      case 'J':
1155        {
1156  	/* FIXME: There's a problem here, different m68k processors call the
1157  	   same address different names. This table can't get it right
1158  	   because it doesn't know which processor it's disassembling for.  */
1159  	static const struct { const char *name; int value; } names[]
1160  	  = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
1161  	     {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
1162               {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
1163  	     {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
1164  	     {"%msp", 0x803}, {"%isp", 0x804},
1165  	     {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these.  */
1166  
1167  	     /* Should we be calling this psr like we do in case 'Y'?  */
1168  	     {"%mmusr",0x805},
1169  
1170               {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
1171  
1172  	val = fetch_arg (buffer, place, 12, info);
1173  	for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
1174  	  if (names[regno].value == val)
1175  	    {
1176  	      (*info->fprintf_func) (info->stream, "%s", names[regno].name);
1177  	      break;
1178  	    }
1179  	if (regno < 0)
1180  	  (*info->fprintf_func) (info->stream, "%d", val);
1181        }
1182        break;
1183  
1184      case 'Q':
1185        val = fetch_arg (buffer, place, 3, info);
1186        /* 0 means 8, except for the bkpt instruction... */
1187        if (val == 0 && d[1] != 's')
1188  	val = 8;
1189        (*info->fprintf_func) (info->stream, "#%d", val);
1190        break;
1191  
1192      case 'x':
1193        val = fetch_arg (buffer, place, 3, info);
1194        /* 0 means -1.  */
1195        if (val == 0)
1196  	val = -1;
1197        (*info->fprintf_func) (info->stream, "#%d", val);
1198        break;
1199  
1200      case 'M':
1201        if (place == 'h')
1202  	{
1203  	  static const char *const scalefactor_name[] = { "<<", ">>" };
1204  	  val = fetch_arg (buffer, place, 1, info);
1205  	  (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
1206  	}
1207        else
1208  	{
1209  	  val = fetch_arg (buffer, place, 8, info);
1210  	  if (val & 0x80)
1211  	    val = val - 0x100;
1212  	  (*info->fprintf_func) (info->stream, "#%d", val);
1213  	}
1214        break;
1215  
1216      case 'T':
1217        val = fetch_arg (buffer, place, 4, info);
1218        (*info->fprintf_func) (info->stream, "#%d", val);
1219        break;
1220  
1221      case 'D':
1222        (*info->fprintf_func) (info->stream, "%s",
1223  			     reg_names[fetch_arg (buffer, place, 3, info)]);
1224        break;
1225  
1226      case 'A':
1227        (*info->fprintf_func)
1228  	(info->stream, "%s",
1229  	 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
1230        break;
1231  
1232      case 'R':
1233        (*info->fprintf_func)
1234  	(info->stream, "%s",
1235  	 reg_names[fetch_arg (buffer, place, 4, info)]);
1236        break;
1237  
1238      case 'r':
1239        regno = fetch_arg (buffer, place, 4, info);
1240        if (regno > 7)
1241  	(*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
1242        else
1243  	(*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
1244        break;
1245  
1246      case 'F':
1247        (*info->fprintf_func)
1248  	(info->stream, "%%fp%d",
1249  	 fetch_arg (buffer, place, 3, info));
1250        break;
1251  
1252      case 'O':
1253        val = fetch_arg (buffer, place, 6, info);
1254        if (val & 0x20)
1255  	(*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
1256        else
1257  	(*info->fprintf_func) (info->stream, "%d", val);
1258        break;
1259  
1260      case '+':
1261        (*info->fprintf_func)
1262  	(info->stream, "%s@+",
1263  	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1264        break;
1265  
1266      case '-':
1267        (*info->fprintf_func)
1268  	(info->stream, "%s@-",
1269  	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1270        break;
1271  
1272      case 'k':
1273        if (place == 'k')
1274  	(*info->fprintf_func)
1275  	  (info->stream, "{%s}",
1276  	   reg_names[fetch_arg (buffer, place, 3, info)]);
1277        else if (place == 'C')
1278  	{
1279  	  val = fetch_arg (buffer, place, 7, info);
1280  	  if (val > 63)		/* This is a signed constant.  */
1281  	    val -= 128;
1282  	  (*info->fprintf_func) (info->stream, "{#%d}", val);
1283  	}
1284        else
1285  	return -2;
1286        break;
1287  
1288      case '#':
1289      case '^':
1290        p1 = buffer + (*d == '#' ? 2 : 4);
1291        if (place == 's')
1292  	val = fetch_arg (buffer, place, 4, info);
1293        else if (place == 'C')
1294  	val = fetch_arg (buffer, place, 7, info);
1295        else if (place == '8')
1296  	val = fetch_arg (buffer, place, 3, info);
1297        else if (place == '3')
1298  	val = fetch_arg (buffer, place, 8, info);
1299        else if (place == 'b')
1300  	val = NEXTBYTE (p1);
1301        else if (place == 'w' || place == 'W')
1302  	val = NEXTWORD (p1);
1303        else if (place == 'l')
1304  	val = NEXTLONG (p1);
1305        else
1306  	return -2;
1307        (*info->fprintf_func) (info->stream, "#%d", val);
1308        break;
1309  
1310      case 'B':
1311        if (place == 'b')
1312  	disp = NEXTBYTE (p);
1313        else if (place == 'B')
1314  	disp = COERCE_SIGNED_CHAR (buffer[1]);
1315        else if (place == 'w' || place == 'W')
1316  	disp = NEXTWORD (p);
1317        else if (place == 'l' || place == 'L' || place == 'C')
1318  	disp = NEXTLONG (p);
1319        else if (place == 'g')
1320  	{
1321  	  disp = NEXTBYTE (buffer);
1322  	  if (disp == 0)
1323  	    disp = NEXTWORD (p);
1324  	  else if (disp == -1)
1325  	    disp = NEXTLONG (p);
1326  	}
1327        else if (place == 'c')
1328  	{
1329  	  if (buffer[1] & 0x40)		/* If bit six is one, long offset.  */
1330  	    disp = NEXTLONG (p);
1331  	  else
1332  	    disp = NEXTWORD (p);
1333  	}
1334        else
1335  	return -2;
1336  
1337        (*info->print_address_func) (addr + disp, info);
1338        break;
1339  
1340      case 'd':
1341        val = NEXTWORD (p);
1342        (*info->fprintf_func)
1343  	(info->stream, "%s@(%d)",
1344  	 reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
1345        break;
1346  
1347      case 's':
1348        (*info->fprintf_func) (info->stream, "%s",
1349  			     fpcr_names[fetch_arg (buffer, place, 3, info)]);
1350        break;
1351  
1352      case 'e':
1353        val = fetch_arg(buffer, place, 2, info);
1354        (*info->fprintf_func) (info->stream, "%%acc%d", val);
1355        break;
1356  
1357      case 'g':
1358        val = fetch_arg(buffer, place, 1, info);
1359        (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
1360        break;
1361  
1362      case 'i':
1363        val = fetch_arg(buffer, place, 2, info);
1364        if (val == 1)
1365  	(*info->fprintf_func) (info->stream, "<<");
1366        else if (val == 3)
1367  	(*info->fprintf_func) (info->stream, ">>");
1368        else
1369  	return -1;
1370        break;
1371  
1372      case 'I':
1373        /* Get coprocessor ID... */
1374        val = fetch_arg (buffer, 'd', 3, info);
1375  
1376        if (val != 1)				/* Unusual coprocessor ID?  */
1377  	(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
1378        break;
1379  
1380      case '4':
1381      case '*':
1382      case '~':
1383      case '%':
1384      case ';':
1385      case '@':
1386      case '!':
1387      case '$':
1388      case '?':
1389      case '/':
1390      case '&':
1391      case '|':
1392      case '<':
1393      case '>':
1394      case 'm':
1395      case 'n':
1396      case 'o':
1397      case 'p':
1398      case 'q':
1399      case 'v':
1400      case 'b':
1401      case 'w':
1402      case 'y':
1403      case 'z':
1404        if (place == 'd')
1405  	{
1406  	  val = fetch_arg (buffer, 'x', 6, info);
1407  	  val = ((val & 7) << 3) + ((val >> 3) & 7);
1408  	}
1409        else
1410  	val = fetch_arg (buffer, 's', 6, info);
1411  
1412        /* If the <ea> is invalid for *d, then reject this match.  */
1413        if (!m68k_valid_ea (*d, val))
1414  	return -1;
1415  
1416        /* Get register number assuming address register.  */
1417        regno = (val & 7) + 8;
1418        regname = reg_names[regno];
1419        switch (val >> 3)
1420  	{
1421  	case 0:
1422  	  (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1423  	  break;
1424  
1425  	case 1:
1426  	  (*info->fprintf_func) (info->stream, "%s", regname);
1427  	  break;
1428  
1429  	case 2:
1430  	  (*info->fprintf_func) (info->stream, "%s@", regname);
1431  	  break;
1432  
1433  	case 3:
1434  	  (*info->fprintf_func) (info->stream, "%s@+", regname);
1435  	  break;
1436  
1437  	case 4:
1438  	  (*info->fprintf_func) (info->stream, "%s@-", regname);
1439  	  break;
1440  
1441  	case 5:
1442  	  val = NEXTWORD (p);
1443  	  (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1444  	  break;
1445  
1446  	case 6:
1447  	  p = print_indexed (regno, p, addr, info);
1448  	  break;
1449  
1450  	case 7:
1451  	  switch (val & 7)
1452  	    {
1453  	    case 0:
1454  	      val = NEXTWORD (p);
1455  	      (*info->print_address_func) (val, info);
1456  	      break;
1457  
1458  	    case 1:
1459  	      uval = NEXTULONG (p);
1460  	      (*info->print_address_func) (uval, info);
1461  	      break;
1462  
1463  	    case 2:
1464  	      val = NEXTWORD (p);
1465  	      (*info->fprintf_func) (info->stream, "%%pc@(");
1466  	      (*info->print_address_func) (addr + val, info);
1467  	      (*info->fprintf_func) (info->stream, ")");
1468  	      break;
1469  
1470  	    case 3:
1471  	      p = print_indexed (-1, p, addr, info);
1472  	      break;
1473  
1474  	    case 4:
1475  	      flt_p = 1;	/* Assume it's a float... */
1476  	      switch (place)
1477  	      {
1478  		case 'b':
1479  		  val = NEXTBYTE (p);
1480  		  flt_p = 0;
1481  		  break;
1482  
1483  		case 'w':
1484  		  val = NEXTWORD (p);
1485  		  flt_p = 0;
1486  		  break;
1487  
1488  		case 'l':
1489  		  val = NEXTLONG (p);
1490  		  flt_p = 0;
1491  		  break;
1492  
1493  		case 'f':
1494  		  NEXTSINGLE (flval, p);
1495  		  break;
1496  
1497  		case 'F':
1498  		  NEXTDOUBLE (flval, p);
1499  		  break;
1500  
1501  		case 'x':
1502  		  NEXTEXTEND (flval, p);
1503  		  break;
1504  
1505  		case 'p':
1506  		  flval = NEXTPACKED (p);
1507  		  break;
1508  
1509  		default:
1510  		  return -1;
1511  	      }
1512  	      if (flt_p)	/* Print a float? */
1513  		(*info->fprintf_func) (info->stream, "#%g", flval);
1514  	      else
1515  		(*info->fprintf_func) (info->stream, "#%d", val);
1516  	      break;
1517  
1518  	    default:
1519  	      return -1;
1520  	    }
1521  	}
1522  
1523        /* If place is '/', then this is the case of the mask bit for
1524  	 mac/emac loads. Now that the arg has been printed, grab the
1525  	 mask bit and if set, add a '&' to the arg.  */
1526        if (place == '/')
1527  	{
1528  	  val = fetch_arg (buffer, place, 1, info);
1529  	  if (val)
1530  	    info->fprintf_func (info->stream, "&");
1531  	}
1532        break;
1533  
1534      case 'L':
1535      case 'l':
1536  	if (place == 'w')
1537  	  {
1538  	    char doneany;
1539  	    p1 = buffer + 2;
1540  	    val = NEXTWORD (p1);
1541  	    /* Move the pointer ahead if this point is farther ahead
1542  	       than the last.  */
1543  	    p = p1 > p ? p1 : p;
1544  	    if (val == 0)
1545  	      {
1546  		(*info->fprintf_func) (info->stream, "#0");
1547  		break;
1548  	      }
1549  	    if (*d == 'l')
1550  	      {
1551  		int newval = 0;
1552  
1553  		for (regno = 0; regno < 16; ++regno)
1554  		  if (val & (0x8000 >> regno))
1555  		    newval |= 1 << regno;
1556  		val = newval;
1557  	      }
1558  	    val &= 0xffff;
1559  	    doneany = 0;
1560  	    for (regno = 0; regno < 16; ++regno)
1561  	      if (val & (1 << regno))
1562  		{
1563  		  int first_regno;
1564  
1565  		  if (doneany)
1566  		    (*info->fprintf_func) (info->stream, "/");
1567  		  doneany = 1;
1568  		  (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1569  		  first_regno = regno;
1570  		  while (val & (1 << (regno + 1)))
1571  		    ++regno;
1572  		  if (regno > first_regno)
1573  		    (*info->fprintf_func) (info->stream, "-%s",
1574  					   reg_names[regno]);
1575  		}
1576  	  }
1577  	else if (place == '3')
1578  	  {
1579  	    /* `fmovem' insn.  */
1580  	    char doneany;
1581  	    val = fetch_arg (buffer, place, 8, info);
1582  	    if (val == 0)
1583  	      {
1584  		(*info->fprintf_func) (info->stream, "#0");
1585  		break;
1586  	      }
1587  	    if (*d == 'l')
1588  	      {
1589  		int newval = 0;
1590  
1591  		for (regno = 0; regno < 8; ++regno)
1592  		  if (val & (0x80 >> regno))
1593  		    newval |= 1 << regno;
1594  		val = newval;
1595  	      }
1596  	    val &= 0xff;
1597  	    doneany = 0;
1598  	    for (regno = 0; regno < 8; ++regno)
1599  	      if (val & (1 << regno))
1600  		{
1601  		  int first_regno;
1602  		  if (doneany)
1603  		    (*info->fprintf_func) (info->stream, "/");
1604  		  doneany = 1;
1605  		  (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1606  		  first_regno = regno;
1607  		  while (val & (1 << (regno + 1)))
1608  		    ++regno;
1609  		  if (regno > first_regno)
1610  		    (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1611  		}
1612  	  }
1613  	else if (place == '8')
1614  	  {
1615  	    /* fmoveml for FP status registers.  */
1616  	    (*info->fprintf_func) (info->stream, "%s",
1617  				   fpcr_names[fetch_arg (buffer, place, 3,
1618  							 info)]);
1619  	  }
1620  	else
1621  	  return -2;
1622        break;
1623  
1624      case 'X':
1625        place = '8';
1626      case 'Y':
1627      case 'Z':
1628      case 'W':
1629      case '0':
1630      case '1':
1631      case '2':
1632      case '3':
1633        {
1634  	int val = fetch_arg (buffer, place, 5, info);
1635          const char *name = 0;
1636  
1637  	switch (val)
1638  	  {
1639  	  case 2: name = "%tt0"; break;
1640  	  case 3: name = "%tt1"; break;
1641  	  case 0x10: name = "%tc"; break;
1642  	  case 0x11: name = "%drp"; break;
1643  	  case 0x12: name = "%srp"; break;
1644  	  case 0x13: name = "%crp"; break;
1645  	  case 0x14: name = "%cal"; break;
1646  	  case 0x15: name = "%val"; break;
1647  	  case 0x16: name = "%scc"; break;
1648  	  case 0x17: name = "%ac"; break;
1649   	  case 0x18: name = "%psr"; break;
1650  	  case 0x19: name = "%pcsr"; break;
1651  	  case 0x1c:
1652  	  case 0x1d:
1653  	    {
1654  	      int break_reg = ((buffer[3] >> 2) & 7);
1655  
1656  	      (*info->fprintf_func)
1657  		(info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1658  		 break_reg);
1659  	    }
1660  	    break;
1661  	  default:
1662  	    (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1663  	  }
1664  	if (name)
1665  	  (*info->fprintf_func) (info->stream, "%s", name);
1666        }
1667        break;
1668  
1669      case 'f':
1670        {
1671  	int fc = fetch_arg (buffer, place, 5, info);
1672  
1673  	if (fc == 1)
1674  	  (*info->fprintf_func) (info->stream, "%%dfc");
1675  	else if (fc == 0)
1676  	  (*info->fprintf_func) (info->stream, "%%sfc");
1677  	else
1678  	  /* xgettext:c-format */
1679  	  (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1680        }
1681        break;
1682  
1683      case 'V':
1684        (*info->fprintf_func) (info->stream, "%%val");
1685        break;
1686  
1687      case 't':
1688        {
1689  	int level = fetch_arg (buffer, place, 3, info);
1690  
1691  	(*info->fprintf_func) (info->stream, "%d", level);
1692        }
1693        break;
1694  
1695      case 'u':
1696        {
1697  	short is_upper = 0;
1698  	int reg = fetch_arg (buffer, place, 5, info);
1699  
1700  	if (reg & 0x10)
1701  	  {
1702  	    is_upper = 1;
1703  	    reg &= 0xf;
1704  	  }
1705  	(*info->fprintf_func) (info->stream, "%s%s",
1706  			       reg_half_names[reg],
1707  			       is_upper ? "u" : "l");
1708        }
1709        break;
1710  
1711      default:
1712        return -2;
1713      }
1714  
1715    return p - p0;
1716  }
1717  
1718  /* Try to match the current instruction to best and if so, return the
1719     number of bytes consumed from the instruction stream, else zero.  */
1720  
1721  static int
1722  match_insn_m68k (bfd_vma memaddr,
1723  		 disassemble_info * info,
1724  		 const struct m68k_opcode * best,
1725  		 struct private * priv)
1726  {
1727    unsigned char *save_p;
1728    unsigned char *p;
1729    const char *d;
1730  
1731    bfd_byte *buffer = priv->the_buffer;
1732    fprintf_function save_printer = info->fprintf_func;
1733    void (* save_print_address) (bfd_vma, struct disassemble_info *)
1734      = info->print_address_func;
1735  
1736    /* Point at first word of argument data,
1737       and at descriptor for first argument.  */
1738    p = buffer + 2;
1739  
1740    /* Figure out how long the fixed-size portion of the instruction is.
1741       The only place this is stored in the opcode table is
1742       in the arguments--look for arguments which specify fields in the 2nd
1743       or 3rd words of the instruction.  */
1744    for (d = best->args; *d; d += 2)
1745      {
1746        /* I don't think it is necessary to be checking d[0] here;
1747  	 I suspect all this could be moved to the case statement below.  */
1748        if (d[0] == '#')
1749  	{
1750  	  if (d[1] == 'l' && p - buffer < 6)
1751  	    p = buffer + 6;
1752  	  else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1753  	    p = buffer + 4;
1754  	}
1755  
1756        if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1757  	p = buffer + 4;
1758  
1759        switch (d[1])
1760  	{
1761  	case '1':
1762  	case '2':
1763  	case '3':
1764  	case '7':
1765  	case '8':
1766  	case '9':
1767  	case 'i':
1768  	  if (p - buffer < 4)
1769  	    p = buffer + 4;
1770  	  break;
1771  	case '4':
1772  	case '5':
1773  	case '6':
1774  	  if (p - buffer < 6)
1775  	    p = buffer + 6;
1776  	  break;
1777  	default:
1778  	  break;
1779  	}
1780      }
1781  
1782    /* pflusha is an exceptions.  It takes no arguments but is two words
1783       long.  Recognize it by looking at the lower 16 bits of the mask.  */
1784    if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1785      p = buffer + 4;
1786  
1787    /* lpstop is another exception.  It takes a one word argument but is
1788       three words long.  */
1789    if (p - buffer < 6
1790        && (best->match & 0xffff) == 0xffff
1791        && best->args[0] == '#'
1792        && best->args[1] == 'w')
1793      {
1794        /* Copy the one word argument into the usual location for a one
1795  	 word argument, to simplify printing it.  We can get away with
1796  	 this because we know exactly what the second word is, and we
1797  	 aren't going to print anything based on it.  */
1798        p = buffer + 6;
1799        fetch_data(info, p);
1800        buffer[2] = buffer[4];
1801        buffer[3] = buffer[5];
1802      }
1803  
1804    fetch_data(info, p);
1805  
1806    d = best->args;
1807  
1808    save_p = p;
1809    info->print_address_func = dummy_print_address;
1810    info->fprintf_func = dummy_printer;
1811  
1812    /* We scan the operands twice.  The first time we don't print anything,
1813       but look for errors.  */
1814    for (; *d; d += 2)
1815      {
1816        int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1817  
1818        if (eaten >= 0)
1819  	p += eaten;
1820        else if (eaten == -1)
1821  	{
1822  	  info->fprintf_func = save_printer;
1823  	  info->print_address_func = save_print_address;
1824  	  return 0;
1825  	}
1826        else
1827  	{
1828  	  info->fprintf_func (info->stream,
1829  			      /* xgettext:c-format */
1830  			      _("<internal error in opcode table: %s %s>\n"),
1831  			      best->name,  best->args);
1832  	  info->fprintf_func = save_printer;
1833  	  info->print_address_func = save_print_address;
1834  	  return 2;
1835  	}
1836      }
1837  
1838    p = save_p;
1839    info->fprintf_func = save_printer;
1840    info->print_address_func = save_print_address;
1841  
1842    d = best->args;
1843  
1844    info->fprintf_func (info->stream, "%s", best->name);
1845  
1846    if (*d)
1847      info->fprintf_func (info->stream, " ");
1848  
1849    while (*d)
1850      {
1851        p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1852        d += 2;
1853  
1854        if (*d && *(d - 2) != 'I' && *d != 'k')
1855  	info->fprintf_func (info->stream, ",");
1856      }
1857  
1858    return p - buffer;
1859  }
1860  
1861  /* Print the m68k instruction at address MEMADDR in debugged memory,
1862     on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1863  
1864  int
1865  print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1866  {
1867    int i;
1868    const char *d;
1869    unsigned int arch_mask;
1870    struct private priv;
1871    bfd_byte *buffer = priv.the_buffer;
1872    int major_opcode;
1873    static int numopcodes[16];
1874    static const struct m68k_opcode **opcodes[16];
1875    int val;
1876  
1877    if (!opcodes[0])
1878      {
1879        /* Speed up the matching by sorting the opcode
1880  	 table on the upper four bits of the opcode.  */
1881        const struct m68k_opcode **opc_pointer[16];
1882  
1883        /* First count how many opcodes are in each of the sixteen buckets.  */
1884        for (i = 0; i < m68k_numopcodes; i++)
1885  	numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1886  
1887        /* Then create a sorted table of pointers
1888  	 that point into the unsorted table.  */
1889        opc_pointer[0] = malloc (sizeof (struct m68k_opcode *)
1890                                 * m68k_numopcodes);
1891        opcodes[0] = opc_pointer[0];
1892  
1893        for (i = 1; i < 16; i++)
1894  	{
1895  	  opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1896  	  opcodes[i] = opc_pointer[i];
1897  	}
1898  
1899        for (i = 0; i < m68k_numopcodes; i++)
1900  	*opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1901      }
1902  
1903    info->private_data = (PTR) &priv;
1904    /* Tell objdump to use two bytes per chunk
1905       and six bytes per line for displaying raw data.  */
1906    info->bytes_per_chunk = 2;
1907    info->bytes_per_line = 6;
1908    info->display_endian = BFD_ENDIAN_BIG;
1909    priv.max_fetched = priv.the_buffer;
1910    priv.insn_start = memaddr;
1911  
1912    if (sigsetjmp(priv.bailout, 0) != 0) {
1913        /* Error return.  */
1914        return -1;
1915    }
1916  
1917    switch (info->mach)
1918      {
1919      default:
1920      case 0:
1921        arch_mask = (unsigned int) -1;
1922        break;
1923      case bfd_mach_m68000:
1924        arch_mask = m68000|m68881|m68851;
1925        break;
1926      case bfd_mach_m68008:
1927        arch_mask = m68008|m68881|m68851;
1928        break;
1929      case bfd_mach_m68010:
1930        arch_mask = m68010|m68881|m68851;
1931        break;
1932      case bfd_mach_m68020:
1933        arch_mask = m68020|m68881|m68851;
1934        break;
1935      case bfd_mach_m68030:
1936        arch_mask = m68030|m68881|m68851;
1937        break;
1938      case bfd_mach_m68040:
1939        arch_mask = m68040|m68881|m68851;
1940        break;
1941      case bfd_mach_m68060:
1942        arch_mask = m68060|m68881|m68851;
1943        break;
1944      case bfd_mach_mcf5200:
1945        arch_mask = mcfisa_a;
1946        break;
1947      case bfd_mach_mcf521x:
1948      case bfd_mach_mcf528x:
1949        arch_mask = mcfisa_a|mcfhwdiv|mcfisa_aa|mcfusp|mcfemac;
1950        break;
1951      case bfd_mach_mcf5206e:
1952        arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
1953        break;
1954      case bfd_mach_mcf5249:
1955        arch_mask = mcfisa_a|mcfhwdiv|mcfemac;
1956        break;
1957      case bfd_mach_mcf5307:
1958        arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
1959        break;
1960      case bfd_mach_mcf5407:
1961        arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac;
1962        break;
1963      case bfd_mach_mcf547x:
1964      case bfd_mach_mcf548x:
1965      case bfd_mach_mcfv4e:
1966        arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfemac;
1967        break;
1968      }
1969  
1970    fetch_data(info, buffer + 2);
1971    major_opcode = (buffer[0] >> 4) & 15;
1972  
1973    for (i = 0; i < numopcodes[major_opcode]; i++)
1974      {
1975        const struct m68k_opcode *opc = opcodes[major_opcode][i];
1976        unsigned long opcode = opc->opcode;
1977        unsigned long match = opc->match;
1978  
1979        if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1980  	  && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1981  	  /* Only fetch the next two bytes if we need to.  */
1982  	  && (((0xffff & match) == 0)
1983  	      ||
1984                (fetch_data(info, buffer + 4)
1985  	       && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1986  	       && ((0xff & buffer[3] & match) == (0xff & opcode)))
1987  	      )
1988  	  && (opc->arch & arch_mask) != 0)
1989  	{
1990  	  /* Don't use for printout the variants of divul and divsl
1991  	     that have the same register number in two places.
1992  	     The more general variants will match instead.  */
1993  	  for (d = opc->args; *d; d += 2)
1994  	    if (d[1] == 'D')
1995  	      break;
1996  
1997  	  /* Don't use for printout the variants of most floating
1998  	     point coprocessor instructions which use the same
1999  	     register number in two places, as above.  */
2000  	  if (*d == '\0')
2001  	    for (d = opc->args; *d; d += 2)
2002  	      if (d[1] == 't')
2003  		break;
2004  
2005  	  /* Don't match fmovel with more than one register;
2006  	     wait for fmoveml.  */
2007  	  if (*d == '\0')
2008  	    {
2009  	      for (d = opc->args; *d; d += 2)
2010  		{
2011  		  if (d[0] == 's' && d[1] == '8')
2012  		    {
2013  		      val = fetch_arg (buffer, d[1], 3, info);
2014  		      if ((val & (val - 1)) != 0)
2015  			break;
2016  		    }
2017  		}
2018  	    }
2019  
2020  	  if (*d == '\0')
2021  	    if ((val = match_insn_m68k (memaddr, info, opc, & priv)))
2022  	      return val;
2023  	}
2024      }
2025  
2026    /* Handle undefined instructions.  */
2027    info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
2028    return 2;
2029  }
2030  /* **** End of m68k-dis.c */
2031  /* **** m68k-opc.h from sourceware.org CVS 2005-08-14.  */
2032  /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.
2033     Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2034     2000, 2001, 2003, 2004, 2005
2035     Free Software Foundation, Inc.
2036  
2037     This file is part of GDB, GAS, and the GNU binutils.
2038  
2039     GDB, GAS, and the GNU binutils are free software; you can redistribute
2040     them and/or modify them under the terms of the GNU General Public
2041     License as published by the Free Software Foundation; either version
2042     1, or (at your option) any later version.
2043  
2044     GDB, GAS, and the GNU binutils are distributed in the hope that they
2045     will be useful, but WITHOUT ANY WARRANTY; without even the implied
2046     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
2047     the GNU General Public License for more details.
2048  
2049     You should have received a copy of the GNU General Public License
2050     along with this file; see the file COPYING.  If not,
2051     see <http://www.gnu.org/licenses/>.  */
2052  
2053  #define one(x) ((unsigned int) (x) << 16)
2054  #define two(x, y) (((unsigned int) (x) << 16) + (y))
2055  
2056  /* The assembler requires that all instances of the same mnemonic must
2057     be consecutive.  If they aren't, the assembler will bomb at
2058     runtime.  */
2059  
2060  const struct m68k_opcode m68k_opcodes[] =
2061  {
2062  {"abcd", 2,	one(0140400),	one(0170770), "DsDd", m68000up },
2063  {"abcd", 2,	one(0140410),	one(0170770), "-s-d", m68000up },
2064  
2065  {"addaw", 2,	one(0150300),	one(0170700), "*wAd", m68000up },
2066  {"addal", 2,	one(0150700),	one(0170700), "*lAd", m68000up | mcfisa_a },
2067  
2068  {"addib", 4,	one(0003000),	one(0177700), "#b$s", m68000up },
2069  {"addiw", 4,	one(0003100),	one(0177700), "#w$s", m68000up },
2070  {"addil", 6,	one(0003200),	one(0177700), "#l$s", m68000up },
2071  {"addil", 6,	one(0003200),	one(0177700), "#lDs", mcfisa_a },
2072  
2073  {"addqb", 2,	one(0050000),	one(0170700), "Qd$b", m68000up },
2074  {"addqw", 2,	one(0050100),	one(0170700), "Qd%w", m68000up },
2075  {"addql", 2,	one(0050200),	one(0170700), "Qd%l", m68000up | mcfisa_a },
2076  
2077  /* The add opcode can generate the adda, addi, and addq instructions.  */
2078  {"addb", 2,	one(0050000),	one(0170700), "Qd$b", m68000up },
2079  {"addb", 4,	one(0003000),	one(0177700), "#b$s", m68000up },
2080  {"addb", 2,	one(0150000),	one(0170700), ";bDd", m68000up },
2081  {"addb", 2,	one(0150400),	one(0170700), "Dd~b", m68000up },
2082  {"addw", 2,	one(0050100),	one(0170700), "Qd%w", m68000up },
2083  {"addw", 2,	one(0150300),	one(0170700), "*wAd", m68000up },
2084  {"addw", 4,	one(0003100),	one(0177700), "#w$s", m68000up },
2085  {"addw", 2,	one(0150100),	one(0170700), "*wDd", m68000up },
2086  {"addw", 2,	one(0150500),	one(0170700), "Dd~w", m68000up },
2087  {"addl", 2,	one(0050200),	one(0170700), "Qd%l", m68000up | mcfisa_a },
2088  {"addl", 6,	one(0003200),	one(0177700), "#l$s", m68000up },
2089  {"addl", 6,	one(0003200),	one(0177700), "#lDs", mcfisa_a },
2090  {"addl", 2,	one(0150700),	one(0170700), "*lAd", m68000up | mcfisa_a },
2091  {"addl", 2,	one(0150200),	one(0170700), "*lDd", m68000up | mcfisa_a },
2092  {"addl", 2,	one(0150600),	one(0170700), "Dd~l", m68000up | mcfisa_a },
2093  
2094  {"addxb", 2,	one(0150400),	one(0170770), "DsDd", m68000up },
2095  {"addxb", 2,	one(0150410),	one(0170770), "-s-d", m68000up },
2096  {"addxw", 2,	one(0150500),	one(0170770), "DsDd", m68000up },
2097  {"addxw", 2,	one(0150510),	one(0170770), "-s-d", m68000up },
2098  {"addxl", 2,	one(0150600),	one(0170770), "DsDd", m68000up | mcfisa_a },
2099  {"addxl", 2,	one(0150610),	one(0170770), "-s-d", m68000up },
2100  
2101  {"andib", 4,	one(0001000),	one(0177700), "#b$s", m68000up },
2102  {"andib", 4,	one(0001074),	one(0177777), "#bCs", m68000up },
2103  {"andiw", 4,	one(0001100),	one(0177700), "#w$s", m68000up },
2104  {"andiw", 4,	one(0001174),	one(0177777), "#wSs", m68000up },
2105  {"andil", 6,	one(0001200),	one(0177700), "#l$s", m68000up },
2106  {"andil", 6,	one(0001200),	one(0177700), "#lDs", mcfisa_a },
2107  {"andi", 4,	one(0001100),	one(0177700), "#w$s", m68000up },
2108  {"andi", 4,	one(0001074),	one(0177777), "#bCs", m68000up },
2109  {"andi", 4,	one(0001174),	one(0177777), "#wSs", m68000up },
2110  
2111  /* The and opcode can generate the andi instruction.  */
2112  {"andb", 4,	one(0001000),	one(0177700), "#b$s", m68000up },
2113  {"andb", 4,	one(0001074),	one(0177777), "#bCs", m68000up },
2114  {"andb", 2,	one(0140000),	one(0170700), ";bDd", m68000up },
2115  {"andb", 2,	one(0140400),	one(0170700), "Dd~b", m68000up },
2116  {"andw", 4,	one(0001100),	one(0177700), "#w$s", m68000up },
2117  {"andw", 4,	one(0001174),	one(0177777), "#wSs", m68000up },
2118  {"andw", 2,	one(0140100),	one(0170700), ";wDd", m68000up },
2119  {"andw", 2,	one(0140500),	one(0170700), "Dd~w", m68000up },
2120  {"andl", 6,	one(0001200),	one(0177700), "#l$s", m68000up },
2121  {"andl", 6,	one(0001200),	one(0177700), "#lDs", mcfisa_a },
2122  {"andl", 2,	one(0140200),	one(0170700), ";lDd", m68000up | mcfisa_a },
2123  {"andl", 2,	one(0140600),	one(0170700), "Dd~l", m68000up | mcfisa_a },
2124  {"and", 4,	one(0001100),	one(0177700), "#w$w", m68000up },
2125  {"and", 4,	one(0001074),	one(0177777), "#bCs", m68000up },
2126  {"and", 4,	one(0001174),	one(0177777), "#wSs", m68000up },
2127  {"and", 2,	one(0140100),	one(0170700), ";wDd", m68000up },
2128  {"and", 2,	one(0140500),	one(0170700), "Dd~w", m68000up },
2129  
2130  {"aslb", 2,	one(0160400),	one(0170770), "QdDs", m68000up },
2131  {"aslb", 2,	one(0160440),	one(0170770), "DdDs", m68000up },
2132  {"aslw", 2,	one(0160500),	one(0170770), "QdDs", m68000up },
2133  {"aslw", 2,	one(0160540),	one(0170770), "DdDs", m68000up },
2134  {"aslw", 2,	one(0160700),	one(0177700), "~s",   m68000up },
2135  {"asll", 2,	one(0160600),	one(0170770), "QdDs", m68000up | mcfisa_a },
2136  {"asll", 2,	one(0160640),	one(0170770), "DdDs", m68000up | mcfisa_a },
2137  
2138  {"asrb", 2,	one(0160000),	one(0170770), "QdDs", m68000up },
2139  {"asrb", 2,	one(0160040),	one(0170770), "DdDs", m68000up },
2140  {"asrw", 2,	one(0160100),	one(0170770), "QdDs", m68000up },
2141  {"asrw", 2,	one(0160140),	one(0170770), "DdDs", m68000up },
2142  {"asrw", 2,	one(0160300),	one(0177700), "~s",   m68000up },
2143  {"asrl", 2,	one(0160200),	one(0170770), "QdDs", m68000up | mcfisa_a },
2144  {"asrl", 2,	one(0160240),	one(0170770), "DdDs", m68000up | mcfisa_a },
2145  
2146  {"bhiw", 2,	one(0061000),	one(0177777), "BW", m68000up | mcfisa_a },
2147  {"blsw", 2,	one(0061400),	one(0177777), "BW", m68000up | mcfisa_a },
2148  {"bccw", 2,	one(0062000),	one(0177777), "BW", m68000up | mcfisa_a },
2149  {"bcsw", 2,	one(0062400),	one(0177777), "BW", m68000up | mcfisa_a },
2150  {"bnew", 2,	one(0063000),	one(0177777), "BW", m68000up | mcfisa_a },
2151  {"beqw", 2,	one(0063400),	one(0177777), "BW", m68000up | mcfisa_a },
2152  {"bvcw", 2,	one(0064000),	one(0177777), "BW", m68000up | mcfisa_a },
2153  {"bvsw", 2,	one(0064400),	one(0177777), "BW", m68000up | mcfisa_a },
2154  {"bplw", 2,	one(0065000),	one(0177777), "BW", m68000up | mcfisa_a },
2155  {"bmiw", 2,	one(0065400),	one(0177777), "BW", m68000up | mcfisa_a },
2156  {"bgew", 2,	one(0066000),	one(0177777), "BW", m68000up | mcfisa_a },
2157  {"bltw", 2,	one(0066400),	one(0177777), "BW", m68000up | mcfisa_a },
2158  {"bgtw", 2,	one(0067000),	one(0177777), "BW", m68000up | mcfisa_a },
2159  {"blew", 2,	one(0067400),	one(0177777), "BW", m68000up | mcfisa_a },
2160  
2161  {"bhil", 2,	one(0061377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2162  {"blsl", 2,	one(0061777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2163  {"bccl", 2,	one(0062377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2164  {"bcsl", 2,	one(0062777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2165  {"bnel", 2,	one(0063377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2166  {"beql", 2,	one(0063777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2167  {"bvcl", 2,	one(0064377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2168  {"bvsl", 2,	one(0064777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2169  {"bpll", 2,	one(0065377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2170  {"bmil", 2,	one(0065777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2171  {"bgel", 2,	one(0066377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2172  {"bltl", 2,	one(0066777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2173  {"bgtl", 2,	one(0067377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2174  {"blel", 2,	one(0067777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2175  
2176  {"bhis", 2,	one(0061000),	one(0177400), "BB", m68000up | mcfisa_a },
2177  {"blss", 2,	one(0061400),	one(0177400), "BB", m68000up | mcfisa_a },
2178  {"bccs", 2,	one(0062000),	one(0177400), "BB", m68000up | mcfisa_a },
2179  {"bcss", 2,	one(0062400),	one(0177400), "BB", m68000up | mcfisa_a },
2180  {"bnes", 2,	one(0063000),	one(0177400), "BB", m68000up | mcfisa_a },
2181  {"beqs", 2,	one(0063400),	one(0177400), "BB", m68000up | mcfisa_a },
2182  {"bvcs", 2,	one(0064000),	one(0177400), "BB", m68000up | mcfisa_a },
2183  {"bvss", 2,	one(0064400),	one(0177400), "BB", m68000up | mcfisa_a },
2184  {"bpls", 2,	one(0065000),	one(0177400), "BB", m68000up | mcfisa_a },
2185  {"bmis", 2,	one(0065400),	one(0177400), "BB", m68000up | mcfisa_a },
2186  {"bges", 2,	one(0066000),	one(0177400), "BB", m68000up | mcfisa_a },
2187  {"blts", 2,	one(0066400),	one(0177400), "BB", m68000up | mcfisa_a },
2188  {"bgts", 2,	one(0067000),	one(0177400), "BB", m68000up | mcfisa_a },
2189  {"bles", 2,	one(0067400),	one(0177400), "BB", m68000up | mcfisa_a },
2190  
2191  {"jhi", 2,	one(0061000),	one(0177400), "Bg", m68000up | mcfisa_a },
2192  {"jls", 2,	one(0061400),	one(0177400), "Bg", m68000up | mcfisa_a },
2193  {"jcc", 2,	one(0062000),	one(0177400), "Bg", m68000up | mcfisa_a },
2194  {"jcs", 2,	one(0062400),	one(0177400), "Bg", m68000up | mcfisa_a },
2195  {"jne", 2,	one(0063000),	one(0177400), "Bg", m68000up | mcfisa_a },
2196  {"jeq", 2,	one(0063400),	one(0177400), "Bg", m68000up | mcfisa_a },
2197  {"jvc", 2,	one(0064000),	one(0177400), "Bg", m68000up | mcfisa_a },
2198  {"jvs", 2,	one(0064400),	one(0177400), "Bg", m68000up | mcfisa_a },
2199  {"jpl", 2,	one(0065000),	one(0177400), "Bg", m68000up | mcfisa_a },
2200  {"jmi", 2,	one(0065400),	one(0177400), "Bg", m68000up | mcfisa_a },
2201  {"jge", 2,	one(0066000),	one(0177400), "Bg", m68000up | mcfisa_a },
2202  {"jlt", 2,	one(0066400),	one(0177400), "Bg", m68000up | mcfisa_a },
2203  {"jgt", 2,	one(0067000),	one(0177400), "Bg", m68000up | mcfisa_a },
2204  {"jle", 2,	one(0067400),	one(0177400), "Bg", m68000up | mcfisa_a },
2205  
2206  {"bchg", 2,	one(0000500),	one(0170700), "Dd$s", m68000up | mcfisa_a },
2207  {"bchg", 4,	one(0004100),	one(0177700), "#b$s", m68000up },
2208  {"bchg", 4,	one(0004100),	one(0177700), "#bqs", mcfisa_a },
2209  
2210  {"bclr", 2,	one(0000600),	one(0170700), "Dd$s", m68000up | mcfisa_a },
2211  {"bclr", 4,	one(0004200),	one(0177700), "#b$s", m68000up },
2212  {"bclr", 4,	one(0004200),	one(0177700), "#bqs", mcfisa_a },
2213  
2214  {"bfchg", 4,	two(0165300, 0), two(0177700, 0170000),	"?sO2O3",   m68020up },
2215  {"bfclr", 4,	two(0166300, 0), two(0177700, 0170000),	"?sO2O3",   m68020up },
2216  {"bfexts", 4,	two(0165700, 0), two(0177700, 0100000),	"/sO2O3D1", m68020up },
2217  {"bfextu", 4,	two(0164700, 0), two(0177700, 0100000),	"/sO2O3D1", m68020up },
2218  {"bfffo", 4,	two(0166700, 0), two(0177700, 0100000),	"/sO2O3D1", m68020up },
2219  {"bfins", 4,	two(0167700, 0), two(0177700, 0100000),	"D1?sO2O3", m68020up },
2220  {"bfset", 4,	two(0167300, 0), two(0177700, 0170000),	"?sO2O3",   m68020up },
2221  {"bftst", 4,	two(0164300, 0), two(0177700, 0170000),	"/sO2O3",   m68020up },
2222  
2223  {"bgnd", 2,	one(0045372),	one(0177777), "", cpu32 },
2224  
2225  {"bitrev", 2,	one(0000300),	one(0177770), "Ds", mcfisa_aa},
2226  
2227  {"bkpt", 2,	one(0044110),	one(0177770), "ts", m68010up },
2228  
2229  {"braw", 2,	one(0060000),	one(0177777), "BW", m68000up | mcfisa_a },
2230  {"bral", 2,	one(0060377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2231  {"bras", 2,	one(0060000),	one(0177400), "BB", m68000up | mcfisa_a },
2232  
2233  {"bset", 2,	one(0000700),	one(0170700), "Dd$s", m68000up | mcfisa_a },
2234  {"bset", 2,	one(0000700),	one(0170700), "Ddvs", mcfisa_a },
2235  {"bset", 4,	one(0004300),	one(0177700), "#b$s", m68000up },
2236  {"bset", 4,	one(0004300),	one(0177700), "#bqs", mcfisa_a },
2237  
2238  {"bsrw", 2,	one(0060400),	one(0177777), "BW", m68000up | mcfisa_a },
2239  {"bsrl", 2,	one(0060777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2240  {"bsrs", 2,	one(0060400),	one(0177400), "BB", m68000up | mcfisa_a },
2241  
2242  {"btst", 2,	one(0000400),	one(0170700), "Dd;b", m68000up | mcfisa_a },
2243  {"btst", 4,	one(0004000),	one(0177700), "#b@s", m68000up },
2244  {"btst", 4,	one(0004000),	one(0177700), "#bqs", mcfisa_a },
2245  
2246  {"byterev", 2,	one(0001300),	one(0177770), "Ds", mcfisa_aa},
2247  
2248  {"callm", 4,	one(0003300),	one(0177700), "#b!s", m68020 },
2249  
2250  {"cas2w", 6,    two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
2251  {"cas2w", 6,    two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
2252  {"cas2l", 6,    two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
2253  {"cas2l", 6,    two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
2254  
2255  {"casb", 4,	two(0005300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },
2256  {"casw", 4,	two(0006300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },
2257  {"casl", 4,	two(0007300, 0), two(0177700, 0177070),	"D3D2~s", m68020up },
2258  
2259  {"chk2b", 4, 	two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
2260  {"chk2w", 4, 	two(0001300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2261  {"chk2l", 4, 	two(0002300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2262  
2263  {"chkl", 2,	one(0040400),		one(0170700), ";lDd", m68000up },
2264  {"chkw", 2,	one(0040600),		one(0170700), ";wDd", m68000up },
2265  
2266  #define SCOPE_LINE (0x1 << 3)
2267  #define SCOPE_PAGE (0x2 << 3)
2268  #define SCOPE_ALL  (0x3 << 3)
2269  
2270  {"cinva", 2,	one(0xf400|SCOPE_ALL),  one(0xff38), "ce",   m68040up },
2271  {"cinvl", 2,	one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up },
2272  {"cinvp", 2,	one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
2273  
2274  {"cpusha", 2,	one(0xf420|SCOPE_ALL),  one(0xff38), "ce",   m68040up },
2275  {"cpushl", 2,	one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcfisa_a },
2276  {"cpushp", 2,	one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
2277  
2278  #undef SCOPE_LINE
2279  #undef SCOPE_PAGE
2280  #undef SCOPE_ALL
2281  
2282  {"clrb", 2,	one(0041000),	one(0177700), "$s", m68000up | mcfisa_a },
2283  {"clrw", 2,	one(0041100),	one(0177700), "$s", m68000up | mcfisa_a },
2284  {"clrl", 2,	one(0041200),	one(0177700), "$s", m68000up | mcfisa_a },
2285  
2286  {"cmp2b", 4,	two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
2287  {"cmp2w", 4,	two(0001300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2288  {"cmp2l", 4,	two(0002300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2289  
2290  {"cmpaw", 2,	one(0130300),	one(0170700), "*wAd", m68000up },
2291  {"cmpal", 2,	one(0130700),	one(0170700), "*lAd", m68000up | mcfisa_a },
2292  
2293  {"cmpib", 4,	one(0006000),	one(0177700), "#b@s", m68000up },
2294  {"cmpib", 4,	one(0006000),	one(0177700), "#bDs", mcfisa_b },
2295  {"cmpiw", 4,	one(0006100),	one(0177700), "#w@s", m68000up },
2296  {"cmpiw", 4,	one(0006100),	one(0177700), "#wDs", mcfisa_b },
2297  {"cmpil", 6,	one(0006200),	one(0177700), "#l@s", m68000up },
2298  {"cmpil", 6,	one(0006200),	one(0177700), "#lDs", mcfisa_a },
2299  
2300  {"cmpmb", 2,	one(0130410),	one(0170770), "+s+d", m68000up },
2301  {"cmpmw", 2,	one(0130510),	one(0170770), "+s+d", m68000up },
2302  {"cmpml", 2,	one(0130610),	one(0170770), "+s+d", m68000up },
2303  
2304  /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions.  */
2305  {"cmpb", 4,	one(0006000),	one(0177700), "#b@s", m68000up },
2306  {"cmpb", 4,	one(0006000),	one(0177700), "#bDs", mcfisa_b },
2307  {"cmpb", 2,	one(0130410),	one(0170770), "+s+d", m68000up },
2308  {"cmpb", 2,	one(0130000),	one(0170700), ";bDd", m68000up },
2309  {"cmpb", 2,	one(0130000),	one(0170700), "*bDd", mcfisa_b },
2310  {"cmpw", 2,	one(0130300),	one(0170700), "*wAd", m68000up },
2311  {"cmpw", 4,	one(0006100),	one(0177700), "#w@s", m68000up },
2312  {"cmpw", 4,	one(0006100),	one(0177700), "#wDs", mcfisa_b },
2313  {"cmpw", 2,	one(0130510),	one(0170770), "+s+d", m68000up },
2314  {"cmpw", 2,	one(0130100),	one(0170700), "*wDd", m68000up | mcfisa_b },
2315  {"cmpl", 2,	one(0130700),	one(0170700), "*lAd", m68000up | mcfisa_a },
2316  {"cmpl", 6,	one(0006200),	one(0177700), "#l@s", m68000up },
2317  {"cmpl", 6,	one(0006200),	one(0177700), "#lDs", mcfisa_a },
2318  {"cmpl", 2,	one(0130610),	one(0170770), "+s+d", m68000up },
2319  {"cmpl", 2,	one(0130200),	one(0170700), "*lDd", m68000up | mcfisa_a },
2320  
2321  {"dbcc", 2,	one(0052310),	one(0177770), "DsBw", m68000up },
2322  {"dbcs", 2,	one(0052710),	one(0177770), "DsBw", m68000up },
2323  {"dbeq", 2,	one(0053710),	one(0177770), "DsBw", m68000up },
2324  {"dbf", 2,	one(0050710),	one(0177770), "DsBw", m68000up },
2325  {"dbge", 2,	one(0056310),	one(0177770), "DsBw", m68000up },
2326  {"dbgt", 2,	one(0057310),	one(0177770), "DsBw", m68000up },
2327  {"dbhi", 2,	one(0051310),	one(0177770), "DsBw", m68000up },
2328  {"dble", 2,	one(0057710),	one(0177770), "DsBw", m68000up },
2329  {"dbls", 2,	one(0051710),	one(0177770), "DsBw", m68000up },
2330  {"dblt", 2,	one(0056710),	one(0177770), "DsBw", m68000up },
2331  {"dbmi", 2,	one(0055710),	one(0177770), "DsBw", m68000up },
2332  {"dbne", 2,	one(0053310),	one(0177770), "DsBw", m68000up },
2333  {"dbpl", 2,	one(0055310),	one(0177770), "DsBw", m68000up },
2334  {"dbt", 2,	one(0050310),	one(0177770), "DsBw", m68000up },
2335  {"dbvc", 2,	one(0054310),	one(0177770), "DsBw", m68000up },
2336  {"dbvs", 2,	one(0054710),	one(0177770), "DsBw", m68000up },
2337  
2338  {"divsw", 2,	one(0100700),	one(0170700), ";wDd", m68000up | mcfhwdiv },
2339  
2340  {"divsl", 4, 	two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2341  {"divsl", 4, 	two(0046100,0004000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
2342  {"divsl", 4, 	two(0046100,0004000),two(0177700,0107770),"qsDD",   mcfhwdiv },
2343  
2344  {"divsll", 4, 	two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2345  {"divsll", 4, 	two(0046100,0004000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
2346  
2347  {"divuw", 2,	one(0100300),		one(0170700), ";wDd", m68000up | mcfhwdiv },
2348  
2349  {"divul", 4,	two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2350  {"divul", 4,	two(0046100,0000000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
2351  {"divul", 4,	two(0046100,0000000),two(0177700,0107770),"qsDD",   mcfhwdiv },
2352  
2353  {"divull", 4,	two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2354  {"divull", 4,	two(0046100,0000000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
2355  
2356  {"eorib", 4,	one(0005000),	one(0177700), "#b$s", m68000up },
2357  {"eorib", 4,	one(0005074),	one(0177777), "#bCs", m68000up },
2358  {"eoriw", 4,	one(0005100),	one(0177700), "#w$s", m68000up },
2359  {"eoriw", 4,	one(0005174),	one(0177777), "#wSs", m68000up },
2360  {"eoril", 6,	one(0005200),	one(0177700), "#l$s", m68000up },
2361  {"eoril", 6,	one(0005200),	one(0177700), "#lDs", mcfisa_a },
2362  {"eori", 4,	one(0005074),	one(0177777), "#bCs", m68000up },
2363  {"eori", 4,	one(0005174),	one(0177777), "#wSs", m68000up },
2364  {"eori", 4,	one(0005100),	one(0177700), "#w$s", m68000up },
2365  
2366  /* The eor opcode can generate the eori instruction.  */
2367  {"eorb", 4,	one(0005000),	one(0177700), "#b$s", m68000up },
2368  {"eorb", 4,	one(0005074),	one(0177777), "#bCs", m68000up },
2369  {"eorb", 2,	one(0130400),	one(0170700), "Dd$s", m68000up },
2370  {"eorw", 4,	one(0005100),	one(0177700), "#w$s", m68000up },
2371  {"eorw", 4,	one(0005174),	one(0177777), "#wSs", m68000up },
2372  {"eorw", 2,	one(0130500),	one(0170700), "Dd$s", m68000up },
2373  {"eorl", 6,	one(0005200),	one(0177700), "#l$s", m68000up },
2374  {"eorl", 6,	one(0005200),	one(0177700), "#lDs", mcfisa_a },
2375  {"eorl", 2,	one(0130600),	one(0170700), "Dd$s", m68000up | mcfisa_a },
2376  {"eor", 4,	one(0005074),	one(0177777), "#bCs", m68000up },
2377  {"eor", 4,	one(0005174),	one(0177777), "#wSs", m68000up },
2378  {"eor", 4,	one(0005100),	one(0177700), "#w$s", m68000up },
2379  {"eor", 2,	one(0130500),	one(0170700), "Dd$s", m68000up },
2380  
2381  {"exg", 2,	one(0140500),	one(0170770), "DdDs", m68000up },
2382  {"exg", 2,	one(0140510),	one(0170770), "AdAs", m68000up },
2383  {"exg", 2,	one(0140610),	one(0170770), "DdAs", m68000up },
2384  {"exg", 2,	one(0140610),	one(0170770), "AsDd", m68000up },
2385  
2386  {"extw", 2,	one(0044200),	one(0177770), "Ds", m68000up|mcfisa_a },
2387  {"extl", 2,	one(0044300),	one(0177770), "Ds", m68000up|mcfisa_a },
2388  {"extbl", 2,	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcfisa_a },
2389  
2390  {"ff1", 2,   	one(0002300), one(0177770), "Ds", mcfisa_aa},
2391  
2392  /* float stuff starts here */
2393  
2394  {"fabsb", 4,	two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2395  {"fabsb", 4,	two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2396  {"fabsd", 4,	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2397  {"fabsd", 4,	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2398  {"fabsd", 4,	two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2399  {"fabsd", 4,	two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2400  {"fabsl", 4,	two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2401  {"fabsl", 4,	two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2402  {"fabsp", 4,	two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2403  {"fabss", 4,	two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", cfloat },
2404  {"fabss", 4,	two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2405  {"fabsw", 4,	two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2406  {"fabsw", 4,	two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2407  {"fabsx", 4,	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2408  {"fabsx", 4,	two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2409  {"fabsx", 4,	two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2410  
2411  {"fsabsb", 4,	two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2412  {"fsabsb", 4,	two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2413  {"fsabsd", 4,	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2414  {"fsabsd", 4,	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2415  {"fsabsd", 4,	two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2416  {"fsabsd", 4,	two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2417  {"fsabsl", 4,	two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2418  {"fsabsl", 4,	two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2419  {"fsabsp", 4,	two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2420  {"fsabss", 4,	two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2421  {"fsabss", 4,	two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2422  {"fsabsw", 4,	two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2423  {"fsabsw", 4,	two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2424  {"fsabsx", 4,	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2425  {"fsabsx", 4,	two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2426  {"fsabsx", 4,	two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
2427  
2428  {"fdabsb", 4,	two(0xF000, 0x585C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2429  {"fdabsb", 4,	two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up},
2430  {"fdabsd", 4,	two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2431  {"fdabsd", 4,	two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2432  {"fdabsd", 4,	two(0xF000, 0x545C), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2433  {"fdabsd", 4,	two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up},
2434  {"fdabsl", 4,	two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2435  {"fdabsl", 4,	two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
2436  {"fdabsp", 4,	two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
2437  {"fdabss", 4,	two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2438  {"fdabss", 4,	two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
2439  {"fdabsw", 4,	two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2440  {"fdabsw", 4,	two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
2441  {"fdabsx", 4,	two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up},
2442  {"fdabsx", 4,	two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up},
2443  {"fdabsx", 4,	two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiFt",   m68040up},
2444  
2445  {"facosb", 4,	two(0xF000, 0x581C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2446  {"facosd", 4,	two(0xF000, 0x541C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2447  {"facosl", 4,	two(0xF000, 0x401C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2448  {"facosp", 4,	two(0xF000, 0x4C1C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2449  {"facoss", 4,	two(0xF000, 0x441C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2450  {"facosw", 4,	two(0xF000, 0x501C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2451  {"facosx", 4,	two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2452  {"facosx", 4,	two(0xF000, 0x481C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2453  {"facosx", 4,	two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2454  
2455  {"faddb", 4,	two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2456  {"faddb", 4,	two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2457  {"faddd", 4,	two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2458  {"faddd", 4,	two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2459  {"faddd", 4,	two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2460  {"faddd", 4,	two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2461  {"faddl", 4,	two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2462  {"faddl", 4,	two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2463  {"faddp", 4,	two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2464  {"fadds", 4,	two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2465  {"fadds", 4,	two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2466  {"faddw", 4,	two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2467  {"faddw", 4,	two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2468  {"faddx", 4,	two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2469  {"faddx", 4,	two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2470  
2471  {"fsaddb", 4,	two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2472  {"fsaddb", 4,	two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2473  {"fsaddd", 4,	two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2474  {"fsaddd", 4,	two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2475  {"fsaddd", 4,	two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2476  {"fsaddl", 4,	two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2477  {"fsaddl", 4,	two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2478  {"fsaddp", 4,	two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2479  {"fsadds", 4,	two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2480  {"fsadds", 4,	two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2481  {"fsaddw", 4,	two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2482  {"fsaddw", 4,	two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2483  {"fsaddx", 4,	two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2484  {"fsaddx", 4,	two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2485  
2486  {"fdaddb", 4,	two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2487  {"fdaddb", 4,	two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2488  {"fdaddd", 4,	two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2489  {"fdaddd", 4,	two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2490  {"fdaddd", 4,	two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2491  {"fdaddl", 4,	two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2492  {"fdaddl", 4,	two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2493  {"fdaddp", 4,	two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2494  {"fdadds", 4,	two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2495  {"fdadds", 4,	two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2496  {"fdaddw", 4,	two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2497  {"fdaddw", 4,	two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2498  {"fdaddx", 4,	two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2499  {"fdaddx", 4,	two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2500  
2501  {"fasinb", 4,	two(0xF000, 0x580C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2502  {"fasind", 4,	two(0xF000, 0x540C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2503  {"fasinl", 4,	two(0xF000, 0x400C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2504  {"fasinp", 4,	two(0xF000, 0x4C0C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2505  {"fasins", 4,	two(0xF000, 0x440C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2506  {"fasinw", 4,	two(0xF000, 0x500C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2507  {"fasinx", 4,	two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2508  {"fasinx", 4,	two(0xF000, 0x480C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2509  {"fasinx", 4,	two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2510  
2511  {"fatanb", 4,	two(0xF000, 0x580A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2512  {"fatand", 4,	two(0xF000, 0x540A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2513  {"fatanl", 4,	two(0xF000, 0x400A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2514  {"fatanp", 4,	two(0xF000, 0x4C0A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2515  {"fatans", 4,	two(0xF000, 0x440A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2516  {"fatanw", 4,	two(0xF000, 0x500A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2517  {"fatanx", 4,	two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2518  {"fatanx", 4,	two(0xF000, 0x480A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2519  {"fatanx", 4,	two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2520  
2521  {"fatanhb", 4,	two(0xF000, 0x580D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2522  {"fatanhd", 4,	two(0xF000, 0x540D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2523  {"fatanhl", 4,	two(0xF000, 0x400D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2524  {"fatanhp", 4,	two(0xF000, 0x4C0D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2525  {"fatanhs", 4,	two(0xF000, 0x440D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2526  {"fatanhw", 4,	two(0xF000, 0x500D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2527  {"fatanhx", 4,	two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2528  {"fatanhx", 4,	two(0xF000, 0x480D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2529  {"fatanhx", 4,	two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2530  
2531  {"fbeq", 2,	one(0xF081),		one(0xF1FF), "IdBW", mfloat | cfloat },
2532  {"fbf", 2,	one(0xF080),		one(0xF1FF), "IdBW", mfloat | cfloat },
2533  {"fbge", 2,	one(0xF093),		one(0xF1FF), "IdBW", mfloat | cfloat },
2534  {"fbgl", 2,	one(0xF096),		one(0xF1FF), "IdBW", mfloat | cfloat },
2535  {"fbgle", 2,	one(0xF097),		one(0xF1FF), "IdBW", mfloat | cfloat },
2536  {"fbgt", 2,	one(0xF092),		one(0xF1FF), "IdBW", mfloat | cfloat },
2537  {"fble", 2,	one(0xF095),		one(0xF1FF), "IdBW", mfloat | cfloat },
2538  {"fblt", 2,	one(0xF094),		one(0xF1FF), "IdBW", mfloat | cfloat },
2539  {"fbne", 2,	one(0xF08E),		one(0xF1FF), "IdBW", mfloat | cfloat },
2540  {"fbnge", 2,	one(0xF09C),		one(0xF1FF), "IdBW", mfloat | cfloat },
2541  {"fbngl", 2,	one(0xF099),		one(0xF1FF), "IdBW", mfloat | cfloat },
2542  {"fbngle", 2,	one(0xF098),		one(0xF1FF), "IdBW", mfloat | cfloat },
2543  {"fbngt", 2,	one(0xF09D),		one(0xF1FF), "IdBW", mfloat | cfloat },
2544  {"fbnle", 2,	one(0xF09A),		one(0xF1FF), "IdBW", mfloat | cfloat },
2545  {"fbnlt", 2,	one(0xF09B),		one(0xF1FF), "IdBW", mfloat | cfloat },
2546  {"fboge", 2,	one(0xF083),		one(0xF1FF), "IdBW", mfloat | cfloat },
2547  {"fbogl", 2,	one(0xF086),		one(0xF1FF), "IdBW", mfloat | cfloat },
2548  {"fbogt", 2,	one(0xF082),		one(0xF1FF), "IdBW", mfloat | cfloat },
2549  {"fbole", 2,	one(0xF085),		one(0xF1FF), "IdBW", mfloat | cfloat },
2550  {"fbolt", 2,	one(0xF084),		one(0xF1FF), "IdBW", mfloat | cfloat },
2551  {"fbor", 2,	one(0xF087),		one(0xF1FF), "IdBW", mfloat | cfloat },
2552  {"fbseq", 2,	one(0xF091),		one(0xF1FF), "IdBW", mfloat | cfloat },
2553  {"fbsf", 2,	one(0xF090),		one(0xF1FF), "IdBW", mfloat | cfloat },
2554  {"fbsne", 2,	one(0xF09E),		one(0xF1FF), "IdBW", mfloat | cfloat },
2555  {"fbst", 2,	one(0xF09F),		one(0xF1FF), "IdBW", mfloat | cfloat },
2556  {"fbt", 2,	one(0xF08F),		one(0xF1FF), "IdBW", mfloat | cfloat },
2557  {"fbueq", 2,	one(0xF089),		one(0xF1FF), "IdBW", mfloat | cfloat },
2558  {"fbuge", 2,	one(0xF08B),		one(0xF1FF), "IdBW", mfloat | cfloat },
2559  {"fbugt", 2,	one(0xF08A),		one(0xF1FF), "IdBW", mfloat | cfloat },
2560  {"fbule", 2,	one(0xF08D),		one(0xF1FF), "IdBW", mfloat | cfloat },
2561  {"fbult", 2,	one(0xF08C),		one(0xF1FF), "IdBW", mfloat | cfloat },
2562  {"fbun", 2,	one(0xF088),		one(0xF1FF), "IdBW", mfloat | cfloat },
2563  
2564  {"fbeql", 2,	one(0xF0C1),		one(0xF1FF), "IdBC", mfloat | cfloat },
2565  {"fbfl", 2,	one(0xF0C0),		one(0xF1FF), "IdBC", mfloat | cfloat },
2566  {"fbgel", 2,	one(0xF0D3),		one(0xF1FF), "IdBC", mfloat | cfloat },
2567  {"fbgll", 2,	one(0xF0D6),		one(0xF1FF), "IdBC", mfloat | cfloat },
2568  {"fbglel", 2,	one(0xF0D7),		one(0xF1FF), "IdBC", mfloat | cfloat },
2569  {"fbgtl", 2,	one(0xF0D2),		one(0xF1FF), "IdBC", mfloat | cfloat },
2570  {"fblel", 2,	one(0xF0D5),		one(0xF1FF), "IdBC", mfloat | cfloat },
2571  {"fbltl", 2,	one(0xF0D4),		one(0xF1FF), "IdBC", mfloat | cfloat },
2572  {"fbnel", 2,	one(0xF0CE),		one(0xF1FF), "IdBC", mfloat | cfloat },
2573  {"fbngel", 2,	one(0xF0DC),		one(0xF1FF), "IdBC", mfloat | cfloat },
2574  {"fbngll", 2,	one(0xF0D9),		one(0xF1FF), "IdBC", mfloat | cfloat },
2575  {"fbnglel", 2,	one(0xF0D8),		one(0xF1FF), "IdBC", mfloat | cfloat },
2576  {"fbngtl", 2,	one(0xF0DD),		one(0xF1FF), "IdBC", mfloat | cfloat },
2577  {"fbnlel", 2,	one(0xF0DA),		one(0xF1FF), "IdBC", mfloat | cfloat },
2578  {"fbnltl", 2,	one(0xF0DB),		one(0xF1FF), "IdBC", mfloat | cfloat },
2579  {"fbogel", 2,	one(0xF0C3),		one(0xF1FF), "IdBC", mfloat | cfloat },
2580  {"fbogll", 2,	one(0xF0C6),		one(0xF1FF), "IdBC", mfloat | cfloat },
2581  {"fbogtl", 2,	one(0xF0C2),		one(0xF1FF), "IdBC", mfloat | cfloat },
2582  {"fbolel", 2,	one(0xF0C5),		one(0xF1FF), "IdBC", mfloat | cfloat },
2583  {"fboltl", 2,	one(0xF0C4),		one(0xF1FF), "IdBC", mfloat | cfloat },
2584  {"fborl", 2,	one(0xF0C7),		one(0xF1FF), "IdBC", mfloat | cfloat },
2585  {"fbseql", 2,	one(0xF0D1),		one(0xF1FF), "IdBC", mfloat | cfloat },
2586  {"fbsfl", 2,	one(0xF0D0),		one(0xF1FF), "IdBC", mfloat | cfloat },
2587  {"fbsnel", 2,	one(0xF0DE),		one(0xF1FF), "IdBC", mfloat | cfloat },
2588  {"fbstl", 2,	one(0xF0DF),		one(0xF1FF), "IdBC", mfloat | cfloat },
2589  {"fbtl", 2,	one(0xF0CF),		one(0xF1FF), "IdBC", mfloat | cfloat },
2590  {"fbueql", 2,	one(0xF0C9),		one(0xF1FF), "IdBC", mfloat | cfloat },
2591  {"fbugel", 2,	one(0xF0CB),		one(0xF1FF), "IdBC", mfloat | cfloat },
2592  {"fbugtl", 2,	one(0xF0CA),		one(0xF1FF), "IdBC", mfloat | cfloat },
2593  {"fbulel", 2,	one(0xF0CD),		one(0xF1FF), "IdBC", mfloat | cfloat },
2594  {"fbultl", 2,	one(0xF0CC),		one(0xF1FF), "IdBC", mfloat | cfloat },
2595  {"fbunl", 2,	one(0xF0C8),		one(0xF1FF), "IdBC", mfloat | cfloat },
2596  
2597  {"fjeq", 2,	one(0xF081),		one(0xF1BF), "IdBc", mfloat | cfloat },
2598  {"fjf", 2,	one(0xF080),		one(0xF1BF), "IdBc", mfloat | cfloat },
2599  {"fjge", 2,	one(0xF093),		one(0xF1BF), "IdBc", mfloat | cfloat },
2600  {"fjgl", 2,	one(0xF096),		one(0xF1BF), "IdBc", mfloat | cfloat },
2601  {"fjgle", 2,	one(0xF097),		one(0xF1BF), "IdBc", mfloat | cfloat },
2602  {"fjgt", 2,	one(0xF092),		one(0xF1BF), "IdBc", mfloat | cfloat },
2603  {"fjle", 2,	one(0xF095),		one(0xF1BF), "IdBc", mfloat | cfloat },
2604  {"fjlt", 2,	one(0xF094),		one(0xF1BF), "IdBc", mfloat | cfloat },
2605  {"fjne", 2,	one(0xF08E),		one(0xF1BF), "IdBc", mfloat | cfloat },
2606  {"fjnge", 2,	one(0xF09C),		one(0xF1BF), "IdBc", mfloat | cfloat },
2607  {"fjngl", 2,	one(0xF099),		one(0xF1BF), "IdBc", mfloat | cfloat },
2608  {"fjngle", 2,	one(0xF098),		one(0xF1BF), "IdBc", mfloat | cfloat },
2609  {"fjngt", 2,	one(0xF09D),		one(0xF1BF), "IdBc", mfloat | cfloat },
2610  {"fjnle", 2,	one(0xF09A),		one(0xF1BF), "IdBc", mfloat | cfloat },
2611  {"fjnlt", 2,	one(0xF09B),		one(0xF1BF), "IdBc", mfloat | cfloat },
2612  {"fjoge", 2,	one(0xF083),		one(0xF1BF), "IdBc", mfloat | cfloat },
2613  {"fjogl", 2,	one(0xF086),		one(0xF1BF), "IdBc", mfloat | cfloat },
2614  {"fjogt", 2,	one(0xF082),		one(0xF1BF), "IdBc", mfloat | cfloat },
2615  {"fjole", 2,	one(0xF085),		one(0xF1BF), "IdBc", mfloat | cfloat },
2616  {"fjolt", 2,	one(0xF084),		one(0xF1BF), "IdBc", mfloat | cfloat },
2617  {"fjor", 2,	one(0xF087),		one(0xF1BF), "IdBc", mfloat | cfloat },
2618  {"fjseq", 2,	one(0xF091),		one(0xF1BF), "IdBc", mfloat | cfloat },
2619  {"fjsf", 2,	one(0xF090),		one(0xF1BF), "IdBc", mfloat | cfloat },
2620  {"fjsne", 2,	one(0xF09E),		one(0xF1BF), "IdBc", mfloat | cfloat },
2621  {"fjst", 2,	one(0xF09F),		one(0xF1BF), "IdBc", mfloat | cfloat },
2622  {"fjt", 2,	one(0xF08F),		one(0xF1BF), "IdBc", mfloat | cfloat },
2623  {"fjueq", 2,	one(0xF089),		one(0xF1BF), "IdBc", mfloat | cfloat },
2624  {"fjuge", 2,	one(0xF08B),		one(0xF1BF), "IdBc", mfloat | cfloat },
2625  {"fjugt", 2,	one(0xF08A),		one(0xF1BF), "IdBc", mfloat | cfloat },
2626  {"fjule", 2,	one(0xF08D),		one(0xF1BF), "IdBc", mfloat | cfloat },
2627  {"fjult", 2,	one(0xF08C),		one(0xF1BF), "IdBc", mfloat | cfloat },
2628  {"fjun", 2,	one(0xF088),		one(0xF1BF), "IdBc", mfloat | cfloat },
2629  
2630  {"fcmpb", 4,	two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2631  {"fcmpb", 4,	two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2632  {"fcmpd", 4,	two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2633  {"fcmpd", 4,	two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2634  {"fcmpd", 4,	two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2635  {"fcmpl", 4,	two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2636  {"fcmpl", 4,	two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2637  {"fcmpp", 4,	two(0xF000, 0x4C38), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2638  {"fcmps", 4,	two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2639  {"fcmps", 4,	two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2640  {"fcmpw", 4,	two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2641  {"fcmpw", 4,	two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2642  {"fcmpx", 4,	two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2643  {"fcmpx", 4,	two(0xF000, 0x4838), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2644  
2645  {"fcosb", 4,	two(0xF000, 0x581D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2646  {"fcosd", 4,	two(0xF000, 0x541D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2647  {"fcosl", 4,	two(0xF000, 0x401D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2648  {"fcosp", 4,	two(0xF000, 0x4C1D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2649  {"fcoss", 4,	two(0xF000, 0x441D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2650  {"fcosw", 4,	two(0xF000, 0x501D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2651  {"fcosx", 4,	two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2652  {"fcosx", 4,	two(0xF000, 0x481D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2653  {"fcosx", 4,	two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2654  
2655  {"fcoshb", 4,	two(0xF000, 0x5819), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2656  {"fcoshd", 4,	two(0xF000, 0x5419), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2657  {"fcoshl", 4,	two(0xF000, 0x4019), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2658  {"fcoshp", 4,	two(0xF000, 0x4C19), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2659  {"fcoshs", 4,	two(0xF000, 0x4419), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2660  {"fcoshw", 4,	two(0xF000, 0x5019), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2661  {"fcoshx", 4,	two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2662  {"fcoshx", 4,	two(0xF000, 0x4819), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2663  {"fcoshx", 4,	two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2664  
2665  {"fdbeq", 4,	two(0xF048, 0x0001), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2666  {"fdbf", 4,	two(0xF048, 0x0000), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2667  {"fdbge", 4,	two(0xF048, 0x0013), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2668  {"fdbgl", 4,	two(0xF048, 0x0016), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2669  {"fdbgle", 4,	two(0xF048, 0x0017), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2670  {"fdbgt", 4,	two(0xF048, 0x0012), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2671  {"fdble", 4,	two(0xF048, 0x0015), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2672  {"fdblt", 4,	two(0xF048, 0x0014), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2673  {"fdbne", 4,	two(0xF048, 0x000E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2674  {"fdbnge", 4,	two(0xF048, 0x001C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2675  {"fdbngl", 4,	two(0xF048, 0x0019), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2676  {"fdbngle", 4,	two(0xF048, 0x0018), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2677  {"fdbngt", 4,	two(0xF048, 0x001D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2678  {"fdbnle", 4,	two(0xF048, 0x001A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2679  {"fdbnlt", 4,	two(0xF048, 0x001B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2680  {"fdboge", 4,	two(0xF048, 0x0003), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2681  {"fdbogl", 4,	two(0xF048, 0x0006), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2682  {"fdbogt", 4,	two(0xF048, 0x0002), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2683  {"fdbole", 4,	two(0xF048, 0x0005), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2684  {"fdbolt", 4,	two(0xF048, 0x0004), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2685  {"fdbor", 4,	two(0xF048, 0x0007), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2686  {"fdbseq", 4,	two(0xF048, 0x0011), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2687  {"fdbsf", 4,	two(0xF048, 0x0010), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2688  {"fdbsne", 4,	two(0xF048, 0x001E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2689  {"fdbst", 4,	two(0xF048, 0x001F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2690  {"fdbt", 4,	two(0xF048, 0x000F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2691  {"fdbueq", 4,	two(0xF048, 0x0009), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2692  {"fdbuge", 4,	two(0xF048, 0x000B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2693  {"fdbugt", 4,	two(0xF048, 0x000A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2694  {"fdbule", 4,	two(0xF048, 0x000D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2695  {"fdbult", 4,	two(0xF048, 0x000C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2696  {"fdbun", 4,	two(0xF048, 0x0008), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2697  
2698  {"fdivb", 4,	two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2699  {"fdivb", 4,	two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2700  {"fdivd", 4,	two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2701  {"fdivd", 4,	two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2702  {"fdivd", 4,	two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2703  {"fdivl", 4,	two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2704  {"fdivl", 4,	two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2705  {"fdivp", 4,	two(0xF000, 0x4C20), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2706  {"fdivs", 4,	two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2707  {"fdivs", 4,	two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2708  {"fdivw", 4,	two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2709  {"fdivw", 4,	two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2710  {"fdivx", 4,	two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2711  {"fdivx", 4,	two(0xF000, 0x4820), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2712  
2713  {"fsdivb", 4,	two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2714  {"fsdivb", 4,	two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2715  {"fsdivd", 4,	two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2716  {"fsdivd", 4,	two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2717  {"fsdivd", 4,	two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2718  {"fsdivl", 4,	two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2719  {"fsdivl", 4,	two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2720  {"fsdivp", 4,	two(0xF000, 0x4C60), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2721  {"fsdivs", 4,	two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2722  {"fsdivs", 4,	two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2723  {"fsdivw", 4,	two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2724  {"fsdivw", 4,	two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2725  {"fsdivx", 4,	two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2726  {"fsdivx", 4,	two(0xF000, 0x4860), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2727  
2728  {"fddivb", 4,	two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2729  {"fddivb", 4,	two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2730  {"fddivd", 4,	two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2731  {"fddivd", 4,	two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2732  {"fddivd", 4,	two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2733  {"fddivl", 4,	two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2734  {"fddivl", 4,	two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2735  {"fddivp", 4,	two(0xF000, 0x4C64), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2736  {"fddivs", 4,	two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2737  {"fddivs", 4,	two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2738  {"fddivw", 4,	two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2739  {"fddivw", 4,	two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2740  {"fddivx", 4,	two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2741  {"fddivx", 4,	two(0xF000, 0x4864), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2742  
2743  {"fetoxb", 4,	two(0xF000, 0x5810), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2744  {"fetoxd", 4,	two(0xF000, 0x5410), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2745  {"fetoxl", 4,	two(0xF000, 0x4010), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2746  {"fetoxp", 4,	two(0xF000, 0x4C10), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2747  {"fetoxs", 4,	two(0xF000, 0x4410), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2748  {"fetoxw", 4,	two(0xF000, 0x5010), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2749  {"fetoxx", 4,	two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2750  {"fetoxx", 4,	two(0xF000, 0x4810), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2751  {"fetoxx", 4,	two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2752  
2753  {"fetoxm1b", 4,	two(0xF000, 0x5808), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2754  {"fetoxm1d", 4,	two(0xF000, 0x5408), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2755  {"fetoxm1l", 4,	two(0xF000, 0x4008), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2756  {"fetoxm1p", 4,	two(0xF000, 0x4C08), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2757  {"fetoxm1s", 4,	two(0xF000, 0x4408), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2758  {"fetoxm1w", 4,	two(0xF000, 0x5008), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2759  {"fetoxm1x", 4,	two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2760  {"fetoxm1x", 4,	two(0xF000, 0x4808), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2761  {"fetoxm1x", 4,	two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2762  
2763  {"fgetexpb", 4,	two(0xF000, 0x581E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2764  {"fgetexpd", 4,	two(0xF000, 0x541E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2765  {"fgetexpl", 4,	two(0xF000, 0x401E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2766  {"fgetexpp", 4,	two(0xF000, 0x4C1E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2767  {"fgetexps", 4,	two(0xF000, 0x441E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2768  {"fgetexpw", 4,	two(0xF000, 0x501E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2769  {"fgetexpx", 4,	two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2770  {"fgetexpx", 4,	two(0xF000, 0x481E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2771  {"fgetexpx", 4,	two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2772  
2773  {"fgetmanb", 4,	two(0xF000, 0x581F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2774  {"fgetmand", 4,	two(0xF000, 0x541F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2775  {"fgetmanl", 4,	two(0xF000, 0x401F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2776  {"fgetmanp", 4,	two(0xF000, 0x4C1F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2777  {"fgetmans", 4,	two(0xF000, 0x441F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2778  {"fgetmanw", 4,	two(0xF000, 0x501F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2779  {"fgetmanx", 4,	two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2780  {"fgetmanx", 4,	two(0xF000, 0x481F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2781  {"fgetmanx", 4,	two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2782  
2783  {"fintb", 4,	two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2784  {"fintb", 4,	two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2785  {"fintd", 4,	two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2786  {"fintd", 4,	two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2787  {"fintd", 4,	two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2788  {"fintd", 4,	two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2789  {"fintl", 4,	two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2790  {"fintl", 4,	two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2791  {"fintp", 4,	two(0xF000, 0x4C01), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2792  {"fints", 4,	two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2793  {"fints", 4,	two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2794  {"fintw", 4,	two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2795  {"fintw", 4,	two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2796  {"fintx", 4,	two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2797  {"fintx", 4,	two(0xF000, 0x4801), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2798  {"fintx", 4,	two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2799  
2800  {"fintrzb", 4,	two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2801  {"fintrzb", 4,	two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2802  {"fintrzd", 4,	two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2803  {"fintrzd", 4,	two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
2804  {"fintrzd", 4,	two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2805  {"fintrzd", 4,	two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2806  {"fintrzl", 4,	two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2807  {"fintrzl", 4,	two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2808  {"fintrzp", 4,	two(0xF000, 0x4C03), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2809  {"fintrzs", 4,	two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2810  {"fintrzs", 4,	two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2811  {"fintrzw", 4,	two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2812  {"fintrzw", 4,	two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2813  {"fintrzx", 4,	two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2814  {"fintrzx", 4,	two(0xF000, 0x4803), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2815  {"fintrzx", 4,	two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2816  
2817  {"flog10b", 4,	two(0xF000, 0x5815), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2818  {"flog10d", 4,	two(0xF000, 0x5415), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2819  {"flog10l", 4,	two(0xF000, 0x4015), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2820  {"flog10p", 4,	two(0xF000, 0x4C15), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2821  {"flog10s", 4,	two(0xF000, 0x4415), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2822  {"flog10w", 4,	two(0xF000, 0x5015), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2823  {"flog10x", 4,	two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2824  {"flog10x", 4,	two(0xF000, 0x4815), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2825  {"flog10x", 4,	two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2826  
2827  {"flog2b", 4,	two(0xF000, 0x5816), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2828  {"flog2d", 4,	two(0xF000, 0x5416), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2829  {"flog2l", 4,	two(0xF000, 0x4016), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2830  {"flog2p", 4,	two(0xF000, 0x4C16), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2831  {"flog2s", 4,	two(0xF000, 0x4416), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2832  {"flog2w", 4,	two(0xF000, 0x5016), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2833  {"flog2x", 4,	two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2834  {"flog2x", 4,	two(0xF000, 0x4816), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2835  {"flog2x", 4,	two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2836  
2837  {"flognb", 4,	two(0xF000, 0x5814), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2838  {"flognd", 4,	two(0xF000, 0x5414), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2839  {"flognl", 4,	two(0xF000, 0x4014), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2840  {"flognp", 4,	two(0xF000, 0x4C14), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2841  {"flogns", 4,	two(0xF000, 0x4414), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2842  {"flognw", 4,	two(0xF000, 0x5014), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2843  {"flognx", 4,	two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2844  {"flognx", 4,	two(0xF000, 0x4814), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2845  {"flognx", 4,	two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2846  
2847  {"flognp1b", 4,	two(0xF000, 0x5806), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2848  {"flognp1d", 4,	two(0xF000, 0x5406), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2849  {"flognp1l", 4,	two(0xF000, 0x4006), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2850  {"flognp1p", 4,	two(0xF000, 0x4C06), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2851  {"flognp1s", 4,	two(0xF000, 0x4406), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2852  {"flognp1w", 4,	two(0xF000, 0x5006), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2853  {"flognp1x", 4,	two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2854  {"flognp1x", 4,	two(0xF000, 0x4806), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2855  {"flognp1x", 4,	two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
2856  
2857  {"fmodb", 4,	two(0xF000, 0x5821), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2858  {"fmodd", 4,	two(0xF000, 0x5421), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2859  {"fmodl", 4,	two(0xF000, 0x4021), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2860  {"fmodp", 4,	two(0xF000, 0x4C21), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2861  {"fmods", 4,	two(0xF000, 0x4421), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2862  {"fmodw", 4,	two(0xF000, 0x5021), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2863  {"fmodx", 4,	two(0xF000, 0x0021), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2864  {"fmodx", 4,	two(0xF000, 0x4821), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2865  
2866  {"fmoveb", 4,	two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2867  {"fmoveb", 4,	two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
2868  {"fmoveb", 4,	two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2869  {"fmoveb", 4,	two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7$b", mfloat },
2870  {"fmoved", 4,	two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2871  {"fmoved", 4,	two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7~F", mfloat },
2872  {"fmoved", 4,	two(0xF000, 0x0000), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2873  {"fmoved", 4,	two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2874  {"fmoved", 4,	two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
2875  {"fmovel", 4,	two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2876  {"fmovel", 4,	two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat },
2877  /* FIXME: the next two variants should not permit moving an address
2878     register to anything but the floating point instruction register.  */
2879  {"fmovel", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2880  {"fmovel", 4,	two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat },
2881  {"fmovel", 4,	two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2882  {"fmovel", 4,	two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
2883    /* Move the FP control registers.  */
2884  {"fmovel", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat },
2885  {"fmovel", 4,	two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat },
2886  {"fmovep", 4,	two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2887  {"fmovep", 4,	two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat },
2888  {"fmovep", 4,	two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat },
2889  {"fmoves", 4,	two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2890  {"fmoves", 4,	two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7$f", mfloat },
2891  {"fmoves", 4,	two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2892  {"fmoves", 4,	two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2893  {"fmovew", 4,	two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2894  {"fmovew", 4,	two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7$w", mfloat },
2895  {"fmovew", 4,	two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2896  {"fmovew", 4,	two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2897  {"fmovex", 4,	two(0xF000, 0x0000), two(0xF1FF, 0xE07F), "IiF8F7", mfloat },
2898  {"fmovex", 4,	two(0xF000, 0x4800), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2899  {"fmovex", 4,	two(0xF000, 0x6800), two(0xF1C0, 0xFC7F), "IiF7~x", mfloat },
2900  
2901  {"fsmoveb", 4,	two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2902  {"fsmoveb", 4,	two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2903  {"fsmoveb", 4,	two(0xF000, 0x7840), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2904  {"fsmoved", 4,	two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2905  {"fsmoved", 4,	two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2906  {"fsmoved", 4,	two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2907  {"fsmoved", 4,	two(0xF000, 0x7440), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
2908  {"fsmovel", 4,	two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2909  {"fsmovel", 4,	two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2910  {"fsmovel", 4,	two(0xF000, 0x6040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2911  {"fsmoves", 4,	two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2912  {"fsmoves", 4,	two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2913  {"fsmoves", 4,	two(0xF000, 0x6440), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2914  {"fsmovew", 4,	two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2915  {"fsmovew", 4,	two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2916  {"fsmovew", 4,	two(0xF000, 0x7040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2917  {"fsmovex", 4,	two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2918  {"fsmovex", 4,	two(0xF000, 0x4840), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2919  {"fsmovep", 4,	two(0xF000, 0x4C40), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2920  
2921  {"fdmoveb", 4,	two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2922  {"fdmoveb", 4,	two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2923  {"fdmoveb", 4,	two(0xF000, 0x7844), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2924  {"fdmoved", 4,	two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2925  {"fdmoved", 4,	two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2926  {"fdmoved", 4,	two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2927  {"fdmoved", 4,	two(0xF000, 0x7444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2928  {"fdmovel", 4,	two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2929  {"fdmovel", 4,	two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2930  {"fdmovel", 4,	two(0xF000, 0x6044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2931  {"fdmoves", 4,	two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2932  {"fdmoves", 4,	two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2933  {"fdmoves", 4,	two(0xF000, 0x6444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2934  {"fdmovew", 4,	two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2935  {"fdmovew", 4,	two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2936  {"fdmovew", 4,	two(0xF000, 0x7044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2937  {"fdmovex", 4,	two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2938  {"fdmovex", 4,	two(0xF000, 0x4844), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2939  {"fdmovep", 4,	two(0xF000, 0x4C44), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2940  
2941  {"fmovecrx", 4,	two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat },
2942  
2943  {"fmovemd", 4,	two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizsl3", cfloat },
2944  {"fmovemd", 4,	two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
2945  {"fmovemd", 4,	two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
2946  {"fmovemd", 4,	two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Iil3ys", cfloat },
2947  
2948  {"fmovemx", 4,	two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
2949  {"fmovemx", 4,	two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
2950  {"fmovemx", 4,	two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
2951  {"fmovemx", 4,	two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
2952  {"fmovemx", 4,	two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
2953  {"fmovemx", 4,	two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
2954  {"fmovemx", 4,	two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
2955  {"fmovemx", 4,	two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
2956  {"fmovemx", 4,	two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
2957  {"fmovemx", 4,	two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
2958  {"fmovemx", 4,	two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
2959  {"fmovemx", 4,	two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
2960  
2961  {"fmoveml", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2962  {"fmoveml", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
2963  /* FIXME: In the next instruction, we should only permit %dn if the
2964     target is a single register.  We should only permit %an if the
2965     target is a single %fpiar.  */
2966  {"fmoveml", 4,	two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat },
2967  
2968  {"fmovem", 4,	two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat },
2969  {"fmovem", 4,	two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
2970  {"fmovem", 4,	two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
2971  {"fmovem", 4,	two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat },
2972  
2973  {"fmovem", 4,	two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
2974  {"fmovem", 4,	two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
2975  {"fmovem", 4,	two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
2976  {"fmovem", 4,	two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
2977  {"fmovem", 4,	two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
2978  {"fmovem", 4,	two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
2979  {"fmovem", 4,	two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
2980  {"fmovem", 4,	two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
2981  {"fmovem", 4,	two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
2982  {"fmovem", 4,	two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
2983  {"fmovem", 4,	two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
2984  {"fmovem", 4,	two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
2985  {"fmovem", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2986  {"fmovem", 4,	two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ss8", mfloat },
2987  {"fmovem", 4,	two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
2988  {"fmovem", 4,	two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat },
2989  
2990  {"fmulb", 4,	two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2991  {"fmulb", 4,	two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2992  {"fmuld", 4,	two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2993  {"fmuld", 4,	two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2994  {"fmuld", 4,	two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2995  {"fmull", 4,	two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2996  {"fmull", 4,	two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2997  {"fmulp", 4,	two(0xF000, 0x4C23), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2998  {"fmuls", 4,	two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2999  {"fmuls", 4,	two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3000  {"fmulw", 4,	two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3001  {"fmulw", 4,	two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3002  {"fmulx", 4,	two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3003  {"fmulx", 4,	two(0xF000, 0x4823), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3004  
3005  {"fsmulb", 4,	two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3006  {"fsmulb", 4,	two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3007  {"fsmuld", 4,	two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3008  {"fsmuld", 4,	two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3009  {"fsmuld", 4,	two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3010  {"fsmull", 4,	two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3011  {"fsmull", 4,	two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3012  {"fsmulp", 4,	two(0xF000, 0x4C63), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3013  {"fsmuls", 4,	two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3014  {"fsmuls", 4,	two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3015  {"fsmulw", 4,	two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3016  {"fsmulw", 4,	two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3017  {"fsmulx", 4,	two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3018  {"fsmulx", 4,	two(0xF000, 0x4863), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3019  
3020  {"fdmulb", 4,	two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3021  {"fdmulb", 4,	two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3022  {"fdmuld", 4,	two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3023  {"fdmuld", 4,	two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3024  {"fdmuld", 4,	two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3025  {"fdmull", 4,	two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3026  {"fdmull", 4,	two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3027  {"fdmulp", 4,	two(0xF000, 0x4C67), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3028  {"fdmuls", 4,	two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3029  {"fdmuls", 4,	two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3030  {"fdmulw", 4,	two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3031  {"fdmulw", 4,	two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3032  {"fdmulx", 4,	two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3033  {"fdmulx", 4,	two(0xF000, 0x4867), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3034  
3035  {"fnegb", 4,	two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3036  {"fnegb", 4,	two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3037  {"fnegd", 4,	two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3038  {"fnegd", 4,	two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3039  {"fnegd", 4,	two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3040  {"fnegd", 4,	two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3041  {"fnegl", 4,	two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3042  {"fnegl", 4,	two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3043  {"fnegp", 4,	two(0xF000, 0x4C1A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3044  {"fnegs", 4,	two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3045  {"fnegs", 4,	two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3046  {"fnegw", 4,	two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3047  {"fnegw", 4,	two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3048  {"fnegx", 4,	two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3049  {"fnegx", 4,	two(0xF000, 0x481A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3050  {"fnegx", 4,	two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3051  
3052  {"fsnegb", 4,	two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3053  {"fsnegb", 4,	two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3054  {"fsnegd", 4,	two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3055  {"fsnegd", 4,	two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3056  {"fsnegd", 4,	two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3057  {"fsnegd", 4,	two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3058  {"fsnegl", 4,	two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3059  {"fsnegl", 4,	two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3060  {"fsnegp", 4,	two(0xF000, 0x4C5A), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3061  {"fsnegs", 4,	two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3062  {"fsnegs", 4,	two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3063  {"fsnegw", 4,	two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3064  {"fsnegw", 4,	two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3065  {"fsnegx", 4,	two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3066  {"fsnegx", 4,	two(0xF000, 0x485A), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3067  {"fsnegx", 4,	two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3068  
3069  {"fdnegb", 4,	two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3070  {"fdnegb", 4,	two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3071  {"fdnegd", 4,	two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3072  {"fdnegd", 4,	two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3073  {"fdnegd", 4,	two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3074  {"fdnegd", 4,	two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3075  {"fdnegl", 4,	two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3076  {"fdnegl", 4,	two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3077  {"fdnegp", 4,	two(0xF000, 0x4C5E), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3078  {"fdnegs", 4,	two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3079  {"fdnegs", 4,	two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3080  {"fdnegw", 4,	two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3081  {"fdnegw", 4,	two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3082  {"fdnegx", 4,	two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3083  {"fdnegx", 4,	two(0xF000, 0x485E), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3084  {"fdnegx", 4,	two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3085  
3086  {"fnop", 4,	two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat | cfloat },
3087  
3088  {"fremb", 4,	two(0xF000, 0x5825), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3089  {"fremd", 4,	two(0xF000, 0x5425), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3090  {"freml", 4,	two(0xF000, 0x4025), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3091  {"fremp", 4,	two(0xF000, 0x4C25), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3092  {"frems", 4,	two(0xF000, 0x4425), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3093  {"fremw", 4,	two(0xF000, 0x5025), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3094  {"fremx", 4,	two(0xF000, 0x0025), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3095  {"fremx", 4,	two(0xF000, 0x4825), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3096  
3097  {"frestore", 2,	one(0xF140),		one(0xF1C0), "Id<s", mfloat },
3098  {"frestore", 2,	one(0xF140),		one(0xF1C0), "Idys", cfloat },
3099  
3100  {"fsave", 2,	one(0xF100),		one(0xF1C0), "Id>s", mfloat },
3101  {"fsave", 2,	one(0xF100),		one(0xF1C0), "Idzs", cfloat },
3102  
3103  {"fscaleb", 4,	two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3104  {"fscaled", 4,	two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3105  {"fscalel", 4,	two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3106  {"fscalep", 4,	two(0xF000, 0x4C26), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3107  {"fscales", 4,	two(0xF000, 0x4426), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3108  {"fscalew", 4,	two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3109  {"fscalex", 4,	two(0xF000, 0x0026), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3110  {"fscalex", 4,	two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3111  
3112  /* $ is necessary to prevent the assembler from using PC-relative.
3113     If @ were used, "label: fseq label" could produce "ftrapeq", 2,
3114     because "label" became "pc@label".  */
3115  {"fseq", 4,	two(0xF040, 0x0001), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3116  {"fsf", 4,	two(0xF040, 0x0000), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3117  {"fsge", 4,	two(0xF040, 0x0013), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3118  {"fsgl", 4,	two(0xF040, 0x0016), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3119  {"fsgle", 4,	two(0xF040, 0x0017), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3120  {"fsgt", 4,	two(0xF040, 0x0012), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3121  {"fsle", 4,	two(0xF040, 0x0015), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3122  {"fslt", 4,	two(0xF040, 0x0014), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3123  {"fsne", 4,	two(0xF040, 0x000E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3124  {"fsnge", 4,	two(0xF040, 0x001C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3125  {"fsngl", 4,	two(0xF040, 0x0019), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3126  {"fsngle", 4,	two(0xF040, 0x0018), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3127  {"fsngt", 4,	two(0xF040, 0x001D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3128  {"fsnle", 4,	two(0xF040, 0x001A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3129  {"fsnlt", 4,	two(0xF040, 0x001B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3130  {"fsoge", 4,	two(0xF040, 0x0003), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3131  {"fsogl", 4,	two(0xF040, 0x0006), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3132  {"fsogt", 4,	two(0xF040, 0x0002), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3133  {"fsole", 4,	two(0xF040, 0x0005), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3134  {"fsolt", 4,	two(0xF040, 0x0004), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3135  {"fsor", 4,	two(0xF040, 0x0007), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3136  {"fsseq", 4,	two(0xF040, 0x0011), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3137  {"fssf", 4,	two(0xF040, 0x0010), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3138  {"fssne", 4,	two(0xF040, 0x001E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3139  {"fsst", 4,	two(0xF040, 0x001F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3140  {"fst", 4,	two(0xF040, 0x000F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3141  {"fsueq", 4,	two(0xF040, 0x0009), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3142  {"fsuge", 4,	two(0xF040, 0x000B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3143  {"fsugt", 4,	two(0xF040, 0x000A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3144  {"fsule", 4,	two(0xF040, 0x000D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3145  {"fsult", 4,	two(0xF040, 0x000C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3146  {"fsun", 4,	two(0xF040, 0x0008), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3147  
3148  {"fsgldivb", 4,	two(0xF000, 0x5824), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3149  {"fsgldivd", 4,	two(0xF000, 0x5424), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3150  {"fsgldivl", 4,	two(0xF000, 0x4024), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3151  {"fsgldivp", 4,	two(0xF000, 0x4C24), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3152  {"fsgldivs", 4,	two(0xF000, 0x4424), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3153  {"fsgldivw", 4,	two(0xF000, 0x5024), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3154  {"fsgldivx", 4,	two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3155  {"fsgldivx", 4,	two(0xF000, 0x4824), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3156  {"fsgldivx", 4,	two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3157  
3158  {"fsglmulb", 4,	two(0xF000, 0x5827), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3159  {"fsglmuld", 4,	two(0xF000, 0x5427), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3160  {"fsglmull", 4,	two(0xF000, 0x4027), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3161  {"fsglmulp", 4,	two(0xF000, 0x4C27), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3162  {"fsglmuls", 4,	two(0xF000, 0x4427), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3163  {"fsglmulw", 4,	two(0xF000, 0x5027), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3164  {"fsglmulx", 4,	two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3165  {"fsglmulx", 4,	two(0xF000, 0x4827), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3166  {"fsglmulx", 4,	two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3167  
3168  {"fsinb", 4,	two(0xF000, 0x580E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3169  {"fsind", 4,	two(0xF000, 0x540E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3170  {"fsinl", 4,	two(0xF000, 0x400E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3171  {"fsinp", 4,	two(0xF000, 0x4C0E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3172  {"fsins", 4,	two(0xF000, 0x440E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3173  {"fsinw", 4,	two(0xF000, 0x500E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3174  {"fsinx", 4,	two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3175  {"fsinx", 4,	two(0xF000, 0x480E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3176  {"fsinx", 4,	two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3177  
3178  {"fsincosb", 4,	two(0xF000, 0x5830), two(0xF1C0, 0xFC78), "Ii;bF3F7", mfloat },
3179  {"fsincosd", 4,	two(0xF000, 0x5430), two(0xF1C0, 0xFC78), "Ii;FF3F7", mfloat },
3180  {"fsincosl", 4,	two(0xF000, 0x4030), two(0xF1C0, 0xFC78), "Ii;lF3F7", mfloat },
3181  {"fsincosp", 4,	two(0xF000, 0x4C30), two(0xF1C0, 0xFC78), "Ii;pF3F7", mfloat },
3182  {"fsincoss", 4,	two(0xF000, 0x4430), two(0xF1C0, 0xFC78), "Ii;fF3F7", mfloat },
3183  {"fsincosw", 4,	two(0xF000, 0x5030), two(0xF1C0, 0xFC78), "Ii;wF3F7", mfloat },
3184  {"fsincosx", 4,	two(0xF000, 0x0030), two(0xF1C0, 0xE078), "IiF8F3F7", mfloat },
3185  {"fsincosx", 4,	two(0xF000, 0x4830), two(0xF1C0, 0xFC78), "Ii;xF3F7", mfloat },
3186  
3187  {"fsinhb", 4,	two(0xF000, 0x5802), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3188  {"fsinhd", 4,	two(0xF000, 0x5402), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3189  {"fsinhl", 4,	two(0xF000, 0x4002), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3190  {"fsinhp", 4,	two(0xF000, 0x4C02), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3191  {"fsinhs", 4,	two(0xF000, 0x4402), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3192  {"fsinhw", 4,	two(0xF000, 0x5002), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3193  {"fsinhx", 4,	two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3194  {"fsinhx", 4,	two(0xF000, 0x4802), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3195  {"fsinhx", 4,	two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3196  
3197  {"fsqrtb", 4,	two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3198  {"fsqrtb", 4,	two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3199  {"fsqrtd", 4,	two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3200  {"fsqrtd", 4,	two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3201  {"fsqrtd", 4,	two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3202  {"fsqrtd", 4,	two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3203  {"fsqrtl", 4,	two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3204  {"fsqrtl", 4,	two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3205  {"fsqrtp", 4,	two(0xF000, 0x4C04), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3206  {"fsqrts", 4,	two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3207  {"fsqrts", 4,	two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3208  {"fsqrtw", 4,	two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3209  {"fsqrtw", 4,	two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3210  {"fsqrtx", 4,	two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3211  {"fsqrtx", 4,	two(0xF000, 0x4804), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3212  {"fsqrtx", 4,	two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3213  
3214  {"fssqrtb", 4,	two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3215  {"fssqrtb", 4,	two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3216  {"fssqrtd", 4,	two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3217  {"fssqrtd", 4,	two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3218  {"fssqrtd", 4,	two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3219  {"fssqrtd", 4,	two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3220  {"fssqrtl", 4,	two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3221  {"fssqrtl", 4,	two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3222  {"fssqrtp", 4,	two(0xF000, 0x4C41), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3223  {"fssqrts", 4,	two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3224  {"fssqrts", 4,	two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3225  {"fssqrtw", 4,	two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3226  {"fssqrtw", 4,	two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3227  {"fssqrtx", 4,	two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3228  {"fssqrtx", 4,	two(0xF000, 0x4841), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3229  {"fssqrtx", 4,	two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3230  
3231  {"fdsqrtb", 4,	two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3232  {"fdsqrtb", 4,	two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3233  {"fdsqrtd", 4,	two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3234  {"fdsqrtd", 4,	two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt",   cfloat },
3235  {"fdsqrtd", 4,	two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3236  {"fdsqrtl", 4,	two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3237  {"fdsqrtl", 4,	two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3238  {"fdsqrtp", 4,	two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3239  {"fdsqrts", 4,	two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3240  {"fdsqrts", 4,	two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3241  {"fdsqrtw", 4,	two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3242  {"fdsqrtw", 4,	two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3243  {"fdsqrtx", 4,	two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3244  {"fdsqrtx", 4,	two(0xF000, 0x4845), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3245  {"fdsqrtx", 4,	two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3246  
3247  {"fsubb", 4,	two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3248  {"fsubb", 4,	two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3249  {"fsubd", 4,	two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3250  {"fsubd", 4,	two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3251  {"fsubd", 4,	two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3252  {"fsubl", 4,	two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3253  {"fsubl", 4,	two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3254  {"fsubp", 4,	two(0xF000, 0x4C28), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3255  {"fsubs", 4,	two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3256  {"fsubs", 4,	two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3257  {"fsubw", 4,	two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3258  {"fsubw", 4,	two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3259  {"fsubx", 4,	two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3260  {"fsubx", 4,	two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3261  {"fsubx", 4,	two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3262  
3263  {"fssubb", 4,	two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3264  {"fssubb", 4,	two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3265  {"fssubd", 4,	two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3266  {"fssubd", 4,	two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3267  {"fssubd", 4,	two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3268  {"fssubl", 4,	two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3269  {"fssubl", 4,	two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3270  {"fssubp", 4,	two(0xF000, 0x4C68), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3271  {"fssubs", 4,	two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3272  {"fssubs", 4,	two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3273  {"fssubw", 4,	two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3274  {"fssubw", 4,	two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3275  {"fssubx", 4,	two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3276  {"fssubx", 4,	two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3277  {"fssubx", 4,	two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3278  
3279  {"fdsubb", 4,	two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3280  {"fdsubb", 4,	two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3281  {"fdsubd", 4,	two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3282  {"fdsubd", 4,	two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3283  {"fdsubd", 4,	two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3284  {"fdsubl", 4,	two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3285  {"fdsubl", 4,	two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3286  {"fdsubp", 4,	two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3287  {"fdsubs", 4,	two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3288  {"fdsubs", 4,	two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3289  {"fdsubw", 4,	two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3290  {"fdsubw", 4,	two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3291  {"fdsubx", 4,	two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3292  {"fdsubx", 4,	two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3293  {"fdsubx", 4,	two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiFt",   m68040up },
3294  
3295  {"ftanb", 4,	two(0xF000, 0x580F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3296  {"ftand", 4,	two(0xF000, 0x540F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3297  {"ftanl", 4,	two(0xF000, 0x400F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3298  {"ftanp", 4,	two(0xF000, 0x4C0F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3299  {"ftans", 4,	two(0xF000, 0x440F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3300  {"ftanw", 4,	two(0xF000, 0x500F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3301  {"ftanx", 4,	two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3302  {"ftanx", 4,	two(0xF000, 0x480F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3303  {"ftanx", 4,	two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3304  
3305  {"ftanhb", 4,	two(0xF000, 0x5809), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3306  {"ftanhd", 4,	two(0xF000, 0x5409), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3307  {"ftanhl", 4,	two(0xF000, 0x4009), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3308  {"ftanhp", 4,	two(0xF000, 0x4C09), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3309  {"ftanhs", 4,	two(0xF000, 0x4409), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3310  {"ftanhw", 4,	two(0xF000, 0x5009), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3311  {"ftanhx", 4,	two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3312  {"ftanhx", 4,	two(0xF000, 0x4809), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3313  {"ftanhx", 4,	two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3314  
3315  {"ftentoxb", 4,	two(0xF000, 0x5812), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3316  {"ftentoxd", 4,	two(0xF000, 0x5412), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3317  {"ftentoxl", 4,	two(0xF000, 0x4012), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3318  {"ftentoxp", 4,	two(0xF000, 0x4C12), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3319  {"ftentoxs", 4,	two(0xF000, 0x4412), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3320  {"ftentoxw", 4,	two(0xF000, 0x5012), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3321  {"ftentoxx", 4,	two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3322  {"ftentoxx", 4,	two(0xF000, 0x4812), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3323  {"ftentoxx", 4,	two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3324  
3325  {"ftrapeq", 4,	two(0xF07C, 0x0001), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3326  {"ftrapf", 4,	two(0xF07C, 0x0000), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3327  {"ftrapge", 4,	two(0xF07C, 0x0013), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3328  {"ftrapgl", 4,	two(0xF07C, 0x0016), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3329  {"ftrapgle", 4,	two(0xF07C, 0x0017), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3330  {"ftrapgt", 4,	two(0xF07C, 0x0012), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3331  {"ftraple", 4,	two(0xF07C, 0x0015), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3332  {"ftraplt", 4,	two(0xF07C, 0x0014), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3333  {"ftrapne", 4,	two(0xF07C, 0x000E), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3334  {"ftrapnge", 4,	two(0xF07C, 0x001C), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3335  {"ftrapngl", 4,	two(0xF07C, 0x0019), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3336  {"ftrapngle", 4,two(0xF07C, 0x0018), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3337  {"ftrapngt", 4,	two(0xF07C, 0x001D), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3338  {"ftrapnle", 4,	two(0xF07C, 0x001A), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3339  {"ftrapnlt", 4,	two(0xF07C, 0x001B), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3340  {"ftrapoge", 4,	two(0xF07C, 0x0003), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3341  {"ftrapogl", 4,	two(0xF07C, 0x0006), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3342  {"ftrapogt", 4,	two(0xF07C, 0x0002), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3343  {"ftrapole", 4,	two(0xF07C, 0x0005), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3344  {"ftrapolt", 4,	two(0xF07C, 0x0004), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3345  {"ftrapor", 4,	two(0xF07C, 0x0007), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3346  {"ftrapseq", 4,	two(0xF07C, 0x0011), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3347  {"ftrapsf", 4,	two(0xF07C, 0x0010), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3348  {"ftrapsne", 4,	two(0xF07C, 0x001E), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3349  {"ftrapst", 4,	two(0xF07C, 0x001F), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3350  {"ftrapt", 4,	two(0xF07C, 0x000F), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3351  {"ftrapueq", 4,	two(0xF07C, 0x0009), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3352  {"ftrapuge", 4,	two(0xF07C, 0x000B), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3353  {"ftrapugt", 4,	two(0xF07C, 0x000A), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3354  {"ftrapule", 4,	two(0xF07C, 0x000D), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3355  {"ftrapult", 4,	two(0xF07C, 0x000C), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3356  {"ftrapun", 4,	two(0xF07C, 0x0008), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3357  
3358  {"ftrapeqw", 4,	two(0xF07A, 0x0001), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3359  {"ftrapfw", 4,	two(0xF07A, 0x0000), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3360  {"ftrapgew", 4,	two(0xF07A, 0x0013), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3361  {"ftrapglw", 4,	two(0xF07A, 0x0016), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3362  {"ftrapglew", 4,two(0xF07A, 0x0017), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3363  {"ftrapgtw", 4,	two(0xF07A, 0x0012), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3364  {"ftraplew", 4,	two(0xF07A, 0x0015), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3365  {"ftrapltw", 4,	two(0xF07A, 0x0014), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3366  {"ftrapnew", 4,	two(0xF07A, 0x000E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3367  {"ftrapngew", 4,two(0xF07A, 0x001C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3368  {"ftrapnglw", 4,two(0xF07A, 0x0019), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3369  {"ftrapnglew", 4,two(0xF07A, 0x0018), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3370  {"ftrapngtw", 4,two(0xF07A, 0x001D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3371  {"ftrapnlew", 4,two(0xF07A, 0x001A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3372  {"ftrapnltw", 4,two(0xF07A, 0x001B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3373  {"ftrapogew", 4,two(0xF07A, 0x0003), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3374  {"ftrapoglw", 4,two(0xF07A, 0x0006), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3375  {"ftrapogtw", 4,two(0xF07A, 0x0002), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3376  {"ftrapolew", 4,two(0xF07A, 0x0005), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3377  {"ftrapoltw", 4,two(0xF07A, 0x0004), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3378  {"ftraporw", 4,	two(0xF07A, 0x0007), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3379  {"ftrapseqw", 4,two(0xF07A, 0x0011), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3380  {"ftrapsfw", 4,	two(0xF07A, 0x0010), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3381  {"ftrapsnew", 4,two(0xF07A, 0x001E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3382  {"ftrapstw", 4,	two(0xF07A, 0x001F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3383  {"ftraptw", 4,	two(0xF07A, 0x000F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3384  {"ftrapueqw", 4,two(0xF07A, 0x0009), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3385  {"ftrapugew", 4,two(0xF07A, 0x000B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3386  {"ftrapugtw", 4,two(0xF07A, 0x000A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3387  {"ftrapulew", 4,two(0xF07A, 0x000D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3388  {"ftrapultw", 4,two(0xF07A, 0x000C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3389  {"ftrapunw", 4,	two(0xF07A, 0x0008), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3390  
3391  {"ftrapeql", 4,	two(0xF07B, 0x0001), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3392  {"ftrapfl", 4,	two(0xF07B, 0x0000), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3393  {"ftrapgel", 4,	two(0xF07B, 0x0013), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3394  {"ftrapgll", 4,	two(0xF07B, 0x0016), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3395  {"ftrapglel", 4,two(0xF07B, 0x0017), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3396  {"ftrapgtl", 4,	two(0xF07B, 0x0012), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3397  {"ftraplel", 4,	two(0xF07B, 0x0015), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3398  {"ftrapltl", 4,	two(0xF07B, 0x0014), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3399  {"ftrapnel", 4,	two(0xF07B, 0x000E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3400  {"ftrapngel", 4,two(0xF07B, 0x001C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3401  {"ftrapngll", 4,two(0xF07B, 0x0019), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3402  {"ftrapnglel", 4,two(0xF07B, 0x0018), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3403  {"ftrapngtl", 4,two(0xF07B, 0x001D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3404  {"ftrapnlel", 4,two(0xF07B, 0x001A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3405  {"ftrapnltl", 4,two(0xF07B, 0x001B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3406  {"ftrapogel", 4,two(0xF07B, 0x0003), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3407  {"ftrapogll", 4,two(0xF07B, 0x0006), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3408  {"ftrapogtl", 4,two(0xF07B, 0x0002), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3409  {"ftrapolel", 4,two(0xF07B, 0x0005), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3410  {"ftrapoltl", 4,two(0xF07B, 0x0004), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3411  {"ftraporl", 4,	two(0xF07B, 0x0007), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3412  {"ftrapseql", 4,two(0xF07B, 0x0011), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3413  {"ftrapsfl", 4,	two(0xF07B, 0x0010), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3414  {"ftrapsnel", 4,two(0xF07B, 0x001E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3415  {"ftrapstl", 4,	two(0xF07B, 0x001F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3416  {"ftraptl", 4,	two(0xF07B, 0x000F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3417  {"ftrapueql", 4,two(0xF07B, 0x0009), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3418  {"ftrapugel", 4,two(0xF07B, 0x000B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3419  {"ftrapugtl", 4,two(0xF07B, 0x000A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3420  {"ftrapulel", 4,two(0xF07B, 0x000D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3421  {"ftrapultl", 4,two(0xF07B, 0x000C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3422  {"ftrapunl", 4,	two(0xF07B, 0x0008), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3423  
3424  {"ftstb", 4,	two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Ii;b", mfloat },
3425  {"ftstb", 4,	two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3426  {"ftstd", 4,	two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", cfloat },
3427  {"ftstd", 4,	two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Ii;F", mfloat },
3428  {"ftstd", 4,	two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3429  {"ftstl", 4,	two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Ii;l", mfloat },
3430  {"ftstl", 4,	two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3431  {"ftstp", 4,	two(0xF000, 0x4C3A), two(0xF1C0, 0xFC7F), "Ii;p", mfloat },
3432  {"ftsts", 4,	two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Ii;f", mfloat },
3433  {"ftsts", 4,	two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3434  {"ftstw", 4,	two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Ii;w", mfloat },
3435  {"ftstw", 4,	two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3436  {"ftstx", 4,	two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", mfloat },
3437  {"ftstx", 4,	two(0xF000, 0x483A), two(0xF1C0, 0xFC7F), "Ii;x", mfloat },
3438  
3439  {"ftwotoxb", 4,	two(0xF000, 0x5811), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3440  {"ftwotoxd", 4,	two(0xF000, 0x5411), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3441  {"ftwotoxl", 4,	two(0xF000, 0x4011), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3442  {"ftwotoxp", 4,	two(0xF000, 0x4C11), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3443  {"ftwotoxs", 4,	two(0xF000, 0x4411), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3444  {"ftwotoxw", 4,	two(0xF000, 0x5011), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3445  {"ftwotoxx", 4,	two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3446  {"ftwotoxx", 4,	two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3447  {"ftwotoxx", 4,	two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
3448  
3449  {"halt", 2,	one(0045310),	one(0177777), "",     m68060 | mcfisa_a },
3450  
3451  {"illegal", 2,	one(0045374),	one(0177777), "",     m68000up | mcfisa_a },
3452  {"intouch", 2,	one(0xf428),	one(0xfff8), "As",    mcfisa_b },
3453  
3454  {"jmp", 2,	one(0047300),	one(0177700), "!s", m68000up | mcfisa_a },
3455  
3456  {"jra", 2,	one(0060000),	one(0177400), "Bg", m68000up | mcfisa_a },
3457  {"jra", 2,	one(0047300),	one(0177700), "!s", m68000up | mcfisa_a },
3458  
3459  {"jsr", 2,	one(0047200),	one(0177700), "!s", m68000up | mcfisa_a },
3460  
3461  {"jbsr", 2,	one(0060400),	one(0177400), "Bg", m68000up | mcfisa_a },
3462  {"jbsr", 2,	one(0047200),	one(0177700), "!s", m68000up | mcfisa_a },
3463  
3464  {"lea", 2,	one(0040700),	one(0170700), "!sAd", m68000up | mcfisa_a },
3465  
3466  {"lpstop", 6,	two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
3467  
3468  {"linkw", 4,	one(0047120),	one(0177770), "As#w", m68000up | mcfisa_a },
3469  {"linkl", 6,	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
3470  {"link", 4,	one(0047120),	one(0177770), "As#W", m68000up | mcfisa_a },
3471  {"link", 6,	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
3472  
3473  {"lslb", 2,	one(0160410),	one(0170770), "QdDs", m68000up },
3474  {"lslb", 2,	one(0160450),	one(0170770), "DdDs", m68000up },
3475  {"lslw", 2,	one(0160510),	one(0170770), "QdDs", m68000up },
3476  {"lslw", 2,	one(0160550),	one(0170770), "DdDs", m68000up },
3477  {"lslw", 2,	one(0161700),	one(0177700), "~s",   m68000up },
3478  {"lsll", 2,	one(0160610),	one(0170770), "QdDs", m68000up | mcfisa_a },
3479  {"lsll", 2,	one(0160650),	one(0170770), "DdDs", m68000up | mcfisa_a },
3480  
3481  {"lsrb", 2,	one(0160010),	one(0170770), "QdDs", m68000up },
3482  {"lsrb", 2,	one(0160050),	one(0170770), "DdDs", m68000up },
3483  {"lsrw", 2,	one(0160110),	one(0170770), "QdDs", m68000up },
3484  {"lsrw", 2,	one(0160150),	one(0170770), "DdDs", m68000up },
3485  {"lsrw", 2,	one(0161300),	one(0177700), "~s",   m68000up },
3486  {"lsrl", 2,	one(0160210),	one(0170770), "QdDs", m68000up | mcfisa_a },
3487  {"lsrl", 2,	one(0160250),	one(0170770), "DdDs", m68000up | mcfisa_a },
3488  
3489  {"macw", 4,  	two(0xa080, 0x0000), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac },
3490  {"macw", 4,  	two(0xa080, 0x0200), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac },
3491  {"macw", 4,  	two(0xa080, 0x0000), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac },
3492  {"macw", 4,  	two(0xa000, 0x0000), two(0xf1b0, 0x0900), "uMumiI", mcfmac },
3493  {"macw", 4,  	two(0xa000, 0x0200), two(0xf1b0, 0x0900), "uMumMh", mcfmac },
3494  {"macw", 4,  	two(0xa000, 0x0000), two(0xf1b0, 0x0f00), "uMum", mcfmac },
3495  
3496  {"macw", 4,  	two(0xa000, 0x0000), two(0xf100, 0x0900), "uNuoiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX.  */
3497  {"macw", 4,  	two(0xa000, 0x0200), two(0xf100, 0x0900), "uNuoMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX.  */
3498  {"macw", 4,  	two(0xa000, 0x0000), two(0xf100, 0x0f00), "uNuo4/RneG", mcfemac },/* Ry,Rx,<ea>,accX.  */
3499  {"macw", 4,  	two(0xa000, 0x0000), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX.  */
3500  {"macw", 4,  	two(0xa000, 0x0200), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX.  */
3501  {"macw", 4,  	two(0xa000, 0x0000), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX.  */
3502  
3503  {"macl", 4,  	two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac },
3504  {"macl", 4,  	two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac },
3505  {"macl", 4,  	two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac },
3506  {"macl", 4,  	two(0xa000, 0x0800), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac },
3507  {"macl", 4,  	two(0xa000, 0x0a00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac },
3508  {"macl", 4,  	two(0xa000, 0x0800), two(0xf1b0, 0x0800), "RMRm", mcfmac },
3509  
3510  {"macl", 4,  	two(0xa000, 0x0800), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac },
3511  {"macl", 4,  	two(0xa000, 0x0a00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac },
3512  {"macl", 4,  	two(0xa000, 0x0800), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac },
3513  {"macl", 4,  	two(0xa000, 0x0800), two(0xf130, 0x0900), "RMRmiIeH", mcfemac },
3514  {"macl", 4,  	two(0xa000, 0x0a00), two(0xf130, 0x0900), "RMRmMheH", mcfemac },
3515  {"macl", 4,  	two(0xa000, 0x0800), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
3516  
3517  /* NOTE: The mcf5200 family programmer's reference manual does not
3518     indicate the byte form of the movea instruction is invalid (as it
3519     is on 68000 family cpus).  However, experiments on the 5202 yield
3520     unexpected results.  The value is copied, but it is not sign extended
3521     (as is done with movea.w) and the top three bytes in the address
3522     register are not disturbed.  I don't know if this is the intended
3523     behavior --- it could be a hole in instruction decoding (Motorola
3524     decided not to trap all invalid instructions for performance reasons)
3525     --- but I suspect that it is not.
3526  
3527     I reported this to Motorola ISD Technical Communications Support,
3528     which replied that other coldfire assemblers reject movea.b.  For
3529     this reason I've decided to not allow moveab.
3530  
3531  	jtc@cygnus.com - 97/01/24.  */
3532  
3533  {"moveal", 2,	one(0020100),	one(0170700), "*lAd", m68000up | mcfisa_a },
3534  {"moveaw", 2,	one(0030100),	one(0170700), "*wAd", m68000up | mcfisa_a },
3535  
3536  {"movclrl", 2,	one(0xA1C0),	one(0xf9f0), "eFRs", mcfemac },
3537  
3538  {"movec", 4,	one(0047173),	one(0177777), "R1Jj", m68010up | mcfisa_a },
3539  {"movec", 4,	one(0047173),	one(0177777), "R1#j", m68010up | mcfisa_a },
3540  {"movec", 4,	one(0047172),	one(0177777), "JjR1", m68010up },
3541  {"movec", 4,	one(0047172),	one(0177777), "#jR1", m68010up },
3542  
3543  {"movemw", 4,	one(0044200),	one(0177700), "Lw&s", m68000up },
3544  {"movemw", 4,	one(0044240),	one(0177770), "lw-s", m68000up },
3545  {"movemw", 4,	one(0044200),	one(0177700), "#w>s", m68000up },
3546  {"movemw", 4,	one(0046200),	one(0177700), "<sLw", m68000up },
3547  {"movemw", 4,	one(0046200),	one(0177700), "<s#w", m68000up },
3548  {"moveml", 4,	one(0044300),	one(0177700), "Lw&s", m68000up },
3549  {"moveml", 4,	one(0044340),	one(0177770), "lw-s", m68000up },
3550  {"moveml", 4,	one(0044300),	one(0177700), "#w>s", m68000up },
3551  {"moveml", 4,	one(0046300),	one(0177700), "<sLw", m68000up },
3552  {"moveml", 4,	one(0046300),	one(0177700), "<s#w", m68000up },
3553  /* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns.  */
3554  {"moveml", 4,	one(0044320),	one(0177770), "Lwas", mcfisa_a },
3555  {"moveml", 4,	one(0044320),	one(0177770), "#was", mcfisa_a },
3556  {"moveml", 4,	one(0044350),	one(0177770), "Lwds", mcfisa_a },
3557  {"moveml", 4,	one(0044350),	one(0177770), "#wds", mcfisa_a },
3558  {"moveml", 4,	one(0046320),	one(0177770), "asLw", mcfisa_a },
3559  {"moveml", 4,	one(0046320),	one(0177770), "as#w", mcfisa_a },
3560  {"moveml", 4,	one(0046350),	one(0177770), "dsLw", mcfisa_a },
3561  {"moveml", 4,	one(0046350),	one(0177770), "ds#w", mcfisa_a },
3562  
3563  {"movepw", 2,	one(0000410),	one(0170770), "dsDd", m68000up },
3564  {"movepw", 2,	one(0000610),	one(0170770), "Ddds", m68000up },
3565  {"movepl", 2,	one(0000510),	one(0170770), "dsDd", m68000up },
3566  {"movepl", 2,	one(0000710),	one(0170770), "Ddds", m68000up },
3567  
3568  {"moveq", 2,	one(0070000),	one(0170400), "MsDd", m68000up | mcfisa_a },
3569  {"moveq", 2,	one(0070000),	one(0170400), "#BDd", m68000up | mcfisa_a },
3570  
3571  /* The move opcode can generate the movea and moveq instructions.  */
3572  {"moveb", 2,	one(0010000),	one(0170000), ";b$d", m68000up },
3573  {"moveb", 2,	one(0010000),	one(0170070), "Ds$d", mcfisa_a },
3574  {"moveb", 2,	one(0010020),	one(0170070), "as$d", mcfisa_a },
3575  {"moveb", 2,	one(0010030),	one(0170070), "+s$d", mcfisa_a },
3576  {"moveb", 2,	one(0010040),	one(0170070), "-s$d", mcfisa_a },
3577  {"moveb", 2,	one(0010000),	one(0170000), "nsqd", mcfisa_a },
3578  {"moveb", 2,	one(0010000),	one(0170700), "obDd", mcfisa_a },
3579  {"moveb", 2,	one(0010200),	one(0170700), "obad", mcfisa_a },
3580  {"moveb", 2,	one(0010300),	one(0170700), "ob+d", mcfisa_a },
3581  {"moveb", 2,	one(0010400),	one(0170700), "ob-d", mcfisa_a },
3582  {"moveb", 2,	one(0010000),	one(0170000), "obnd", mcfisa_b },
3583  
3584  {"movew", 2,	one(0030000),	one(0170000), "*w%d", m68000up },
3585  {"movew", 2,	one(0030000),	one(0170000), "ms%d", mcfisa_a },
3586  {"movew", 2,	one(0030000),	one(0170000), "nspd", mcfisa_a },
3587  {"movew", 2,	one(0030000),	one(0170000), "owmd", mcfisa_a },
3588  {"movew", 2,	one(0030000),	one(0170000), "ownd", mcfisa_b },
3589  {"movew", 2,	one(0040300),	one(0177700), "Ss$s", m68000up },
3590  {"movew", 2,	one(0040300),	one(0177770), "SsDs", mcfisa_a },
3591  {"movew", 2,	one(0041300),	one(0177700), "Cs$s", m68010up },
3592  {"movew", 2,	one(0041300),	one(0177770), "CsDs", mcfisa_a },
3593  {"movew", 2,	one(0042300),	one(0177700), ";wCd", m68000up },
3594  {"movew", 2,	one(0042300),	one(0177700), "DsCd", mcfisa_a },
3595  {"movew", 4,	one(0042374),	one(0177777), "#wCd", mcfisa_a },
3596  {"movew", 2,	one(0043300),	one(0177700), ";wSd", m68000up },
3597  {"movew", 2,	one(0043300),	one(0177700), "DsSd", mcfisa_a },
3598  {"movew", 4,	one(0043374),	one(0177777), "#wSd", mcfisa_a },
3599  
3600  {"movel", 2,	one(0070000),	one(0170400), "MsDd", m68000up | mcfisa_a },
3601  {"movel", 2,	one(0020000),	one(0170000), "*l%d", m68000up },
3602  {"movel", 2,	one(0020000),	one(0170000), "ms%d", mcfisa_a },
3603  {"movel", 2,	one(0020000),	one(0170000), "nspd", mcfisa_a },
3604  {"movel", 2,	one(0020000),	one(0170000), "olmd", mcfisa_a },
3605  {"movel", 2,	one(0020000),	one(0170000), "olnd", mcfisa_b },
3606  {"movel", 2,	one(0047140),	one(0177770), "AsUd", m68000up | mcfusp },
3607  {"movel", 2,	one(0047150),	one(0177770), "UdAs", m68000up | mcfusp },
3608  {"movel", 2,	one(0120600),	one(0177760), "EsRs", mcfmac },
3609  {"movel", 2,	one(0120400),	one(0177760), "RsEs", mcfmac },
3610  {"movel", 6,	one(0120474),	one(0177777), "#lEs", mcfmac },
3611  {"movel", 2,	one(0124600),	one(0177760), "GsRs", mcfmac },
3612  {"movel", 2,	one(0124400),	one(0177760), "RsGs", mcfmac },
3613  {"movel", 6,	one(0124474),	one(0177777), "#lGs", mcfmac },
3614  {"movel", 2,	one(0126600),	one(0177760), "HsRs", mcfmac },
3615  {"movel", 2,	one(0126400),	one(0177760), "RsHs", mcfmac },
3616  {"movel", 6,	one(0126474),	one(0177777), "#lHs", mcfmac },
3617  {"movel", 2,	one(0124700),	one(0177777), "GsCs", mcfmac },
3618  
3619  {"movel", 2,	one(0xa180),	one(0xf9f0), "eFRs", mcfemac }, /* ACCx,Rx.  */
3620  {"movel", 2,	one(0xab80),	one(0xfbf0), "g]Rs", mcfemac }, /* ACCEXTx,Rx.  */
3621  {"movel", 2,	one(0xa980),	one(0xfff0), "G-Rs", mcfemac }, /* macsr,Rx.  */
3622  {"movel", 2,	one(0xad80),	one(0xfff0), "H-Rs", mcfemac }, /* mask,Rx.  */
3623  {"movel", 2,	one(0xa110),	one(0xf9fc), "efeF", mcfemac }, /* ACCy,ACCx.  */
3624  {"movel", 2,	one(0xa9c0),	one(0xffff), "G-C-", mcfemac }, /* macsr,ccr.  */
3625  {"movel", 2,	one(0xa100),	one(0xf9f0), "RseF", mcfemac }, /* Rx,ACCx.  */
3626  {"movel", 6,	one(0xa13c),	one(0xf9ff), "#leF", mcfemac }, /* #,ACCx.  */
3627  {"movel", 2,	one(0xab00),	one(0xfbc0), "Rsg]", mcfemac }, /* Rx,ACCEXTx.  */
3628  {"movel", 6,	one(0xab3c),	one(0xfbff), "#lg]", mcfemac }, /* #,ACCEXTx.  */
3629  {"movel", 2,	one(0xa900),	one(0xffc0), "RsG-", mcfemac }, /* Rx,macsr.  */
3630  {"movel", 6,	one(0xa93c),	one(0xffff), "#lG-", mcfemac }, /* #,macsr.  */
3631  {"movel", 2,	one(0xad00),	one(0xffc0), "RsH-", mcfemac }, /* Rx,mask.  */
3632  {"movel", 6,	one(0xad3c),	one(0xffff), "#lH-", mcfemac }, /* #,mask.  */
3633  
3634  {"move", 2,	one(0030000),	one(0170000), "*w%d", m68000up },
3635  {"move", 2,	one(0030000),	one(0170000), "ms%d", mcfisa_a },
3636  {"move", 2,	one(0030000),	one(0170000), "nspd", mcfisa_a },
3637  {"move", 2,	one(0030000),	one(0170000), "owmd", mcfisa_a },
3638  {"move", 2,	one(0030000),	one(0170000), "ownd", mcfisa_b },
3639  {"move", 2,	one(0040300),	one(0177700), "Ss$s", m68000up },
3640  {"move", 2,	one(0040300),	one(0177770), "SsDs", mcfisa_a },
3641  {"move", 2,	one(0041300),	one(0177700), "Cs$s", m68010up },
3642  {"move", 2,	one(0041300),	one(0177770), "CsDs", mcfisa_a },
3643  {"move", 2,	one(0042300),	one(0177700), ";wCd", m68000up },
3644  {"move", 2,	one(0042300),	one(0177700), "DsCd", mcfisa_a },
3645  {"move", 4,	one(0042374),	one(0177777), "#wCd", mcfisa_a },
3646  {"move", 2,	one(0043300),	one(0177700), ";wSd", m68000up },
3647  {"move", 2,	one(0043300),	one(0177700), "DsSd", mcfisa_a },
3648  {"move", 4,	one(0043374),	one(0177777), "#wSd", mcfisa_a },
3649  
3650  {"move", 2,	one(0047140),	one(0177770), "AsUd", m68000up },
3651  {"move", 2,	one(0047150),	one(0177770), "UdAs", m68000up },
3652  
3653  {"mov3ql", 2,	one(0120500),	one(0170700), "xd%s", mcfisa_b },
3654  {"mvsb", 2,	one(0070400),	one(0170700), "*bDd", mcfisa_b },
3655  {"mvsw", 2,	one(0070500),	one(0170700), "*wDd", mcfisa_b },
3656  {"mvzb", 2,	one(0070600),	one(0170700), "*bDd", mcfisa_b },
3657  {"mvzw", 2,	one(0070700),	one(0170700), "*wDd", mcfisa_b },
3658  
3659  {"movesb", 4,	two(0007000, 0),     two(0177700, 07777), "~sR1", m68010up },
3660  {"movesb", 4,	two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up },
3661  {"movesw", 4,	two(0007100, 0),     two(0177700, 07777), "~sR1", m68010up },
3662  {"movesw", 4,	two(0007100, 04000), two(0177700, 07777), "R1~s", m68010up },
3663  {"movesl", 4,	two(0007200, 0),     two(0177700, 07777), "~sR1", m68010up },
3664  {"movesl", 4,	two(0007200, 04000), two(0177700, 07777), "R1~s", m68010up },
3665  
3666  {"move16", 4,	two(0xf620, 0x8000), two(0xfff8, 0x8fff), "+s+1", m68040up },
3667  {"move16", 2,	one(0xf600),		one(0xfff8), "+s_L", m68040up },
3668  {"move16", 2,	one(0xf608),		one(0xfff8), "_L+s", m68040up },
3669  {"move16", 2,	one(0xf610),		one(0xfff8), "as_L", m68040up },
3670  {"move16", 2,	one(0xf618),		one(0xfff8), "_Las", m68040up },
3671  
3672  {"msacw", 4,  	two(0xa080, 0x0100), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac },
3673  {"msacw", 4,  	two(0xa080, 0x0300), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac },
3674  {"msacw", 4,  	two(0xa080, 0x0100), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac },
3675  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf1b0, 0x0900), "uMumiI", mcfmac },
3676  {"msacw", 4,  	two(0xa000, 0x0300), two(0xf1b0, 0x0900), "uMumMh", mcfmac },
3677  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf1b0, 0x0f00), "uMum", mcfmac },
3678  
3679  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf100, 0x0900), "uMumiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX.  */
3680  {"msacw", 4,  	two(0xa000, 0x0300), two(0xf100, 0x0900), "uMumMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX.  */
3681  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf100, 0x0f00), "uMum4/RneG", mcfemac },/* Ry,Rx,<ea>,accX.  */
3682  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX.  */
3683  {"msacw", 4,  	two(0xa000, 0x0300), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX.  */
3684  {"msacw", 4,  	two(0xa000, 0x0100), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX.  */
3685  
3686  {"msacl", 4,  	two(0xa080, 0x0900), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac },
3687  {"msacl", 4,  	two(0xa080, 0x0b00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac },
3688  {"msacl", 4,  	two(0xa080, 0x0900), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac },
3689  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac },
3690  {"msacl", 4,  	two(0xa000, 0x0b00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac },
3691  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf1b0, 0x0800), "RMRm", mcfmac },
3692  
3693  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac },
3694  {"msacl", 4,  	two(0xa000, 0x0b00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac },
3695  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac },
3696  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf130, 0x0900), "RMRmiIeH", mcfemac },
3697  {"msacl", 4,  	two(0xa000, 0x0b00), two(0xf130, 0x0900), "RMRmMheH", mcfemac },
3698  {"msacl", 4,  	two(0xa000, 0x0900), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
3699  
3700  {"mulsw", 2,	one(0140700),		one(0170700), ";wDd", m68000up|mcfisa_a },
3701  {"mulsl", 4,	two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3702  {"mulsl", 4,	two(0046000,004000), two(0177700,0107770), "qsD1", mcfisa_a },
3703  {"mulsl", 4,	two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
3704  
3705  {"muluw", 2,	one(0140300),		one(0170700), ";wDd", m68000up|mcfisa_a },
3706  {"mulul", 4,	two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3707  {"mulul", 4,	two(0046000,000000), two(0177700,0107770), "qsD1", mcfisa_a },
3708  {"mulul", 4,	two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
3709  
3710  {"nbcd", 2,	one(0044000),	one(0177700), "$s", m68000up },
3711  
3712  {"negb", 2,	one(0042000),	one(0177700), "$s", m68000up },
3713  {"negw", 2,	one(0042100),	one(0177700), "$s", m68000up },
3714  {"negl", 2,	one(0042200),	one(0177700), "$s", m68000up },
3715  {"negl", 2,	one(0042200),	one(0177700), "Ds", mcfisa_a},
3716  
3717  {"negxb", 2,	one(0040000),	one(0177700), "$s", m68000up },
3718  {"negxw", 2,	one(0040100),	one(0177700), "$s", m68000up },
3719  {"negxl", 2,	one(0040200),	one(0177700), "$s", m68000up },
3720  {"negxl", 2,	one(0040200),	one(0177700), "Ds", mcfisa_a},
3721  
3722  {"nop", 2,	one(0047161),	one(0177777), "", m68000up | mcfisa_a},
3723  
3724  {"notb", 2,	one(0043000),	one(0177700), "$s", m68000up },
3725  {"notw", 2,	one(0043100),	one(0177700), "$s", m68000up },
3726  {"notl", 2,	one(0043200),	one(0177700), "$s", m68000up },
3727  {"notl", 2,	one(0043200),	one(0177700), "Ds", mcfisa_a},
3728  
3729  {"orib", 4,	one(0000000),	one(0177700), "#b$s", m68000up },
3730  {"orib", 4,	one(0000074),	one(0177777), "#bCs", m68000up },
3731  {"oriw", 4,	one(0000100),	one(0177700), "#w$s", m68000up },
3732  {"oriw", 4,	one(0000174),	one(0177777), "#wSs", m68000up },
3733  {"oril", 6,	one(0000200),	one(0177700), "#l$s", m68000up },
3734  {"oril", 6,	one(0000200),	one(0177700), "#lDs", mcfisa_a },
3735  {"ori", 4,	one(0000074),	one(0177777), "#bCs", m68000up },
3736  {"ori", 4,	one(0000100),	one(0177700), "#w$s", m68000up },
3737  {"ori", 4,	one(0000174),	one(0177777), "#wSs", m68000up },
3738  
3739  /* The or opcode can generate the ori instruction.  */
3740  {"orb", 4,	one(0000000),	one(0177700), "#b$s", m68000up },
3741  {"orb", 4,	one(0000074),	one(0177777), "#bCs", m68000up },
3742  {"orb", 2,	one(0100000),	one(0170700), ";bDd", m68000up },
3743  {"orb", 2,	one(0100400),	one(0170700), "Dd~s", m68000up },
3744  {"orw", 4,	one(0000100),	one(0177700), "#w$s", m68000up },
3745  {"orw", 4,	one(0000174),	one(0177777), "#wSs", m68000up },
3746  {"orw", 2,	one(0100100),	one(0170700), ";wDd", m68000up },
3747  {"orw", 2,	one(0100500),	one(0170700), "Dd~s", m68000up },
3748  {"orl", 6,	one(0000200),	one(0177700), "#l$s", m68000up },
3749  {"orl", 6,	one(0000200),	one(0177700), "#lDs", mcfisa_a },
3750  {"orl", 2,	one(0100200),	one(0170700), ";lDd", m68000up | mcfisa_a },
3751  {"orl", 2,	one(0100600),	one(0170700), "Dd~s", m68000up | mcfisa_a },
3752  {"or", 4,	one(0000074),	one(0177777), "#bCs", m68000up },
3753  {"or", 4,	one(0000100),	one(0177700), "#w$s", m68000up },
3754  {"or", 4,	one(0000174),	one(0177777), "#wSs", m68000up },
3755  {"or", 2,	one(0100100),	one(0170700), ";wDd", m68000up },
3756  {"or", 2,	one(0100500),	one(0170700), "Dd~s", m68000up },
3757  
3758  {"pack", 4,	one(0100500),	one(0170770), "DsDd#w", m68020up },
3759  {"pack", 4,	one(0100510),	one(0170770), "-s-d#w", m68020up },
3760  
3761  {"pbac", 2,	one(0xf087),	one(0xffbf), "Bc", m68851 },
3762  {"pbacw", 2,	one(0xf087),	one(0xffff), "BW", m68851 },
3763  {"pbas", 2,	one(0xf086),	one(0xffbf), "Bc", m68851 },
3764  {"pbasw", 2,	one(0xf086),	one(0xffff), "BW", m68851 },
3765  {"pbbc", 2,	one(0xf081),	one(0xffbf), "Bc", m68851 },
3766  {"pbbcw", 2,	one(0xf081),	one(0xffff), "BW", m68851 },
3767  {"pbbs", 2,	one(0xf080),	one(0xffbf), "Bc", m68851 },
3768  {"pbbsw", 2,	one(0xf080),	one(0xffff), "BW", m68851 },
3769  {"pbcc", 2,	one(0xf08f),	one(0xffbf), "Bc", m68851 },
3770  {"pbccw", 2,	one(0xf08f),	one(0xffff), "BW", m68851 },
3771  {"pbcs", 2,	one(0xf08e),	one(0xffbf), "Bc", m68851 },
3772  {"pbcsw", 2,	one(0xf08e),	one(0xffff), "BW", m68851 },
3773  {"pbgc", 2,	one(0xf08d),	one(0xffbf), "Bc", m68851 },
3774  {"pbgcw", 2,	one(0xf08d),	one(0xffff), "BW", m68851 },
3775  {"pbgs", 2,	one(0xf08c),	one(0xffbf), "Bc", m68851 },
3776  {"pbgsw", 2,	one(0xf08c),	one(0xffff), "BW", m68851 },
3777  {"pbic", 2,	one(0xf08b),	one(0xffbf), "Bc", m68851 },
3778  {"pbicw", 2,	one(0xf08b),	one(0xffff), "BW", m68851 },
3779  {"pbis", 2,	one(0xf08a),	one(0xffbf), "Bc", m68851 },
3780  {"pbisw", 2,	one(0xf08a),	one(0xffff), "BW", m68851 },
3781  {"pblc", 2,	one(0xf083),	one(0xffbf), "Bc", m68851 },
3782  {"pblcw", 2,	one(0xf083),	one(0xffff), "BW", m68851 },
3783  {"pbls", 2,	one(0xf082),	one(0xffbf), "Bc", m68851 },
3784  {"pblsw", 2,	one(0xf082),	one(0xffff), "BW", m68851 },
3785  {"pbsc", 2,	one(0xf085),	one(0xffbf), "Bc", m68851 },
3786  {"pbscw", 2,	one(0xf085),	one(0xffff), "BW", m68851 },
3787  {"pbss", 2,	one(0xf084),	one(0xffbf), "Bc", m68851 },
3788  {"pbssw", 2,	one(0xf084),	one(0xffff), "BW", m68851 },
3789  {"pbwc", 2,	one(0xf089),	one(0xffbf), "Bc", m68851 },
3790  {"pbwcw", 2,	one(0xf089),	one(0xffff), "BW", m68851 },
3791  {"pbws", 2,	one(0xf088),	one(0xffbf), "Bc", m68851 },
3792  {"pbwsw", 2,	one(0xf088),	one(0xffff), "BW", m68851 },
3793  
3794  {"pdbac", 4,	two(0xf048, 0x0007),	two(0xfff8, 0xffff), "DsBw", m68851 },
3795  {"pdbas", 4,	two(0xf048, 0x0006),	two(0xfff8, 0xffff), "DsBw", m68851 },
3796  {"pdbbc", 4,	two(0xf048, 0x0001),	two(0xfff8, 0xffff), "DsBw", m68851 },
3797  {"pdbbs", 4,	two(0xf048, 0x0000),	two(0xfff8, 0xffff), "DsBw", m68851 },
3798  {"pdbcc", 4,	two(0xf048, 0x000f),	two(0xfff8, 0xffff), "DsBw", m68851 },
3799  {"pdbcs", 4,	two(0xf048, 0x000e),	two(0xfff8, 0xffff), "DsBw", m68851 },
3800  {"pdbgc", 4,	two(0xf048, 0x000d),	two(0xfff8, 0xffff), "DsBw", m68851 },
3801  {"pdbgs", 4,	two(0xf048, 0x000c),	two(0xfff8, 0xffff), "DsBw", m68851 },
3802  {"pdbic", 4,	two(0xf048, 0x000b),	two(0xfff8, 0xffff), "DsBw", m68851 },
3803  {"pdbis", 4,	two(0xf048, 0x000a),	two(0xfff8, 0xffff), "DsBw", m68851 },
3804  {"pdblc", 4,	two(0xf048, 0x0003),	two(0xfff8, 0xffff), "DsBw", m68851 },
3805  {"pdbls", 4,	two(0xf048, 0x0002),	two(0xfff8, 0xffff), "DsBw", m68851 },
3806  {"pdbsc", 4,	two(0xf048, 0x0005),	two(0xfff8, 0xffff), "DsBw", m68851 },
3807  {"pdbss", 4,	two(0xf048, 0x0004),	two(0xfff8, 0xffff), "DsBw", m68851 },
3808  {"pdbwc", 4,	two(0xf048, 0x0009),	two(0xfff8, 0xffff), "DsBw", m68851 },
3809  {"pdbws", 4,	two(0xf048, 0x0008),	two(0xfff8, 0xffff), "DsBw", m68851 },
3810  
3811  {"pea", 2,	one(0044100),		one(0177700), "!s", m68000up|mcfisa_a },
3812  
3813  {"pflusha", 2,	one(0xf518),		one(0xfff8), "", m68040up },
3814  {"pflusha", 4,	two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
3815  
3816  {"pflush", 4,   two(0xf000,0x3010), two(0xffc0,0xfe10), "T3T9", m68030|m68851 },
3817  {"pflush", 4,   two(0xf000,0x3810), two(0xffc0,0xfe10), "T3T9&s", m68030|m68851 },
3818  {"pflush", 4,   two(0xf000,0x3008), two(0xffc0,0xfe18), "D3T9", m68030|m68851 },
3819  {"pflush", 4,   two(0xf000,0x3808), two(0xffc0,0xfe18), "D3T9&s", m68030|m68851 },
3820  {"pflush", 4,   two(0xf000,0x3000), two(0xffc0,0xfe1e), "f3T9", m68030|m68851 },
3821  {"pflush", 4,   two(0xf000,0x3800), two(0xffc0,0xfe1e), "f3T9&s", m68030|m68851 },
3822  {"pflush", 2,	one(0xf508),		one(0xfff8), "as", m68040up },
3823  {"pflush", 2,	one(0xf508),		one(0xfff8), "As", m68040up },
3824  
3825  {"pflushan", 2,	one(0xf510),		one(0xfff8), "", m68040up },
3826  {"pflushn", 2,	one(0xf500),		one(0xfff8), "as", m68040up },
3827  {"pflushn", 2,	one(0xf500),		one(0xfff8), "As", m68040up },
3828  
3829  {"pflushr", 4,	two(0xf000, 0xa000), two(0xffc0, 0xffff), "|s", m68851 },
3830  
3831  {"pflushs", 4,	two(0xf000, 0x3410), two(0xfff8, 0xfe10), "T3T9", m68851 },
3832  {"pflushs", 4,	two(0xf000, 0x3c10), two(0xfff8, 0xfe10), "T3T9&s", m68851 },
3833  {"pflushs", 4,	two(0xf000, 0x3408), two(0xfff8, 0xfe18), "D3T9", m68851 },
3834  {"pflushs", 4,	two(0xf000, 0x3c08), two(0xfff8, 0xfe18), "D3T9&s", m68851 },
3835  {"pflushs", 4,	two(0xf000, 0x3400), two(0xfff8, 0xfe1e), "f3T9", m68851 },
3836  {"pflushs", 4,	two(0xf000, 0x3c00), two(0xfff8, 0xfe1e), "f3T9&s", m68851 },
3837  
3838  {"ploadr", 4,   two(0xf000,0x2210), two(0xffc0,0xfff0), "T3&s", m68030|m68851 },
3839  {"ploadr", 4,   two(0xf000,0x2208), two(0xffc0,0xfff8), "D3&s", m68030|m68851 },
3840  {"ploadr", 4,   two(0xf000,0x2200), two(0xffc0,0xfffe), "f3&s", m68030|m68851 },
3841  {"ploadw", 4,   two(0xf000,0x2010), two(0xffc0,0xfff0), "T3&s", m68030|m68851 },
3842  {"ploadw", 4,   two(0xf000,0x2008), two(0xffc0,0xfff8), "D3&s", m68030|m68851 },
3843  {"ploadw", 4,   two(0xf000,0x2000), two(0xffc0,0xfffe), "f3&s", m68030|m68851 },
3844  
3845  {"plpar", 2,	one(0xf5c8),		one(0xfff8), "as", m68060 },
3846  {"plpaw", 2,	one(0xf588),		one(0xfff8), "as", m68060 },
3847  
3848  {"pmove", 4,    two(0xf000,0x4000), two(0xffc0,0xffff), "*l08", m68030|m68851 },
3849  {"pmove", 4,    two(0xf000,0x5c00), two(0xffc0,0xffff), "*w18", m68851 },
3850  {"pmove", 4,    two(0xf000,0x4000), two(0xffc0,0xe3ff), "*b28", m68851 },
3851  {"pmove", 4,    two(0xf000,0x4200), two(0xffc0,0xffff), "08%s", m68030|m68851 },
3852  {"pmove", 4,    two(0xf000,0x5e00), two(0xffc0,0xffff), "18%s", m68851 },
3853  {"pmove", 4,    two(0xf000,0x4200), two(0xffc0,0xe3ff), "28%s", m68851 },
3854  {"pmove", 4,    two(0xf000,0x4000), two(0xffc0,0xe3ff), "|sW8", m68030|m68851 },
3855  {"pmove", 4,    two(0xf000,0x4200), two(0xffc0,0xe3ff), "W8~s", m68030|m68851 },
3856  {"pmove", 4,    two(0xf000,0x6200), two(0xffc0,0xe3e3), "*wX3", m68851 },
3857  {"pmove", 4,    two(0xf000,0x6000), two(0xffc0,0xe3e3), "X3%s", m68851 },
3858  {"pmove", 4,    two(0xf000,0x6000), two(0xffc0,0xffff), "*wY8", m68030|m68851 },
3859  {"pmove", 4,    two(0xf000,0x6200), two(0xffc0,0xffff), "Y8%s", m68030|m68851 },
3860  {"pmove", 4,    two(0xf000,0x6600), two(0xffc0,0xffff), "Z8%s", m68851 },
3861  {"pmove", 4,    two(0xf000,0x0800), two(0xffc0,0xfbff), "*l38", m68030 },
3862  {"pmove", 4,    two(0xf000,0x0a00), two(0xffc0,0xfbff), "38%s", m68030 },
3863  
3864  {"pmovefd", 4,	two(0xf000, 0x4100),	two(0xffc0, 0xe3ff), "*l08", m68030 },
3865  {"pmovefd", 4,	two(0xf000, 0x4100),	two(0xffc0, 0xe3ff), "|sW8", m68030 },
3866  {"pmovefd", 4,	two(0xf000, 0x0900),	two(0xffc0, 0xfbff), "*l38", m68030 },
3867  
3868  {"prestore", 2,	one(0xf140),		one(0xffc0), "<s", m68851 },
3869  
3870  {"psave", 2,	one(0xf100),		one(0xffc0), ">s", m68851 },
3871  
3872  {"psac", 4,	two(0xf040, 0x0007),	two(0xffc0, 0xffff), "$s", m68851 },
3873  {"psas", 4,	two(0xf040, 0x0006),	two(0xffc0, 0xffff), "$s", m68851 },
3874  {"psbc", 4,	two(0xf040, 0x0001),	two(0xffc0, 0xffff), "$s", m68851 },
3875  {"psbs", 4,	two(0xf040, 0x0000),	two(0xffc0, 0xffff), "$s", m68851 },
3876  {"pscc", 4,	two(0xf040, 0x000f),	two(0xffc0, 0xffff), "$s", m68851 },
3877  {"pscs", 4,	two(0xf040, 0x000e),	two(0xffc0, 0xffff), "$s", m68851 },
3878  {"psgc", 4,	two(0xf040, 0x000d),	two(0xffc0, 0xffff), "$s", m68851 },
3879  {"psgs", 4,	two(0xf040, 0x000c),	two(0xffc0, 0xffff), "$s", m68851 },
3880  {"psic", 4,	two(0xf040, 0x000b),	two(0xffc0, 0xffff), "$s", m68851 },
3881  {"psis", 4,	two(0xf040, 0x000a),	two(0xffc0, 0xffff), "$s", m68851 },
3882  {"pslc", 4,	two(0xf040, 0x0003),	two(0xffc0, 0xffff), "$s", m68851 },
3883  {"psls", 4,	two(0xf040, 0x0002),	two(0xffc0, 0xffff), "$s", m68851 },
3884  {"pssc", 4,	two(0xf040, 0x0005),	two(0xffc0, 0xffff), "$s", m68851 },
3885  {"psss", 4,	two(0xf040, 0x0004),	two(0xffc0, 0xffff), "$s", m68851 },
3886  {"pswc", 4,	two(0xf040, 0x0009),	two(0xffc0, 0xffff), "$s", m68851 },
3887  {"psws", 4,	two(0xf040, 0x0008),	two(0xffc0, 0xffff), "$s", m68851 },
3888  
3889  {"ptestr", 4, 	two(0xf000,0x8210), two(0xffc0, 0xe3f0), "T3&st8", m68030|m68851 },
3890  {"ptestr", 4, 	two(0xf000,0x8310), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 },
3891  {"ptestr", 4, 	two(0xf000,0x8208), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 },
3892  {"ptestr", 4, 	two(0xf000,0x8308), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 },
3893  {"ptestr", 4, 	two(0xf000,0x8200), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 },
3894  {"ptestr", 4, 	two(0xf000,0x8300), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 },
3895  {"ptestr", 2,	one(0xf568),		one(0xfff8), "as", m68040 },
3896  
3897  {"ptestw", 4, 	two(0xf000,0x8010), two(0xffc0,0xe3f0), "T3&st8", m68030|m68851 },
3898  {"ptestw", 4, 	two(0xf000,0x8110), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 },
3899  {"ptestw", 4, 	two(0xf000,0x8008), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 },
3900  {"ptestw", 4, 	two(0xf000,0x8108), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 },
3901  {"ptestw", 4, 	two(0xf000,0x8000), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 },
3902  {"ptestw", 4, 	two(0xf000,0x8100), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 },
3903  {"ptestw", 2,	one(0xf548),		one(0xfff8), "as", m68040 },
3904  
3905  {"ptrapacw", 6,	two(0xf07a, 0x0007),	two(0xffff, 0xffff), "#w", m68851 },
3906  {"ptrapacl", 6,	two(0xf07b, 0x0007),	two(0xffff, 0xffff), "#l", m68851 },
3907  {"ptrapac", 4,	two(0xf07c, 0x0007),	two(0xffff, 0xffff), "",   m68851 },
3908  
3909  {"ptrapasw", 6,	two(0xf07a, 0x0006),	two(0xffff, 0xffff), "#w", m68851 },
3910  {"ptrapasl", 6,	two(0xf07b, 0x0006),	two(0xffff, 0xffff), "#l", m68851 },
3911  {"ptrapas", 4,	two(0xf07c, 0x0006),	two(0xffff, 0xffff), "",   m68851 },
3912  
3913  {"ptrapbcw", 6,	two(0xf07a, 0x0001),	two(0xffff, 0xffff), "#w", m68851 },
3914  {"ptrapbcl", 6,	two(0xf07b, 0x0001),	two(0xffff, 0xffff), "#l", m68851 },
3915  {"ptrapbc", 4,	two(0xf07c, 0x0001),	two(0xffff, 0xffff), "",   m68851 },
3916  
3917  {"ptrapbsw", 6,	two(0xf07a, 0x0000),	two(0xffff, 0xffff), "#w", m68851 },
3918  {"ptrapbsl", 6,	two(0xf07b, 0x0000),	two(0xffff, 0xffff), "#l", m68851 },
3919  {"ptrapbs", 4,	two(0xf07c, 0x0000),	two(0xffff, 0xffff), "",   m68851 },
3920  
3921  {"ptrapccw", 6,	two(0xf07a, 0x000f),	two(0xffff, 0xffff), "#w", m68851 },
3922  {"ptrapccl", 6,	two(0xf07b, 0x000f),	two(0xffff, 0xffff), "#l", m68851 },
3923  {"ptrapcc", 4,	two(0xf07c, 0x000f),	two(0xffff, 0xffff), "",   m68851 },
3924  
3925  {"ptrapcsw", 6,	two(0xf07a, 0x000e),	two(0xffff, 0xffff), "#w", m68851 },
3926  {"ptrapcsl", 6,	two(0xf07b, 0x000e),	two(0xffff, 0xffff), "#l", m68851 },
3927  {"ptrapcs", 4,	two(0xf07c, 0x000e),	two(0xffff, 0xffff), "",   m68851 },
3928  
3929  {"ptrapgcw", 6,	two(0xf07a, 0x000d),	two(0xffff, 0xffff), "#w", m68851 },
3930  {"ptrapgcl", 6,	two(0xf07b, 0x000d),	two(0xffff, 0xffff), "#l", m68851 },
3931  {"ptrapgc", 4,	two(0xf07c, 0x000d),	two(0xffff, 0xffff), "",   m68851 },
3932  
3933  {"ptrapgsw", 6,	two(0xf07a, 0x000c),	two(0xffff, 0xffff), "#w", m68851 },
3934  {"ptrapgsl", 6,	two(0xf07b, 0x000c),	two(0xffff, 0xffff), "#l", m68851 },
3935  {"ptrapgs", 4,	two(0xf07c, 0x000c),	two(0xffff, 0xffff), "",   m68851 },
3936  
3937  {"ptrapicw", 6,	two(0xf07a, 0x000b),	two(0xffff, 0xffff), "#w", m68851 },
3938  {"ptrapicl", 6,	two(0xf07b, 0x000b),	two(0xffff, 0xffff), "#l", m68851 },
3939  {"ptrapic", 4,	two(0xf07c, 0x000b),	two(0xffff, 0xffff), "",   m68851 },
3940  
3941  {"ptrapisw", 6,	two(0xf07a, 0x000a),	two(0xffff, 0xffff), "#w", m68851 },
3942  {"ptrapisl", 6,	two(0xf07b, 0x000a),	two(0xffff, 0xffff), "#l", m68851 },
3943  {"ptrapis", 4,	two(0xf07c, 0x000a),	two(0xffff, 0xffff), "",   m68851 },
3944  
3945  {"ptraplcw", 6,	two(0xf07a, 0x0003),	two(0xffff, 0xffff), "#w", m68851 },
3946  {"ptraplcl", 6,	two(0xf07b, 0x0003),	two(0xffff, 0xffff), "#l", m68851 },
3947  {"ptraplc", 4,	two(0xf07c, 0x0003),	two(0xffff, 0xffff), "",   m68851 },
3948  
3949  {"ptraplsw", 6,	two(0xf07a, 0x0002),	two(0xffff, 0xffff), "#w", m68851 },
3950  {"ptraplsl", 6,	two(0xf07b, 0x0002),	two(0xffff, 0xffff), "#l", m68851 },
3951  {"ptrapls", 4,	two(0xf07c, 0x0002),	two(0xffff, 0xffff), "",   m68851 },
3952  
3953  {"ptrapscw", 6,	two(0xf07a, 0x0005),	two(0xffff, 0xffff), "#w", m68851 },
3954  {"ptrapscl", 6,	two(0xf07b, 0x0005),	two(0xffff, 0xffff), "#l", m68851 },
3955  {"ptrapsc", 4,	two(0xf07c, 0x0005),	two(0xffff, 0xffff), "",   m68851 },
3956  
3957  {"ptrapssw", 6,	two(0xf07a, 0x0004),	two(0xffff, 0xffff), "#w", m68851 },
3958  {"ptrapssl", 6,	two(0xf07b, 0x0004),	two(0xffff, 0xffff), "#l", m68851 },
3959  {"ptrapss", 4,	two(0xf07c, 0x0004),	two(0xffff, 0xffff), "",   m68851 },
3960  
3961  {"ptrapwcw", 6,	two(0xf07a, 0x0009),	two(0xffff, 0xffff), "#w", m68851 },
3962  {"ptrapwcl", 6,	two(0xf07b, 0x0009),	two(0xffff, 0xffff), "#l", m68851 },
3963  {"ptrapwc", 4,	two(0xf07c, 0x0009),	two(0xffff, 0xffff), "",   m68851 },
3964  
3965  {"ptrapwsw", 6,	two(0xf07a, 0x0008),	two(0xffff, 0xffff), "#w", m68851 },
3966  {"ptrapwsl", 6,	two(0xf07b, 0x0008),	two(0xffff, 0xffff), "#l", m68851 },
3967  {"ptrapws", 4,	two(0xf07c, 0x0008),	two(0xffff, 0xffff), "",   m68851 },
3968  
3969  {"pulse", 2,	one(0045314),		one(0177777), "", m68060 | mcfisa_a },
3970  
3971  {"pvalid", 4,	two(0xf000, 0x2800),	two(0xffc0, 0xffff), "Vs&s", m68851 },
3972  {"pvalid", 4,	two(0xf000, 0x2c00),	two(0xffc0, 0xfff8), "A3&s", m68851 },
3973  
3974    /* FIXME: don't allow Dw==Dx. */
3975  {"remsl", 4,    two(0x4c40, 0x0800),    two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv },
3976  {"remul", 4,    two(0x4c40, 0x0000),    two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv },
3977  
3978  {"reset", 2,	one(0047160),		one(0177777), "", m68000up },
3979  
3980  {"rolb", 2,	one(0160430),		one(0170770), "QdDs", m68000up },
3981  {"rolb", 2,	one(0160470),		one(0170770), "DdDs", m68000up },
3982  {"rolw", 2,	one(0160530),		one(0170770), "QdDs", m68000up },
3983  {"rolw", 2,	one(0160570),		one(0170770), "DdDs", m68000up },
3984  {"rolw", 2,	one(0163700),		one(0177700), "~s",   m68000up },
3985  {"roll", 2,	one(0160630),		one(0170770), "QdDs", m68000up },
3986  {"roll", 2,	one(0160670),		one(0170770), "DdDs", m68000up },
3987  
3988  {"rorb", 2,	one(0160030),		one(0170770), "QdDs", m68000up },
3989  {"rorb", 2,	one(0160070),		one(0170770), "DdDs", m68000up },
3990  {"rorw", 2,	one(0160130),		one(0170770), "QdDs", m68000up },
3991  {"rorw", 2,	one(0160170),		one(0170770), "DdDs", m68000up },
3992  {"rorw", 2,	one(0163300),		one(0177700), "~s",   m68000up },
3993  {"rorl", 2,	one(0160230),		one(0170770), "QdDs", m68000up },
3994  {"rorl", 2,	one(0160270),		one(0170770), "DdDs", m68000up },
3995  
3996  {"roxlb", 2,	one(0160420),		one(0170770), "QdDs", m68000up },
3997  {"roxlb", 2,	one(0160460),		one(0170770), "DdDs", m68000up },
3998  {"roxlw", 2,	one(0160520),		one(0170770), "QdDs", m68000up },
3999  {"roxlw", 2,	one(0160560),		one(0170770), "DdDs", m68000up },
4000  {"roxlw", 2,	one(0162700),		one(0177700), "~s",   m68000up },
4001  {"roxll", 2,	one(0160620),		one(0170770), "QdDs", m68000up },
4002  {"roxll", 2,	one(0160660),		one(0170770), "DdDs", m68000up },
4003  
4004  {"roxrb", 2,	one(0160020),		one(0170770), "QdDs", m68000up },
4005  {"roxrb", 2,	one(0160060),		one(0170770), "DdDs", m68000up },
4006  {"roxrw", 2,	one(0160120),		one(0170770), "QdDs", m68000up },
4007  {"roxrw", 2,	one(0160160),		one(0170770), "DdDs", m68000up },
4008  {"roxrw", 2,	one(0162300),		one(0177700), "~s",   m68000up },
4009  {"roxrl", 2,	one(0160220),		one(0170770), "QdDs", m68000up },
4010  {"roxrl", 2,	one(0160260),		one(0170770), "DdDs", m68000up },
4011  
4012  {"rtd", 4,	one(0047164),		one(0177777), "#w", m68010up },
4013  
4014  {"rte", 2,	one(0047163),		one(0177777), "",   m68000up | mcfisa_a },
4015  
4016  {"rtm", 2,	one(0003300),		one(0177760), "Rs", m68020 },
4017  
4018  {"rtr", 2,	one(0047167),		one(0177777), "",   m68000up },
4019  
4020  {"rts", 2,	one(0047165),		one(0177777), "",   m68000up | mcfisa_a },
4021  
4022  {"satsl", 2,	one(0046200),		one(0177770), "Ds", mcfisa_b },
4023  
4024  {"sbcd", 2,	one(0100400),		one(0170770), "DsDd", m68000up },
4025  {"sbcd", 2,	one(0100410),		one(0170770), "-s-d", m68000up },
4026  
4027  {"scc", 2,	one(0052300),	one(0177700), "$s", m68000up },
4028  {"scc", 2,	one(0052300),	one(0177700), "Ds", mcfisa_a },
4029  {"scs", 2,	one(0052700),	one(0177700), "$s", m68000up },
4030  {"scs", 2,	one(0052700),	one(0177700), "Ds", mcfisa_a },
4031  {"seq", 2,	one(0053700),	one(0177700), "$s", m68000up },
4032  {"seq", 2,	one(0053700),	one(0177700), "Ds", mcfisa_a },
4033  {"sf", 2,	one(0050700),	one(0177700), "$s", m68000up },
4034  {"sf", 2,	one(0050700),	one(0177700), "Ds", mcfisa_a },
4035  {"sge", 2,	one(0056300),	one(0177700), "$s", m68000up },
4036  {"sge", 2,	one(0056300),	one(0177700), "Ds", mcfisa_a },
4037  {"sgt", 2,	one(0057300),	one(0177700), "$s", m68000up },
4038  {"sgt", 2,	one(0057300),	one(0177700), "Ds", mcfisa_a },
4039  {"shi", 2,	one(0051300),	one(0177700), "$s", m68000up },
4040  {"shi", 2,	one(0051300),	one(0177700), "Ds", mcfisa_a },
4041  {"sle", 2,	one(0057700),	one(0177700), "$s", m68000up },
4042  {"sle", 2,	one(0057700),	one(0177700), "Ds", mcfisa_a },
4043  {"sls", 2,	one(0051700),	one(0177700), "$s", m68000up },
4044  {"sls", 2,	one(0051700),	one(0177700), "Ds", mcfisa_a },
4045  {"slt", 2,	one(0056700),	one(0177700), "$s", m68000up },
4046  {"slt", 2,	one(0056700),	one(0177700), "Ds", mcfisa_a },
4047  {"smi", 2,	one(0055700),	one(0177700), "$s", m68000up },
4048  {"smi", 2,	one(0055700),	one(0177700), "Ds", mcfisa_a },
4049  {"sne", 2,	one(0053300),	one(0177700), "$s", m68000up },
4050  {"sne", 2,	one(0053300),	one(0177700), "Ds", mcfisa_a },
4051  {"spl", 2,	one(0055300),	one(0177700), "$s", m68000up },
4052  {"spl", 2,	one(0055300),	one(0177700), "Ds", mcfisa_a },
4053  {"st", 2,	one(0050300),	one(0177700), "$s", m68000up },
4054  {"st", 2,	one(0050300),	one(0177700), "Ds", mcfisa_a },
4055  {"svc", 2,	one(0054300),	one(0177700), "$s", m68000up },
4056  {"svc", 2,	one(0054300),	one(0177700), "Ds", mcfisa_a },
4057  {"svs", 2,	one(0054700),	one(0177700), "$s", m68000up },
4058  {"svs", 2,	one(0054700),	one(0177700), "Ds", mcfisa_a },
4059  
4060  {"stop", 4,	one(0047162),	one(0177777), "#w", m68000up | mcfisa_a },
4061  
4062  {"strldsr", 4, two(0040347,0043374), two(0177777,0177777), "#w", mcfisa_aa},
4063  
4064  {"subal", 2,	one(0110700),	one(0170700), "*lAd", m68000up | mcfisa_a },
4065  {"subaw", 2,	one(0110300),	one(0170700), "*wAd", m68000up },
4066  
4067  {"subib", 4,	one(0002000),	one(0177700), "#b$s", m68000up },
4068  {"subiw", 4,	one(0002100),	one(0177700), "#w$s", m68000up },
4069  {"subil", 6,	one(0002200),	one(0177700), "#l$s", m68000up },
4070  {"subil", 6,	one(0002200),	one(0177700), "#lDs", mcfisa_a },
4071  
4072  {"subqb", 2,	one(0050400),	one(0170700), "Qd%s", m68000up },
4073  {"subqw", 2,	one(0050500),	one(0170700), "Qd%s", m68000up },
4074  {"subql", 2,	one(0050600),	one(0170700), "Qd%s", m68000up | mcfisa_a },
4075  
4076  /* The sub opcode can generate the suba, subi, and subq instructions.  */
4077  {"subb", 2,	one(0050400),	one(0170700), "Qd%s", m68000up },
4078  {"subb", 4,	one(0002000),	one(0177700), "#b$s", m68000up },
4079  {"subb", 2,	one(0110000),	one(0170700), ";bDd", m68000up },
4080  {"subb", 2,	one(0110400),	one(0170700), "Dd~s", m68000up },
4081  {"subw", 2,	one(0050500),	one(0170700), "Qd%s", m68000up },
4082  {"subw", 4,	one(0002100),	one(0177700), "#w$s", m68000up },
4083  {"subw", 2,	one(0110300),	one(0170700), "*wAd", m68000up },
4084  {"subw", 2,	one(0110100),	one(0170700), "*wDd", m68000up },
4085  {"subw", 2,	one(0110500),	one(0170700), "Dd~s", m68000up },
4086  {"subl", 2,	one(0050600),	one(0170700), "Qd%s", m68000up | mcfisa_a },
4087  {"subl", 6,	one(0002200),	one(0177700), "#l$s", m68000up },
4088  {"subl", 6,	one(0002200),	one(0177700), "#lDs", mcfisa_a },
4089  {"subl", 2,	one(0110700),	one(0170700), "*lAd", m68000up | mcfisa_a },
4090  {"subl", 2,	one(0110200),	one(0170700), "*lDd", m68000up | mcfisa_a },
4091  {"subl", 2,	one(0110600),	one(0170700), "Dd~s", m68000up | mcfisa_a },
4092  
4093  {"subxb", 2,	one(0110400),	one(0170770), "DsDd", m68000up },
4094  {"subxb", 2,	one(0110410),	one(0170770), "-s-d", m68000up },
4095  {"subxw", 2,	one(0110500),	one(0170770), "DsDd", m68000up },
4096  {"subxw", 2,	one(0110510),	one(0170770), "-s-d", m68000up },
4097  {"subxl", 2,	one(0110600),	one(0170770), "DsDd", m68000up | mcfisa_a },
4098  {"subxl", 2,	one(0110610),	one(0170770), "-s-d", m68000up },
4099  
4100  {"swap", 2,	one(0044100),	one(0177770), "Ds", m68000up | mcfisa_a },
4101  
4102  /* swbeg and swbegl are magic constants used on sysV68.  The compiler
4103     generates them before a switch table.  They tell the debugger and
4104     disassembler that a switch table follows.  The parameter is the
4105     number of elements in the table.  swbeg means that the entries in
4106     the table are word (2 byte) sized, and swbegl means that the
4107     entries in the table are longword (4 byte) sized.  */
4108  {"swbeg", 4,	one(0045374),	one(0177777), "#w",   m68000up | mcfisa_a },
4109  {"swbegl", 6,	one(0045375),	one(0177777), "#l",   m68000up | mcfisa_a },
4110  
4111  {"tas", 2,	one(0045300),	one(0177700), "$s", m68000up | mcfisa_b},
4112  
4113  #define TBL1(name,insn_size,signed,round,size)					\
4114    {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400),	\
4115       two(0177700,0107777), "!sD1", cpu32 },				\
4116    {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)),		\
4117       two(0177770,0107770), "DsD3D1", cpu32 }
4118  #define TBL(name1, name2, name3, s, r) \
4119    TBL1(name1, 4, s, r, 0), TBL1(name2, 4, s, r, 1), TBL1(name3, 4, s, r, 2)
4120  TBL("tblsb", "tblsw", "tblsl", 2, 1),
4121  TBL("tblsnb", "tblsnw", "tblsnl", 2, 0),
4122  TBL("tblub", "tbluw", "tblul", 0, 1),
4123  TBL("tblunb", "tblunw", "tblunl", 0, 0),
4124  
4125  {"trap", 2,	one(0047100),	one(0177760), "Ts", m68000up | mcfisa_a },
4126  
4127  {"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 },
4128  {"trapcs", 2,	one(0052774),	one(0177777), "", m68020up | cpu32 },
4129  {"trapeq", 2,	one(0053774),	one(0177777), "", m68020up | cpu32 },
4130  {"trapf", 2,	one(0050774),	one(0177777), "", m68020up | cpu32 | mcfisa_a },
4131  {"trapge", 2,	one(0056374),	one(0177777), "", m68020up | cpu32 },
4132  {"trapgt", 2,	one(0057374),	one(0177777), "", m68020up | cpu32 },
4133  {"traphi", 2,	one(0051374),	one(0177777), "", m68020up | cpu32 },
4134  {"traple", 2,	one(0057774),	one(0177777), "", m68020up | cpu32 },
4135  {"trapls", 2,	one(0051774),	one(0177777), "", m68020up | cpu32 },
4136  {"traplt", 2,	one(0056774),	one(0177777), "", m68020up | cpu32 },
4137  {"trapmi", 2,	one(0055774),	one(0177777), "", m68020up | cpu32 },
4138  {"trapne", 2,	one(0053374),	one(0177777), "", m68020up | cpu32 },
4139  {"trappl", 2,	one(0055374),	one(0177777), "", m68020up | cpu32 },
4140  {"trapt", 2,	one(0050374),	one(0177777), "", m68020up | cpu32 },
4141  {"trapvc", 2,	one(0054374),	one(0177777), "", m68020up | cpu32 },
4142  {"trapvs", 2,	one(0054774),	one(0177777), "", m68020up | cpu32 },
4143  
4144  {"trapccw", 4,	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
4145  {"trapcsw", 4,	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
4146  {"trapeqw", 4,	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
4147  {"trapfw", 4,	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcfisa_a},
4148  {"trapgew", 4,	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
4149  {"trapgtw", 4,	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
4150  {"traphiw", 4,	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
4151  {"traplew", 4,	one(0057772),	one(0177777), "#w", m68020up|cpu32 },
4152  {"traplsw", 4,	one(0051772),	one(0177777), "#w", m68020up|cpu32 },
4153  {"trapltw", 4,	one(0056772),	one(0177777), "#w", m68020up|cpu32 },
4154  {"trapmiw", 4,	one(0055772),	one(0177777), "#w", m68020up|cpu32 },
4155  {"trapnew", 4,	one(0053372),	one(0177777), "#w", m68020up|cpu32 },
4156  {"trapplw", 4,	one(0055372),	one(0177777), "#w", m68020up|cpu32 },
4157  {"traptw", 4,	one(0050372),	one(0177777), "#w", m68020up|cpu32 },
4158  {"trapvcw", 4,	one(0054372),	one(0177777), "#w", m68020up|cpu32 },
4159  {"trapvsw", 4,	one(0054772),	one(0177777), "#w", m68020up|cpu32 },
4160  
4161  {"trapccl", 6,	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
4162  {"trapcsl", 6,	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
4163  {"trapeql", 6,	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
4164  {"trapfl", 6,	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcfisa_a},
4165  {"trapgel", 6,	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
4166  {"trapgtl", 6,	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
4167  {"traphil", 6,	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
4168  {"traplel", 6,	one(0057773),	one(0177777), "#l", m68020up|cpu32 },
4169  {"traplsl", 6,	one(0051773),	one(0177777), "#l", m68020up|cpu32 },
4170  {"trapltl", 6,	one(0056773),	one(0177777), "#l", m68020up|cpu32 },
4171  {"trapmil", 6,	one(0055773),	one(0177777), "#l", m68020up|cpu32 },
4172  {"trapnel", 6,	one(0053373),	one(0177777), "#l", m68020up|cpu32 },
4173  {"trappll", 6,	one(0055373),	one(0177777), "#l", m68020up|cpu32 },
4174  {"traptl", 6,	one(0050373),	one(0177777), "#l", m68020up|cpu32 },
4175  {"trapvcl", 6,	one(0054373),	one(0177777), "#l", m68020up|cpu32 },
4176  {"trapvsl", 6,	one(0054773),	one(0177777), "#l", m68020up|cpu32 },
4177  
4178  {"trapv", 2,	one(0047166),	one(0177777), "", m68000up },
4179  
4180  {"tstb", 2,	one(0045000),	one(0177700), ";b", m68020up|cpu32|mcfisa_a },
4181  {"tstb", 2,	one(0045000),	one(0177700), "$b", m68000up },
4182  {"tstw", 2,	one(0045100),	one(0177700), "*w", m68020up|cpu32|mcfisa_a },
4183  {"tstw", 2,	one(0045100),	one(0177700), "$w", m68000up },
4184  {"tstl", 2,	one(0045200),	one(0177700), "*l", m68020up|cpu32|mcfisa_a },
4185  {"tstl", 2,	one(0045200),	one(0177700), "$l", m68000up },
4186  
4187  {"unlk", 2,	one(0047130),	one(0177770), "As", m68000up | mcfisa_a },
4188  
4189  {"unpk", 4,	one(0100600),	one(0170770), "DsDd#w", m68020up },
4190  {"unpk", 4,	one(0100610),	one(0170770), "-s-d#w", m68020up },
4191  
4192  {"wddatab", 2,	one(0175400),   one(0177700), "~s", mcfisa_a },
4193  {"wddataw", 2,	one(0175500),   one(0177700), "~s", mcfisa_a },
4194  {"wddatal", 2,	one(0175600),   one(0177700), "~s", mcfisa_a },
4195  
4196  {"wdebug", 4,	two(0175720, 03),	two(0177770, 0xffff), "as", mcfisa_a },
4197  {"wdebug", 4,	two(0175750, 03),	two(0177770, 0xffff), "ds", mcfisa_a },
4198  };
4199  
4200  const int m68k_numopcodes = sizeof m68k_opcodes / sizeof m68k_opcodes[0];
4201  
4202  /* These aliases used to be in the above table, each one duplicating
4203     all of the entries for its primary exactly.  This table was
4204     constructed by mechanical processing of the opcode table, with a
4205     small number of tweaks done by hand.  There are probably a lot more
4206     aliases above that could be moved down here, except for very minor
4207     differences.  */
4208  
4209  const struct m68k_opcode_alias m68k_opcode_aliases[] =
4210  {
4211    { "add",	"addw", },
4212    { "adda",	"addaw", },
4213    { "addi",	"addiw", },
4214    { "addq",	"addqw", },
4215    { "addx",	"addxw", },
4216    { "asl",	"aslw", },
4217    { "asr",	"asrw", },
4218    { "bhi",	"bhiw", },
4219    { "bls",	"blsw", },
4220    { "bcc",	"bccw", },
4221    { "bcs",	"bcsw", },
4222    { "bne",	"bnew", },
4223    { "beq",	"beqw", },
4224    { "bvc",	"bvcw", },
4225    { "bvs",	"bvsw", },
4226    { "bpl",	"bplw", },
4227    { "bmi",	"bmiw", },
4228    { "bge",	"bgew", },
4229    { "blt",	"bltw", },
4230    { "bgt",	"bgtw", },
4231    { "ble",	"blew", },
4232    { "bra",	"braw", },
4233    { "bsr",	"bsrw", },
4234    { "bhib",	"bhis", },
4235    { "blsb",	"blss", },
4236    { "bccb",	"bccs", },
4237    { "bcsb",	"bcss", },
4238    { "bneb",	"bnes", },
4239    { "beqb",	"beqs", },
4240    { "bvcb",	"bvcs", },
4241    { "bvsb",	"bvss", },
4242    { "bplb",	"bpls", },
4243    { "bmib",	"bmis", },
4244    { "bgeb",	"bges", },
4245    { "bltb",	"blts", },
4246    { "bgtb",	"bgts", },
4247    { "bleb",	"bles", },
4248    { "brab",	"bras", },
4249    { "bsrb",	"bsrs", },
4250    { "bhs",	"bccw" },
4251    { "bhss",	"bccs" },
4252    { "bhsb",	"bccs" },
4253    { "bhsw",	"bccw" },
4254    { "bhsl",	"bccl" },
4255    { "blo",	"bcsw" },
4256    { "blos",	"bcss" },
4257    { "blob",	"bcss" },
4258    { "blow",	"bcsw" },
4259    { "blol",	"bcsl" },
4260    { "br",	"braw", },
4261    { "brs",	"bras", },
4262    { "brb",	"bras", },
4263    { "brw",	"braw", },
4264    { "brl",	"bral", },
4265    { "jfnlt",	"bcc", },	/* Apparently a sun alias.  */
4266    { "jfngt",	"ble", },	/* Apparently a sun alias.  */
4267    { "jfeq",	"beqs", },	/* Apparently a sun alias.  */
4268    { "bchgb",	"bchg", },
4269    { "bchgl",	"bchg", },
4270    { "bclrb",	"bclr", },
4271    { "bclrl",	"bclr", },
4272    { "bsetb",	"bset", },
4273    { "bsetl",	"bset", },
4274    { "btstb",	"btst", },
4275    { "btstl",	"btst", },
4276    { "cas2",	"cas2w", },
4277    { "cas",	"casw", },
4278    { "chk2",	"chk2w", },
4279    { "chk",	"chkw", },
4280    { "clr",	"clrw", },
4281    { "cmp2",	"cmp2w", },
4282    { "cmpa",	"cmpaw", },
4283    { "cmpi",	"cmpiw", },
4284    { "cmpm",	"cmpmw", },
4285    { "cmp",	"cmpw", },
4286    { "dbccw",	"dbcc", },
4287    { "dbcsw",	"dbcs", },
4288    { "dbeqw",	"dbeq", },
4289    { "dbfw",	"dbf", },
4290    { "dbgew",	"dbge", },
4291    { "dbgtw",	"dbgt", },
4292    { "dbhiw",	"dbhi", },
4293    { "dblew",	"dble", },
4294    { "dblsw",	"dbls", },
4295    { "dbltw",	"dblt", },
4296    { "dbmiw",	"dbmi", },
4297    { "dbnew",	"dbne", },
4298    { "dbplw",	"dbpl", },
4299    { "dbtw",	"dbt", },
4300    { "dbvcw",	"dbvc", },
4301    { "dbvsw",	"dbvs", },
4302    { "dbhs",	"dbcc", },
4303    { "dbhsw",	"dbcc", },
4304    { "dbra",	"dbf", },
4305    { "dbraw",	"dbf", },
4306    { "tdivsl",	"divsl", },
4307    { "divs",	"divsw", },
4308    { "divu",	"divuw", },
4309    { "ext",	"extw", },
4310    { "extbw",	"extw", },
4311    { "extwl",	"extl", },
4312    { "fbneq",	"fbne", },
4313    { "fbsneq",	"fbsne", },
4314    { "fdbneq",	"fdbne", },
4315    { "fdbsneq",	"fdbsne", },
4316    { "fmovecr",	"fmovecrx", },
4317    { "fmovm",	"fmovem", },
4318    { "fsneq",	"fsne", },
4319    { "fssneq",	"fssne", },
4320    { "ftrapneq",	"ftrapne", },
4321    { "ftrapsneq", "ftrapsne", },
4322    { "fjneq",	"fjne", },
4323    { "fjsneq",	"fjsne", },
4324    { "jmpl",	"jmp", },
4325    { "jmps",	"jmp", },
4326    { "jsrl",	"jsr", },
4327    { "jsrs",	"jsr", },
4328    { "leal",	"lea", },
4329    { "lsl",	"lslw", },
4330    { "lsr",	"lsrw", },
4331    { "mac",	"macw" },
4332    { "movea",	"moveaw", },
4333    { "movem",	"movemw", },
4334    { "movml",	"moveml", },
4335    { "movmw",	"movemw", },
4336    { "movm",	"movemw", },
4337    { "movep",	"movepw", },
4338    { "movpw",	"movepw", },
4339    { "moves",	"movesw" },
4340    { "muls",	"mulsw", },
4341    { "mulu",	"muluw", },
4342    { "msac",	"msacw" },
4343    { "nbcdb",	"nbcd" },
4344    { "neg",	"negw", },
4345    { "negx",	"negxw", },
4346    { "not",	"notw", },
4347    { "peal",	"pea", },
4348    { "rol",	"rolw", },
4349    { "ror",	"rorw", },
4350    { "roxl",	"roxlw", },
4351    { "roxr",	"roxrw", },
4352    { "sats",	"satsl", },
4353    { "sbcdb",	"sbcd", },
4354    { "sccb",	"scc", },
4355    { "scsb",	"scs", },
4356    { "seqb",	"seq", },
4357    { "sfb",	"sf", },
4358    { "sgeb",	"sge", },
4359    { "sgtb",	"sgt", },
4360    { "shib",	"shi", },
4361    { "sleb",	"sle", },
4362    { "slsb",	"sls", },
4363    { "sltb",	"slt", },
4364    { "smib",	"smi", },
4365    { "sneb",	"sne", },
4366    { "splb",	"spl", },
4367    { "stb",	"st", },
4368    { "svcb",	"svc", },
4369    { "svsb",	"svs", },
4370    { "sfge",	"sge", },
4371    { "sfgt",	"sgt", },
4372    { "sfle",	"sle", },
4373    { "sflt",	"slt", },
4374    { "sfneq",	"sne", },
4375    { "suba",	"subaw", },
4376    { "subi",	"subiw", },
4377    { "subq",	"subqw", },
4378    { "sub",	"subw", },
4379    { "subx",	"subxw", },
4380    { "swapw",	"swap", },
4381    { "tasb",	"tas", },
4382    { "tpcc",	"trapcc", },
4383    { "tcc",	"trapcc", },
4384    { "tst",	"tstw", },
4385    { "jbra",	"jra", },
4386    { "jbhi",	"jhi", },
4387    { "jbls",	"jls", },
4388    { "jbcc",	"jcc", },
4389    { "jbcs",	"jcs", },
4390    { "jbne",	"jne", },
4391    { "jbeq",	"jeq", },
4392    { "jbvc",	"jvc", },
4393    { "jbvs",	"jvs", },
4394    { "jbpl",	"jpl", },
4395    { "jbmi",	"jmi", },
4396    { "jbge",	"jge", },
4397    { "jblt",	"jlt", },
4398    { "jbgt",	"jgt", },
4399    { "jble",	"jle", },
4400    { "movql",	"moveq", },
4401    { "moveql",	"moveq", },
4402    { "movl",	"movel", },
4403    { "movq",	"moveq", },
4404    { "moval",	"moveal", },
4405    { "movaw",	"moveaw", },
4406    { "movb",	"moveb", },
4407    { "movc",	"movec", },
4408    { "movecl",	"movec", },
4409    { "movpl",	"movepl", },
4410    { "movw",	"movew", },
4411    { "movsb",	"movesb", },
4412    { "movsl",	"movesl", },
4413    { "movsw",	"movesw", },
4414    { "mov3q",	"mov3ql", },
4415  
4416    { "tdivul",	"divul", },	/* For m68k-svr4.  */
4417    { "fmovb",	"fmoveb", },
4418    { "fsmovb",	"fsmoveb", },
4419    { "fdmovb",	"fdmoveb", },
4420    { "fmovd",	"fmoved", },
4421    { "fsmovd",	"fsmoved", },
4422    { "fmovl",	"fmovel", },
4423    { "fsmovl",	"fsmovel", },
4424    { "fdmovl",	"fdmovel", },
4425    { "fmovp",	"fmovep", },
4426    { "fsmovp",	"fsmovep", },
4427    { "fdmovp",	"fdmovep", },
4428    { "fmovs",	"fmoves", },
4429    { "fsmovs",	"fsmoves", },
4430    { "fdmovs",	"fdmoves", },
4431    { "fmovw",	"fmovew", },
4432    { "fsmovw",	"fsmovew", },
4433    { "fdmovw",	"fdmovew", },
4434    { "fmovx",	"fmovex", },
4435    { "fsmovx",	"fsmovex", },
4436    { "fdmovx",	"fdmovex", },
4437    { "fmovcr",	"fmovecr", },
4438    { "fmovcrx",	"fmovecrx", },
4439    { "ftestb",	"ftstb", },
4440    { "ftestd",	"ftstd", },
4441    { "ftestl",	"ftstl", },
4442    { "ftestp",	"ftstp", },
4443    { "ftests",	"ftsts", },
4444    { "ftestw",	"ftstw", },
4445    { "ftestx",	"ftstx", },
4446  
4447    { "bitrevl",  "bitrev", },
4448    { "byterevl", "byterev", },
4449    { "ff1l",     "ff1", },
4450  
4451  };
4452  
4453  const int m68k_numaliases =
4454    sizeof m68k_opcode_aliases / sizeof m68k_opcode_aliases[0];
4455  /* **** End of m68k-opc.c */
4456  /* **** floatformat.c from sourceware.org CVS 2005-08-14.  */
4457  /* IEEE floating point support routines, for GDB, the GNU Debugger.
4458     Copyright (C) 1991, 1994, 1999, 2000, 2003 Free Software Foundation, Inc.
4459  
4460  This file is part of GDB.
4461  
4462  This program is free software; you can redistribute it and/or modify
4463  it under the terms of the GNU General Public License as published by
4464  the Free Software Foundation; either version 2 of the License, or
4465  (at your option) any later version.
4466  
4467  This program is distributed in the hope that it will be useful,
4468  but WITHOUT ANY WARRANTY; without even the implied warranty of
4469  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
4470  GNU General Public License for more details.
4471  
4472  You should have received a copy of the GNU General Public License
4473  along with this program; if not, see <http://www.gnu.org/licenses/>.  */
4474  
4475  /* This is needed to pick up the NAN macro on some systems.  */
4476  //#define _GNU_SOURCE
4477  
4478  #ifndef INFINITY
4479  #ifdef HUGE_VAL
4480  #define INFINITY HUGE_VAL
4481  #else
4482  #define INFINITY (1.0 / 0.0)
4483  #endif
4484  #endif
4485  
4486  #ifndef NAN
4487  #define NAN (0.0 / 0.0)
4488  #endif
4489  
4490  static unsigned long get_field (const unsigned char *,
4491                                  enum floatformat_byteorders,
4492                                  unsigned int,
4493                                  unsigned int,
4494                                  unsigned int);
4495  static int floatformat_always_valid (const struct floatformat *fmt,
4496                                       const char *from);
4497  
4498  static int
4499  floatformat_always_valid (const struct floatformat *fmt ATTRIBUTE_UNUSED,
4500                            const char *from ATTRIBUTE_UNUSED)
4501  {
4502    return 1;
4503  }
4504  
4505  /* The odds that CHAR_BIT will be anything but 8 are low enough that I'm not
4506     going to bother with trying to muck around with whether it is defined in
4507     a system header, what we do if not, etc.  */
4508  #define FLOATFORMAT_CHAR_BIT 8
4509  
4510  /* floatformats for IEEE single and double, big and little endian.  */
4511  const struct floatformat floatformat_ieee_single_big =
4512  {
4513    floatformat_big, 32, 0, 1, 8, 127, 255, 9, 23,
4514    floatformat_intbit_no,
4515    "floatformat_ieee_single_big",
4516    floatformat_always_valid
4517  };
4518  const struct floatformat floatformat_ieee_single_little =
4519  {
4520    floatformat_little, 32, 0, 1, 8, 127, 255, 9, 23,
4521    floatformat_intbit_no,
4522    "floatformat_ieee_single_little",
4523    floatformat_always_valid
4524  };
4525  const struct floatformat floatformat_ieee_double_big =
4526  {
4527    floatformat_big, 64, 0, 1, 11, 1023, 2047, 12, 52,
4528    floatformat_intbit_no,
4529    "floatformat_ieee_double_big",
4530    floatformat_always_valid
4531  };
4532  const struct floatformat floatformat_ieee_double_little =
4533  {
4534    floatformat_little, 64, 0, 1, 11, 1023, 2047, 12, 52,
4535    floatformat_intbit_no,
4536    "floatformat_ieee_double_little",
4537    floatformat_always_valid
4538  };
4539  
4540  /* floatformat for IEEE double, little endian byte order, with big endian word
4541     ordering, as on the ARM.  */
4542  
4543  const struct floatformat floatformat_ieee_double_littlebyte_bigword =
4544  {
4545    floatformat_littlebyte_bigword, 64, 0, 1, 11, 1023, 2047, 12, 52,
4546    floatformat_intbit_no,
4547    "floatformat_ieee_double_littlebyte_bigword",
4548    floatformat_always_valid
4549  };
4550  
4551  static int floatformat_i387_ext_is_valid (const struct floatformat *fmt, const char *from);
4552  
4553  static int
4554  floatformat_i387_ext_is_valid (const struct floatformat *fmt, const char *from)
4555  {
4556    /* In the i387 double-extended format, if the exponent is all ones,
4557       then the integer bit must be set.  If the exponent is neither 0
4558       nor ~0, the intbit must also be set.  Only if the exponent is
4559       zero can it be zero, and then it must be zero.  */
4560    unsigned long exponent, int_bit;
4561    const unsigned char *ufrom = (const unsigned char *) from;
4562  
4563    exponent = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4564  			fmt->exp_start, fmt->exp_len);
4565    int_bit = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4566  		       fmt->man_start, 1);
4567  
4568    if ((exponent == 0) != (int_bit == 0))
4569      return 0;
4570    else
4571      return 1;
4572  }
4573  
4574  const struct floatformat floatformat_i387_ext =
4575  {
4576    floatformat_little, 80, 0, 1, 15, 0x3fff, 0x7fff, 16, 64,
4577    floatformat_intbit_yes,
4578    "floatformat_i387_ext",
4579    floatformat_i387_ext_is_valid
4580  };
4581  const struct floatformat floatformat_m68881_ext =
4582  {
4583    /* Note that the bits from 16 to 31 are unused.  */
4584    floatformat_big, 96, 0, 1, 15, 0x3fff, 0x7fff, 32, 64,
4585    floatformat_intbit_yes,
4586    "floatformat_m68881_ext",
4587    floatformat_always_valid
4588  };
4589  const struct floatformat floatformat_i960_ext =
4590  {
4591    /* Note that the bits from 0 to 15 are unused.  */
4592    floatformat_little, 96, 16, 17, 15, 0x3fff, 0x7fff, 32, 64,
4593    floatformat_intbit_yes,
4594    "floatformat_i960_ext",
4595    floatformat_always_valid
4596  };
4597  const struct floatformat floatformat_m88110_ext =
4598  {
4599    floatformat_big, 80, 0, 1, 15, 0x3fff, 0x7fff, 16, 64,
4600    floatformat_intbit_yes,
4601    "floatformat_m88110_ext",
4602    floatformat_always_valid
4603  };
4604  const struct floatformat floatformat_m88110_harris_ext =
4605  {
4606    /* Harris uses raw format 128 bytes long, but the number is just an ieee
4607       double, and the last 64 bits are wasted. */
4608    floatformat_big,128, 0, 1, 11,  0x3ff,  0x7ff, 12, 52,
4609    floatformat_intbit_no,
4610    "floatformat_m88110_ext_harris",
4611    floatformat_always_valid
4612  };
4613  const struct floatformat floatformat_arm_ext_big =
4614  {
4615    /* Bits 1 to 16 are unused.  */
4616    floatformat_big, 96, 0, 17, 15, 0x3fff, 0x7fff, 32, 64,
4617    floatformat_intbit_yes,
4618    "floatformat_arm_ext_big",
4619    floatformat_always_valid
4620  };
4621  const struct floatformat floatformat_arm_ext_littlebyte_bigword =
4622  {
4623    /* Bits 1 to 16 are unused.  */
4624    floatformat_littlebyte_bigword, 96, 0, 17, 15, 0x3fff, 0x7fff, 32, 64,
4625    floatformat_intbit_yes,
4626    "floatformat_arm_ext_littlebyte_bigword",
4627    floatformat_always_valid
4628  };
4629  const struct floatformat floatformat_ia64_spill_big =
4630  {
4631    floatformat_big, 128, 0, 1, 17, 65535, 0x1ffff, 18, 64,
4632    floatformat_intbit_yes,
4633    "floatformat_ia64_spill_big",
4634    floatformat_always_valid
4635  };
4636  const struct floatformat floatformat_ia64_spill_little =
4637  {
4638    floatformat_little, 128, 0, 1, 17, 65535, 0x1ffff, 18, 64,
4639    floatformat_intbit_yes,
4640    "floatformat_ia64_spill_little",
4641    floatformat_always_valid
4642  };
4643  const struct floatformat floatformat_ia64_quad_big =
4644  {
4645    floatformat_big, 128, 0, 1, 15, 16383, 0x7fff, 16, 112,
4646    floatformat_intbit_no,
4647    "floatformat_ia64_quad_big",
4648    floatformat_always_valid
4649  };
4650  const struct floatformat floatformat_ia64_quad_little =
4651  {
4652    floatformat_little, 128, 0, 1, 15, 16383, 0x7fff, 16, 112,
4653    floatformat_intbit_no,
4654    "floatformat_ia64_quad_little",
4655    floatformat_always_valid
4656  };
4657  
4658  /* Extract a field which starts at START and is LEN bits long.  DATA and
4659     TOTAL_LEN are the thing we are extracting it from, in byteorder ORDER.  */
4660  static unsigned long
4661  get_field (const unsigned char *data, enum floatformat_byteorders order,
4662             unsigned int total_len, unsigned int start, unsigned int len)
4663  {
4664    unsigned long result;
4665    unsigned int cur_byte;
4666    int cur_bitshift;
4667  
4668    /* Start at the least significant part of the field.  */
4669    cur_byte = (start + len) / FLOATFORMAT_CHAR_BIT;
4670    if (order == floatformat_little)
4671      cur_byte = (total_len / FLOATFORMAT_CHAR_BIT) - cur_byte - 1;
4672    cur_bitshift =
4673      ((start + len) % FLOATFORMAT_CHAR_BIT) - FLOATFORMAT_CHAR_BIT;
4674    result = *(data + cur_byte) >> (-cur_bitshift);
4675    cur_bitshift += FLOATFORMAT_CHAR_BIT;
4676    if (order == floatformat_little)
4677      ++cur_byte;
4678    else
4679      --cur_byte;
4680  
4681    /* Move towards the most significant part of the field.  */
4682    while ((unsigned int) cur_bitshift < len)
4683      {
4684        if (len - cur_bitshift < FLOATFORMAT_CHAR_BIT)
4685  	/* This is the last byte; zero out the bits which are not part of
4686  	   this field.  */
4687  	result |=
4688  	  (*(data + cur_byte) & ((1 << (len - cur_bitshift)) - 1))
4689  	    << cur_bitshift;
4690        else
4691  	result |= *(data + cur_byte) << cur_bitshift;
4692        cur_bitshift += FLOATFORMAT_CHAR_BIT;
4693        if (order == floatformat_little)
4694  	++cur_byte;
4695        else
4696  	--cur_byte;
4697      }
4698    return result;
4699  }
4700  
4701  #ifndef min
4702  #define min(a, b) ((a) < (b) ? (a) : (b))
4703  #endif
4704  
4705  /* Convert from FMT to a double.
4706     FROM is the address of the extended float.
4707     Store the double in *TO.  */
4708  
4709  void
4710  floatformat_to_double (const struct floatformat *fmt,
4711                         const char *from, double *to)
4712  {
4713    const unsigned char *ufrom = (const unsigned char *)from;
4714    double dto;
4715    long exponent;
4716    unsigned long mant;
4717    unsigned int mant_bits, mant_off;
4718    int mant_bits_left;
4719    int special_exponent;		/* It's a NaN, denorm or zero */
4720  
4721    exponent = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4722  			fmt->exp_start, fmt->exp_len);
4723  
4724    /* If the exponent indicates a NaN, we don't have information to
4725       decide what to do.  So we handle it like IEEE, except that we
4726       don't try to preserve the type of NaN.  FIXME.  */
4727    if ((unsigned long) exponent == fmt->exp_nan)
4728      {
4729        int nan;
4730  
4731        mant_off = fmt->man_start;
4732        mant_bits_left = fmt->man_len;
4733        nan = 0;
4734        while (mant_bits_left > 0)
4735  	{
4736  	  mant_bits = min (mant_bits_left, 32);
4737  
4738  	  if (get_field (ufrom, fmt->byteorder, fmt->totalsize,
4739  			 mant_off, mant_bits) != 0)
4740  	    {
4741  	      /* This is a NaN.  */
4742  	      nan = 1;
4743  	      break;
4744  	    }
4745  
4746  	  mant_off += mant_bits;
4747  	  mant_bits_left -= mant_bits;
4748  	}
4749  
4750        /* On certain systems (such as GNU/Linux), the use of the
4751  	 INFINITY macro below may generate a warning that can not be
4752  	 silenced due to a bug in GCC (PR preprocessor/11931).  The
4753  	 preprocessor fails to recognise the __extension__ keyword in
4754  	 conjunction with the GNU/C99 extension for hexadecimal
4755  	 floating point constants and will issue a warning when
4756  	 compiling with -pedantic.  */
4757        if (nan)
4758  	dto = NAN;
4759        else
4760  	dto = INFINITY;
4761  
4762        if (get_field (ufrom, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1))
4763  	dto = -dto;
4764  
4765        *to = dto;
4766  
4767        return;
4768      }
4769  
4770    mant_bits_left = fmt->man_len;
4771    mant_off = fmt->man_start;
4772    dto = 0.0;
4773  
4774    special_exponent = exponent == 0 || (unsigned long) exponent == fmt->exp_nan;
4775  
4776    /* Don't bias zero's, denorms or NaNs.  */
4777    if (!special_exponent)
4778      exponent -= fmt->exp_bias;
4779  
4780    /* Build the result algebraically.  Might go infinite, underflow, etc;
4781       who cares. */
4782  
4783    /* If this format uses a hidden bit, explicitly add it in now.  Otherwise,
4784       increment the exponent by one to account for the integer bit.  */
4785  
4786    if (!special_exponent)
4787      {
4788        if (fmt->intbit == floatformat_intbit_no)
4789  	dto = ldexp (1.0, exponent);
4790        else
4791  	exponent++;
4792      }
4793  
4794    while (mant_bits_left > 0)
4795      {
4796        mant_bits = min (mant_bits_left, 32);
4797  
4798        mant = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4799  			 mant_off, mant_bits);
4800  
4801        /* Handle denormalized numbers.  FIXME: What should we do for
4802  	 non-IEEE formats?  */
4803        if (exponent == 0 && mant != 0)
4804  	dto += ldexp ((double)mant,
4805  		      (- fmt->exp_bias
4806  		       - mant_bits
4807  		       - (mant_off - fmt->man_start)
4808  		       + 1));
4809        else
4810  	dto += ldexp ((double)mant, exponent - mant_bits);
4811        if (exponent != 0)
4812  	exponent -= mant_bits;
4813        mant_off += mant_bits;
4814        mant_bits_left -= mant_bits;
4815      }
4816  
4817    /* Negate it if negative.  */
4818    if (get_field (ufrom, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1))
4819      dto = -dto;
4820    *to = dto;
4821  }
4822  
4823  static void put_field (unsigned char *, enum floatformat_byteorders,
4824                         unsigned int,
4825                         unsigned int,
4826                         unsigned int,
4827                         unsigned long);
4828  
4829  /* Set a field which starts at START and is LEN bits long.  DATA and
4830     TOTAL_LEN are the thing we are extracting it from, in byteorder ORDER.  */
4831  static void
4832  put_field (unsigned char *data, enum floatformat_byteorders order,
4833             unsigned int total_len, unsigned int start, unsigned int len,
4834             unsigned long stuff_to_put)
4835  {
4836    unsigned int cur_byte;
4837    int cur_bitshift;
4838  
4839    /* Start at the least significant part of the field.  */
4840    cur_byte = (start + len) / FLOATFORMAT_CHAR_BIT;
4841    if (order == floatformat_little)
4842      cur_byte = (total_len / FLOATFORMAT_CHAR_BIT) - cur_byte - 1;
4843    cur_bitshift =
4844      ((start + len) % FLOATFORMAT_CHAR_BIT) - FLOATFORMAT_CHAR_BIT;
4845    *(data + cur_byte) &=
4846      ~(((1 << ((start + len) % FLOATFORMAT_CHAR_BIT)) - 1) << (-cur_bitshift));
4847    *(data + cur_byte) |=
4848      (stuff_to_put & ((1 << FLOATFORMAT_CHAR_BIT) - 1)) << (-cur_bitshift);
4849    cur_bitshift += FLOATFORMAT_CHAR_BIT;
4850    if (order == floatformat_little)
4851      ++cur_byte;
4852    else
4853      --cur_byte;
4854  
4855    /* Move towards the most significant part of the field.  */
4856    while ((unsigned int) cur_bitshift < len)
4857      {
4858        if (len - cur_bitshift < FLOATFORMAT_CHAR_BIT)
4859  	{
4860  	  /* This is the last byte.  */
4861  	  *(data + cur_byte) &=
4862  	    ~((1 << (len - cur_bitshift)) - 1);
4863  	  *(data + cur_byte) |= (stuff_to_put >> cur_bitshift);
4864  	}
4865        else
4866  	*(data + cur_byte) = ((stuff_to_put >> cur_bitshift)
4867  			      & ((1 << FLOATFORMAT_CHAR_BIT) - 1));
4868        cur_bitshift += FLOATFORMAT_CHAR_BIT;
4869        if (order == floatformat_little)
4870  	++cur_byte;
4871        else
4872  	--cur_byte;
4873      }
4874  }
4875  
4876  /* The converse: convert the double *FROM to an extended float
4877     and store where TO points.  Neither FROM nor TO have any alignment
4878     restrictions.  */
4879  
4880  void
4881  floatformat_from_double (const struct floatformat *fmt,
4882                           const double *from, char *to)
4883  {
4884    double dfrom;
4885    int exponent;
4886    double mant;
4887    unsigned int mant_bits, mant_off;
4888    int mant_bits_left;
4889    unsigned char *uto = (unsigned char *)to;
4890  
4891    dfrom = *from;
4892    memset (uto, 0, fmt->totalsize / FLOATFORMAT_CHAR_BIT);
4893  
4894    /* If negative, set the sign bit.  */
4895    if (dfrom < 0)
4896      {
4897        put_field (uto, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1, 1);
4898        dfrom = -dfrom;
4899      }
4900  
4901    if (dfrom == 0)
4902      {
4903        /* 0.0.  */
4904        return;
4905      }
4906  
4907    if (dfrom != dfrom)
4908      {
4909        /* NaN.  */
4910        put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4911  		 fmt->exp_len, fmt->exp_nan);
4912        /* Be sure it's not infinity, but NaN value is irrelevant.  */
4913        put_field (uto, fmt->byteorder, fmt->totalsize, fmt->man_start,
4914  		 32, 1);
4915        return;
4916      }
4917  
4918    if (dfrom + dfrom == dfrom)
4919      {
4920        /* This can only happen for an infinite value (or zero, which we
4921  	 already handled above).  */
4922        put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4923  		 fmt->exp_len, fmt->exp_nan);
4924        return;
4925      }
4926  
4927    mant = frexp (dfrom, &exponent);
4928    if (exponent + fmt->exp_bias - 1 > 0)
4929      put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4930  	       fmt->exp_len, exponent + fmt->exp_bias - 1);
4931    else
4932      {
4933        /* Handle a denormalized number.  FIXME: What should we do for
4934  	 non-IEEE formats?  */
4935        put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4936  		 fmt->exp_len, 0);
4937        mant = ldexp (mant, exponent + fmt->exp_bias - 1);
4938      }
4939  
4940    mant_bits_left = fmt->man_len;
4941    mant_off = fmt->man_start;
4942    while (mant_bits_left > 0)
4943      {
4944        unsigned long mant_long;
4945        mant_bits = mant_bits_left < 32 ? mant_bits_left : 32;
4946  
4947        mant *= 4294967296.0;
4948        mant_long = (unsigned long)mant;
4949        mant -= mant_long;
4950  
4951        /* If the integer bit is implicit, and we are not creating a
4952  	 denormalized number, then we need to discard it.  */
4953        if ((unsigned int) mant_bits_left == fmt->man_len
4954  	  && fmt->intbit == floatformat_intbit_no
4955  	  && exponent + fmt->exp_bias - 1 > 0)
4956  	{
4957  	  mant_long &= 0x7fffffff;
4958  	  mant_bits -= 1;
4959  	}
4960        else if (mant_bits < 32)
4961  	{
4962  	  /* The bits we want are in the most significant MANT_BITS bits of
4963  	     mant_long.  Move them to the least significant.  */
4964  	  mant_long >>= 32 - mant_bits;
4965  	}
4966  
4967        put_field (uto, fmt->byteorder, fmt->totalsize,
4968  		 mant_off, mant_bits, mant_long);
4969        mant_off += mant_bits;
4970        mant_bits_left -= mant_bits;
4971      }
4972  }
4973  
4974  /* Return non-zero iff the data at FROM is a valid number in format FMT.  */
4975  
4976  int
4977  floatformat_is_valid (const struct floatformat *fmt, const char *from)
4978  {
4979    return fmt->is_valid (fmt, from);
4980  }
4981  
4982  
4983  #ifdef IEEE_DEBUG
4984  
4985  /* This is to be run on a host which uses IEEE floating point.  */
4986  
4987  void
4988  ieee_test (double n)
4989  {
4990    double result;
4991  
4992    floatformat_to_double (&floatformat_ieee_double_little, (char *) &n,
4993  			 &result);
4994    if ((n != result && (! isnan (n) || ! isnan (result)))
4995        || (n < 0 && result >= 0)
4996        || (n >= 0 && result < 0))
4997      printf ("Differ(to): %.20g -> %.20g\n", n, result);
4998  
4999    floatformat_from_double (&floatformat_ieee_double_little, &n,
5000  			   (char *) &result);
5001    if ((n != result && (! isnan (n) || ! isnan (result)))
5002        || (n < 0 && result >= 0)
5003        || (n >= 0 && result < 0))
5004      printf ("Differ(from): %.20g -> %.20g\n", n, result);
5005  
5006  #if 0
5007    {
5008      char exten[16];
5009  
5010      floatformat_from_double (&floatformat_m68881_ext, &n, exten);
5011      floatformat_to_double (&floatformat_m68881_ext, exten, &result);
5012      if (n != result)
5013        printf ("Differ(to+from): %.20g -> %.20g\n", n, result);
5014    }
5015  #endif
5016  
5017  #if IEEE_DEBUG > 1
5018    /* This is to be run on a host which uses 68881 format.  */
5019    {
5020      long double ex = *(long double *)exten;
5021      if (ex != n)
5022        printf ("Differ(from vs. extended): %.20g\n", n);
5023    }
5024  #endif
5025  }
5026  
5027  int
5028  main (void)
5029  {
5030    ieee_test (0.0);
5031    ieee_test (0.5);
5032    ieee_test (256.0);
5033    ieee_test (0.12345);
5034    ieee_test (234235.78907234);
5035    ieee_test (-512.0);
5036    ieee_test (-0.004321);
5037    ieee_test (1.2E-70);
5038    ieee_test (1.2E-316);
5039    ieee_test (4.9406564584124654E-324);
5040    ieee_test (- 4.9406564584124654E-324);
5041    ieee_test (- 0.0);
5042    ieee_test (- INFINITY);
5043    ieee_test (- NAN);
5044    ieee_test (INFINITY);
5045    ieee_test (NAN);
5046    return 0;
5047  }
5048  #endif
5049  /* **** End of floatformat.c  */
5050