1 /* 2 * Target-specific parts of the CPU object 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qapi/error.h" 22 23 #include "exec/target_page.h" 24 #include "exec/page-protection.h" 25 #include "hw/qdev-core.h" 26 #include "hw/qdev-properties.h" 27 #include "qemu/error-report.h" 28 #include "qemu/qemu-print.h" 29 #include "migration/vmstate.h" 30 #ifdef CONFIG_USER_ONLY 31 #include "qemu.h" 32 #include "user/page-protection.h" 33 #else 34 #include "hw/core/sysemu-cpu-ops.h" 35 #include "exec/address-spaces.h" 36 #include "exec/memory.h" 37 #endif 38 #include "system/cpus.h" 39 #include "system/tcg.h" 40 #include "exec/tswap.h" 41 #include "exec/replay-core.h" 42 #include "exec/cpu-common.h" 43 #include "exec/exec-all.h" 44 #include "exec/tb-flush.h" 45 #include "exec/translation-block.h" 46 #include "exec/log.h" 47 #include "hw/core/accel-cpu.h" 48 #include "trace/trace-root.h" 49 #include "qemu/accel.h" 50 51 #ifndef CONFIG_USER_ONLY 52 static int cpu_common_post_load(void *opaque, int version_id) 53 { 54 CPUState *cpu = opaque; 55 56 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the 57 version_id is increased. */ 58 cpu->interrupt_request &= ~0x01; 59 tlb_flush(cpu); 60 61 /* loadvm has just updated the content of RAM, bypassing the 62 * usual mechanisms that ensure we flush TBs for writes to 63 * memory we've translated code from. So we must flush all TBs, 64 * which will now be stale. 65 */ 66 tb_flush(cpu); 67 68 return 0; 69 } 70 71 static int cpu_common_pre_load(void *opaque) 72 { 73 CPUState *cpu = opaque; 74 75 cpu->exception_index = -1; 76 77 return 0; 78 } 79 80 static bool cpu_common_exception_index_needed(void *opaque) 81 { 82 CPUState *cpu = opaque; 83 84 return tcg_enabled() && cpu->exception_index != -1; 85 } 86 87 static const VMStateDescription vmstate_cpu_common_exception_index = { 88 .name = "cpu_common/exception_index", 89 .version_id = 1, 90 .minimum_version_id = 1, 91 .needed = cpu_common_exception_index_needed, 92 .fields = (const VMStateField[]) { 93 VMSTATE_INT32(exception_index, CPUState), 94 VMSTATE_END_OF_LIST() 95 } 96 }; 97 98 static bool cpu_common_crash_occurred_needed(void *opaque) 99 { 100 CPUState *cpu = opaque; 101 102 return cpu->crash_occurred; 103 } 104 105 static const VMStateDescription vmstate_cpu_common_crash_occurred = { 106 .name = "cpu_common/crash_occurred", 107 .version_id = 1, 108 .minimum_version_id = 1, 109 .needed = cpu_common_crash_occurred_needed, 110 .fields = (const VMStateField[]) { 111 VMSTATE_BOOL(crash_occurred, CPUState), 112 VMSTATE_END_OF_LIST() 113 } 114 }; 115 116 const VMStateDescription vmstate_cpu_common = { 117 .name = "cpu_common", 118 .version_id = 1, 119 .minimum_version_id = 1, 120 .pre_load = cpu_common_pre_load, 121 .post_load = cpu_common_post_load, 122 .fields = (const VMStateField[]) { 123 VMSTATE_UINT32(halted, CPUState), 124 VMSTATE_UINT32(interrupt_request, CPUState), 125 VMSTATE_END_OF_LIST() 126 }, 127 .subsections = (const VMStateDescription * const []) { 128 &vmstate_cpu_common_exception_index, 129 &vmstate_cpu_common_crash_occurred, 130 NULL 131 } 132 }; 133 #endif 134 135 bool cpu_exec_realizefn(CPUState *cpu, Error **errp) 136 { 137 if (!accel_cpu_common_realize(cpu, errp)) { 138 return false; 139 } 140 141 /* Wait until cpu initialization complete before exposing cpu. */ 142 cpu_list_add(cpu); 143 144 #ifdef CONFIG_USER_ONLY 145 assert(qdev_get_vmsd(DEVICE(cpu)) == NULL || 146 qdev_get_vmsd(DEVICE(cpu))->unmigratable); 147 #else 148 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { 149 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); 150 } 151 if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) { 152 vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu); 153 } 154 #endif /* CONFIG_USER_ONLY */ 155 156 return true; 157 } 158 159 void cpu_exec_unrealizefn(CPUState *cpu) 160 { 161 #ifndef CONFIG_USER_ONLY 162 CPUClass *cc = CPU_GET_CLASS(cpu); 163 164 if (cc->sysemu_ops->legacy_vmsd != NULL) { 165 vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu); 166 } 167 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { 168 vmstate_unregister(NULL, &vmstate_cpu_common, cpu); 169 } 170 #endif 171 172 cpu_list_remove(cpu); 173 /* 174 * Now that the vCPU has been removed from the RCU list, we can call 175 * accel_cpu_common_unrealize, which may free fields using call_rcu. 176 */ 177 accel_cpu_common_unrealize(cpu); 178 } 179 180 /* 181 * This can't go in hw/core/cpu.c because that file is compiled only 182 * once for both user-mode and system builds. 183 */ 184 static const Property cpu_common_props[] = { 185 #ifdef CONFIG_USER_ONLY 186 /* 187 * Create a property for the user-only object, so users can 188 * adjust prctl(PR_SET_UNALIGN) from the command-line. 189 * Has no effect if the target does not support the feature. 190 */ 191 DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState, 192 prctl_unalign_sigbus, false), 193 #else 194 /* 195 * Create a memory property for system CPU object, so users can 196 * wire up its memory. The default if no link is set up is to use 197 * the system address space. 198 */ 199 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION, 200 MemoryRegion *), 201 #endif 202 }; 203 204 #ifndef CONFIG_USER_ONLY 205 static bool cpu_get_start_powered_off(Object *obj, Error **errp) 206 { 207 CPUState *cpu = CPU(obj); 208 return cpu->start_powered_off; 209 } 210 211 static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp) 212 { 213 CPUState *cpu = CPU(obj); 214 cpu->start_powered_off = value; 215 } 216 #endif 217 218 void cpu_class_init_props(DeviceClass *dc) 219 { 220 #ifndef CONFIG_USER_ONLY 221 ObjectClass *oc = OBJECT_CLASS(dc); 222 223 /* 224 * We can't use DEFINE_PROP_BOOL in the Property array for this 225 * property, because we want this to be settable after realize. 226 */ 227 object_class_property_add_bool(oc, "start-powered-off", 228 cpu_get_start_powered_off, 229 cpu_set_start_powered_off); 230 #endif 231 232 device_class_set_props(dc, cpu_common_props); 233 } 234 235 void cpu_exec_initfn(CPUState *cpu) 236 { 237 cpu->as = NULL; 238 cpu->num_ases = 0; 239 240 #ifndef CONFIG_USER_ONLY 241 cpu->memory = get_system_memory(); 242 object_ref(OBJECT(cpu->memory)); 243 #endif 244 } 245 246 char *cpu_model_from_type(const char *typename) 247 { 248 const char *suffix = "-" CPU_RESOLVING_TYPE; 249 250 if (!object_class_by_name(typename)) { 251 return NULL; 252 } 253 254 if (g_str_has_suffix(typename, suffix)) { 255 return g_strndup(typename, strlen(typename) - strlen(suffix)); 256 } 257 258 return g_strdup(typename); 259 } 260 261 const char *parse_cpu_option(const char *cpu_option) 262 { 263 ObjectClass *oc; 264 CPUClass *cc; 265 gchar **model_pieces; 266 const char *cpu_type; 267 268 model_pieces = g_strsplit(cpu_option, ",", 2); 269 if (!model_pieces[0]) { 270 error_report("-cpu option cannot be empty"); 271 exit(1); 272 } 273 274 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); 275 if (oc == NULL) { 276 error_report("unable to find CPU model '%s'", model_pieces[0]); 277 g_strfreev(model_pieces); 278 exit(EXIT_FAILURE); 279 } 280 281 cpu_type = object_class_get_name(oc); 282 cc = CPU_CLASS(oc); 283 cc->parse_features(cpu_type, model_pieces[1], &error_fatal); 284 g_strfreev(model_pieces); 285 return cpu_type; 286 } 287 288 #ifndef cpu_list 289 static void cpu_list_entry(gpointer data, gpointer user_data) 290 { 291 CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data)); 292 const char *typename = object_class_get_name(OBJECT_CLASS(data)); 293 g_autofree char *model = cpu_model_from_type(typename); 294 295 if (cc->deprecation_note) { 296 qemu_printf(" %s (deprecated)\n", model); 297 } else { 298 qemu_printf(" %s\n", model); 299 } 300 } 301 302 static void cpu_list(void) 303 { 304 GSList *list; 305 306 list = object_class_get_list_sorted(TYPE_CPU, false); 307 qemu_printf("Available CPUs:\n"); 308 g_slist_foreach(list, cpu_list_entry, NULL); 309 g_slist_free(list); 310 } 311 #endif 312 313 void list_cpus(void) 314 { 315 cpu_list(); 316 } 317 318 /* enable or disable single step mode. EXCP_DEBUG is returned by the 319 CPU loop after each instruction */ 320 void cpu_single_step(CPUState *cpu, int enabled) 321 { 322 if (cpu->singlestep_enabled != enabled) { 323 cpu->singlestep_enabled = enabled; 324 325 #if !defined(CONFIG_USER_ONLY) 326 const AccelOpsClass *ops = cpus_get_accel(); 327 if (ops->update_guest_debug) { 328 ops->update_guest_debug(cpu); 329 } 330 #endif 331 332 trace_breakpoint_singlestep(cpu->cpu_index, enabled); 333 } 334 } 335 336 void cpu_abort(CPUState *cpu, const char *fmt, ...) 337 { 338 va_list ap; 339 va_list ap2; 340 341 va_start(ap, fmt); 342 va_copy(ap2, ap); 343 fprintf(stderr, "qemu: fatal: "); 344 vfprintf(stderr, fmt, ap); 345 fprintf(stderr, "\n"); 346 cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP); 347 if (qemu_log_separate()) { 348 FILE *logfile = qemu_log_trylock(); 349 if (logfile) { 350 fprintf(logfile, "qemu: fatal: "); 351 vfprintf(logfile, fmt, ap2); 352 fprintf(logfile, "\n"); 353 cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP); 354 qemu_log_unlock(logfile); 355 } 356 } 357 va_end(ap2); 358 va_end(ap); 359 replay_finish(); 360 #if defined(CONFIG_USER_ONLY) 361 { 362 struct sigaction act; 363 sigfillset(&act.sa_mask); 364 act.sa_handler = SIG_DFL; 365 act.sa_flags = 0; 366 sigaction(SIGABRT, &act, NULL); 367 } 368 #endif 369 abort(); 370 } 371 372 /* physical memory access (slow version, mainly for debug) */ 373 #if defined(CONFIG_USER_ONLY) 374 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, 375 void *ptr, size_t len, bool is_write) 376 { 377 int flags; 378 vaddr l, page; 379 void * p; 380 uint8_t *buf = ptr; 381 ssize_t written; 382 int ret = -1; 383 int fd = -1; 384 385 while (len > 0) { 386 page = addr & TARGET_PAGE_MASK; 387 l = (page + TARGET_PAGE_SIZE) - addr; 388 if (l > len) 389 l = len; 390 flags = page_get_flags(page); 391 if (!(flags & PAGE_VALID)) { 392 goto out_close; 393 } 394 if (is_write) { 395 if (flags & PAGE_WRITE) { 396 /* XXX: this code should not depend on lock_user */ 397 p = lock_user(VERIFY_WRITE, addr, l, 0); 398 if (!p) { 399 goto out_close; 400 } 401 memcpy(p, buf, l); 402 unlock_user(p, addr, l); 403 } else { 404 /* Bypass the host page protection using ptrace. */ 405 if (fd == -1) { 406 fd = open("/proc/self/mem", O_WRONLY); 407 if (fd == -1) { 408 goto out; 409 } 410 } 411 /* 412 * If there is a TranslationBlock and we weren't bypassing the 413 * host page protection, the memcpy() above would SEGV, 414 * ultimately leading to page_unprotect(). So invalidate the 415 * translations manually. Both invalidation and pwrite() must 416 * be under mmap_lock() in order to prevent the creation of 417 * another TranslationBlock in between. 418 */ 419 mmap_lock(); 420 tb_invalidate_phys_range(addr, addr + l - 1); 421 written = pwrite(fd, buf, l, 422 (off_t)(uintptr_t)g2h_untagged(addr)); 423 mmap_unlock(); 424 if (written != l) { 425 goto out_close; 426 } 427 } 428 } else if (flags & PAGE_READ) { 429 /* XXX: this code should not depend on lock_user */ 430 p = lock_user(VERIFY_READ, addr, l, 1); 431 if (!p) { 432 goto out_close; 433 } 434 memcpy(buf, p, l); 435 unlock_user(p, addr, 0); 436 } else { 437 /* Bypass the host page protection using ptrace. */ 438 if (fd == -1) { 439 fd = open("/proc/self/mem", O_RDONLY); 440 if (fd == -1) { 441 goto out; 442 } 443 } 444 if (pread(fd, buf, l, 445 (off_t)(uintptr_t)g2h_untagged(addr)) != l) { 446 goto out_close; 447 } 448 } 449 len -= l; 450 buf += l; 451 addr += l; 452 } 453 ret = 0; 454 out_close: 455 if (fd != -1) { 456 close(fd); 457 } 458 out: 459 return ret; 460 } 461 #endif 462 463 bool target_words_bigendian(void) 464 { 465 return TARGET_BIG_ENDIAN; 466 } 467 468 const char *target_name(void) 469 { 470 return TARGET_NAME; 471 } 472