1 /*
2 * RISC-V thread support
3 *
4 * Copyright (c) 2019 Mark Corbin
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef TARGET_ARCH_THREAD_H
21 #define TARGET_ARCH_THREAD_H
22
23 /* Compare with cpu_set_upcall() in riscv/riscv/vm_machdep.c */
target_thread_set_upcall(CPURISCVState * regs,abi_ulong entry,abi_ulong arg,abi_ulong stack_base,abi_ulong stack_size)24 static inline void target_thread_set_upcall(CPURISCVState *regs,
25 abi_ulong entry, abi_ulong arg, abi_ulong stack_base,
26 abi_ulong stack_size)
27 {
28 abi_ulong sp;
29
30 sp = ROUND_DOWN(stack_base + stack_size, 16);
31
32 regs->gpr[xSP] = sp;
33 regs->pc = entry;
34 regs->gpr[xA0] = arg;
35 }
36
37 /* Compare with exec_setregs() in riscv/riscv/machdep.c */
target_thread_init(struct target_pt_regs * regs,struct image_info * infop)38 static inline void target_thread_init(struct target_pt_regs *regs,
39 struct image_info *infop)
40 {
41 regs->sepc = infop->entry;
42 regs->regs[xRA] = infop->entry;
43 regs->regs[xA0] = infop->start_stack;
44 regs->regs[xSP] = ROUND_DOWN(infop->start_stack, 16);
45 }
46
47 #endif /* TARGET_ARCH_THREAD_H */
48