xref: /openbmc/qemu/bsd-user/riscv/target.h (revision 2e1cacfb)
1 /*
2  * Riscv64 general target stuff that's common to all aarch details
3  *
4  * Copyright (c) 2022 M. Warner Losh <imp@bsdimp.com>
5  *
6  * SPDX-License-Identifier: GPL-2.0-or-later
7  */
8 
9 #ifndef TARGET_H
10 #define TARGET_H
11 
12 /*
13  * riscv64 ABI does not 'lump' the registers for 64-bit args.
14  */
15 static inline bool regpairs_aligned(void *cpu_env)
16 {
17     return false;
18 }
19 
20 #endif /* TARGET_H */
21