1 /*
2  *  arm thread support
3  *
4  *  Copyright (c) 2013 Stacey D. Son
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef TARGET_ARCH_THREAD_H
21 #define TARGET_ARCH_THREAD_H
22 
23 /* Compare to arm/arm/vm_machdep.c cpu_set_upcall_kse() */
24 static inline void target_thread_set_upcall(CPUARMState *env, abi_ulong entry,
25     abi_ulong arg, abi_ulong stack_base, abi_ulong stack_size)
26 {
27     abi_ulong sp;
28 
29     /*
30      * Make sure the stack is properly aligned.
31      * arm/include/param.h (STACKLIGN() macro)
32      */
33     sp = (u_int)(stack_base + stack_size) & ~0x7;
34 
35     /* sp = stack base */
36     env->regs[13] = sp;
37     /* pc = start function entry */
38     env->regs[15] = entry & 0xfffffffe;
39     /* r0 = arg */
40     env->regs[0] = arg;
41     env->spsr = ARM_CPU_MODE_USR;
42     /*
43      * Thumb mode is encoded by the low bit in the entry point (since ARM can't
44      * execute at odd addresses). When it's set, set the Thumb bit (T) in the
45      * CPSR.
46      */
47     cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr);
48 }
49 
50 static inline void target_thread_init(struct target_pt_regs *regs,
51         struct image_info *infop)
52 {
53     abi_long stack = infop->start_stack;
54     memset(regs, 0, sizeof(*regs));
55     regs->ARM_cpsr = ARM_CPU_MODE_USR;
56     /*
57      * Thumb mode is encoded by the low bit in the entry point (since ARM can't
58      * execute at odd addresses). When it's set, set the Thumb bit (T) in the
59      * CPSR.
60      */
61     if (infop->entry & 1) {
62         regs->ARM_cpsr |= CPSR_T;
63     }
64     regs->ARM_pc = infop->entry & 0xfffffffe;
65     regs->ARM_sp = stack;
66     regs->ARM_lr = infop->entry & 0xfffffffe;
67     /*
68      * FreeBSD kernel passes the ps_strings pointer in r0. This is used by some
69      * programs to set status messages that we see in ps. bsd-user doesn't
70      * support that functionality, so it's ignored. When set to 0, FreeBSD's csu
71      * code ignores it. For the static case, r1 and r2 are effectively ignored
72      * by the csu __startup() routine. For the dynamic case, rtld saves r0 but
73      * generates r1 and r2 and passes them into the csu _startup.
74      *
75      * r0 ps_strings 0 passed since ps arg setting not supported
76      * r1 obj_main   ignored by _start(), so 0 passed
77      * r2 cleanup    generated by rtld or ignored by _start(), so 0 passed
78      */
79 }
80 
81 #endif /* TARGET_ARCH_THREAD_H */
82