1 /* 2 * arm cpu init and loop 3 * 4 * Copyright (c) 2013 Stacey D. Son 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef TARGET_ARCH_CPU_H 21 #define TARGET_ARCH_CPU_H 22 23 #include "target_arch.h" 24 #include "signal-common.h" 25 26 #define TARGET_DEFAULT_CPU_MODEL "any" 27 28 static inline void target_cpu_init(CPUARMState *env, 29 struct target_pt_regs *regs) 30 { 31 int i; 32 33 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, 34 CPSRWriteByInstr); 35 for (i = 0; i < 16; i++) { 36 env->regs[i] = regs->uregs[i]; 37 } 38 } 39 40 static inline void target_cpu_loop(CPUARMState *env) 41 { 42 int trapnr, si_signo, si_code; 43 CPUState *cs = env_cpu(env); 44 45 for (;;) { 46 cpu_exec_start(cs); 47 trapnr = cpu_exec(cs); 48 cpu_exec_end(cs); 49 process_queued_cpu_work(cs); 50 switch (trapnr) { 51 case EXCP_UDEF: 52 case EXCP_NOCP: 53 case EXCP_INVSTATE: 54 /* 55 * See arm/arm/undefined.c undefinedinstruction(); 56 * 57 * A number of details aren't emulated (they likely don't matter): 58 * o Misaligned PC generates ILL_ILLADR (these can't come from qemu) 59 * o Thumb-2 instructions generate ILLADR 60 * o Both modes implement coprocessor instructions, which we don't 61 * do here. FreeBSD just implements them for the VFP coprocessor 62 * and special kernel breakpoints, trace points, dtrace, etc. 63 */ 64 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]); 65 break; 66 case EXCP_SWI: 67 { 68 int ret; 69 abi_ulong params = get_sp_from_cpustate(env); 70 int32_t syscall_nr = env->regs[7]; 71 int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8; 72 73 /* See arm/arm/syscall.c cpu_fetch_syscall_args() */ 74 if (syscall_nr == TARGET_FREEBSD_NR_syscall) { 75 syscall_nr = env->regs[0]; 76 arg1 = env->regs[1]; 77 arg2 = env->regs[2]; 78 arg3 = env->regs[3]; 79 get_user_s32(arg4, params); 80 params += sizeof(int32_t); 81 get_user_s32(arg5, params); 82 params += sizeof(int32_t); 83 get_user_s32(arg6, params); 84 params += sizeof(int32_t); 85 get_user_s32(arg7, params); 86 arg8 = 0; 87 } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) { 88 syscall_nr = env->regs[0]; 89 arg1 = env->regs[2]; 90 arg2 = env->regs[3]; 91 get_user_s32(arg3, params); 92 params += sizeof(int32_t); 93 get_user_s32(arg4, params); 94 params += sizeof(int32_t); 95 get_user_s32(arg5, params); 96 params += sizeof(int32_t); 97 get_user_s32(arg6, params); 98 arg7 = 0; 99 arg8 = 0; 100 } else { 101 arg1 = env->regs[0]; 102 arg2 = env->regs[1]; 103 arg3 = env->regs[2]; 104 arg4 = env->regs[3]; 105 get_user_s32(arg5, params); 106 params += sizeof(int32_t); 107 get_user_s32(arg6, params); 108 params += sizeof(int32_t); 109 get_user_s32(arg7, params); 110 params += sizeof(int32_t); 111 get_user_s32(arg8, params); 112 } 113 ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3, 114 arg4, arg5, arg6, arg7, arg8); 115 /* 116 * Compare to arm/arm/vm_machdep.c 117 * cpu_set_syscall_retval() 118 */ 119 if (-TARGET_EJUSTRETURN == ret) { 120 /* 121 * Returning from a successful sigreturn syscall. 122 * Avoid clobbering register state. 123 */ 124 break; 125 } 126 if (-TARGET_ERESTART == ret) { 127 env->regs[15] -= env->thumb ? 2 : 4; 128 break; 129 } 130 if ((unsigned int)ret >= (unsigned int)(-515)) { 131 ret = -ret; 132 cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr); 133 env->regs[0] = ret; 134 } else { 135 cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr); 136 env->regs[0] = ret; /* XXX need to handle lseek()? */ 137 /* env->regs[1] = 0; */ 138 } 139 } 140 break; 141 case EXCP_INTERRUPT: 142 /* just indicate that signals should be handled asap */ 143 break; 144 case EXCP_PREFETCH_ABORT: 145 case EXCP_DATA_ABORT: 146 /* 147 * See arm/arm/trap-v6.c prefetch_abort_handler() and 148 * data_abort_handler() 149 * 150 * However, FreeBSD maps these to a generic value and then uses that 151 * to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I 152 * believe that the indirection maps the same as Linux, but haven't 153 * chased down every single possible indirection. 154 */ 155 156 /* For user-only we don't set TTBCR_EAE, so look at the FSR. */ 157 switch (env->exception.fsr & 0x1f) { 158 case 0x1: /* Alignment */ 159 si_signo = TARGET_SIGBUS; 160 si_code = TARGET_BUS_ADRALN; 161 break; 162 case 0x3: /* Access flag fault, level 1 */ 163 case 0x6: /* Access flag fault, level 2 */ 164 case 0x9: /* Domain fault, level 1 */ 165 case 0xb: /* Domain fault, level 2 */ 166 case 0xd: /* Permission fault, level 1 */ 167 case 0xf: /* Permission fault, level 2 */ 168 si_signo = TARGET_SIGSEGV; 169 si_code = TARGET_SEGV_ACCERR; 170 break; 171 case 0x5: /* Translation fault, level 1 */ 172 case 0x7: /* Translation fault, level 2 */ 173 si_signo = TARGET_SIGSEGV; 174 si_code = TARGET_SEGV_MAPERR; 175 break; 176 default: 177 g_assert_not_reached(); 178 } 179 force_sig_fault(si_signo, si_code, env->exception.vaddress); 180 break; 181 case EXCP_DEBUG: 182 case EXCP_BKPT: 183 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]); 184 break; 185 case EXCP_YIELD: 186 /* nothing to do here for user-mode, just resume guest code */ 187 break; 188 case EXCP_ATOMIC: 189 cpu_exec_step_atomic(cs); 190 break; 191 default: 192 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 193 trapnr); 194 cpu_dump_state(cs, stderr, 0); 195 abort(); 196 } /* switch() */ 197 process_pending_signals(env); 198 } /* for (;;) */ 199 } 200 201 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp) 202 { 203 if (newsp) { 204 env->regs[13] = newsp; 205 } 206 env->regs[0] = 0; 207 } 208 209 static inline void target_cpu_reset(CPUArchState *env) 210 { 211 } 212 213 #endif /* TARGET_ARCH_CPU_H */ 214