1 /*
2 * ARM AArch64 ELF definitions for bsd-user
3 *
4 * Copyright (c) 2015 Stacey D. Son
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef TARGET_ARCH_ELF_H
21 #define TARGET_ARCH_ELF_H
22
23 #define ELF_START_MMAP 0x80000000
24 #define ELF_ET_DYN_LOAD_ADDR 0x100000
25
26 #define elf_check_arch(x) ((x) == EM_AARCH64)
27
28 #define ELF_CLASS ELFCLASS64
29 #define ELF_DATA ELFDATA2LSB
30 #define ELF_ARCH EM_AARCH64
31
32 #define USE_ELF_CORE_DUMP
33 #define ELF_EXEC_PAGESIZE 4096
34
35 enum {
36 ARM_HWCAP_A64_FP = 1 << 0,
37 ARM_HWCAP_A64_ASIMD = 1 << 1,
38 ARM_HWCAP_A64_EVTSTRM = 1 << 2,
39 ARM_HWCAP_A64_AES = 1 << 3,
40 ARM_HWCAP_A64_PMULL = 1 << 4,
41 ARM_HWCAP_A64_SHA1 = 1 << 5,
42 ARM_HWCAP_A64_SHA2 = 1 << 6,
43 ARM_HWCAP_A64_CRC32 = 1 << 7,
44 ARM_HWCAP_A64_ATOMICS = 1 << 8,
45 ARM_HWCAP_A64_FPHP = 1 << 9,
46 ARM_HWCAP_A64_ASIMDHP = 1 << 10,
47 ARM_HWCAP_A64_CPUID = 1 << 11,
48 ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
49 ARM_HWCAP_A64_JSCVT = 1 << 13,
50 ARM_HWCAP_A64_FCMA = 1 << 14,
51 ARM_HWCAP_A64_LRCPC = 1 << 15,
52 ARM_HWCAP_A64_DCPOP = 1 << 16,
53 ARM_HWCAP_A64_SHA3 = 1 << 17,
54 ARM_HWCAP_A64_SM3 = 1 << 18,
55 ARM_HWCAP_A64_SM4 = 1 << 19,
56 ARM_HWCAP_A64_ASIMDDP = 1 << 20,
57 ARM_HWCAP_A64_SHA512 = 1 << 21,
58 ARM_HWCAP_A64_SVE = 1 << 22,
59 ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
60 ARM_HWCAP_A64_DIT = 1 << 24,
61 ARM_HWCAP_A64_USCAT = 1 << 25,
62 ARM_HWCAP_A64_ILRCPC = 1 << 26,
63 ARM_HWCAP_A64_FLAGM = 1 << 27,
64 ARM_HWCAP_A64_SSBS = 1 << 28,
65 ARM_HWCAP_A64_SB = 1 << 29,
66 ARM_HWCAP_A64_PACA = 1 << 30,
67 ARM_HWCAP_A64_PACG = 1UL << 31,
68
69 ARM_HWCAP2_A64_DCPODP = 1 << 0,
70 ARM_HWCAP2_A64_SVE2 = 1 << 1,
71 ARM_HWCAP2_A64_SVEAES = 1 << 2,
72 ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
73 ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
74 ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
75 ARM_HWCAP2_A64_SVESM4 = 1 << 6,
76 ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
77 ARM_HWCAP2_A64_FRINT = 1 << 8,
78 ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
79 ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
80 ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
81 ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
82 ARM_HWCAP2_A64_I8MM = 1 << 13,
83 ARM_HWCAP2_A64_BF16 = 1 << 14,
84 ARM_HWCAP2_A64_DGH = 1 << 15,
85 ARM_HWCAP2_A64_RNG = 1 << 16,
86 ARM_HWCAP2_A64_BTI = 1 << 17,
87 ARM_HWCAP2_A64_MTE = 1 << 18,
88 };
89
90 #define ELF_HWCAP get_elf_hwcap()
91 #define ELF_HWCAP2 get_elf_hwcap2()
92
93 #define GET_FEATURE_ID(feat, hwcap) \
94 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
95
get_elf_hwcap(void)96 static uint32_t get_elf_hwcap(void)
97 {
98 ARMCPU *cpu = ARM_CPU(thread_cpu);
99 uint32_t hwcaps = 0;
100
101 hwcaps |= ARM_HWCAP_A64_FP;
102 hwcaps |= ARM_HWCAP_A64_ASIMD;
103 hwcaps |= ARM_HWCAP_A64_CPUID;
104
105 /* probe for the extra features */
106
107 GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
108 GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
109 GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
110 GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
111 GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
112 GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
113 GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
114 GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
115 GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
116 GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
117 GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
118 GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
119 GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
120 GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
121 GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
122 GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
123 GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
124 GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
125 GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
126 GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
127 GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
128 GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
129 GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
130
131 return hwcaps;
132 }
133
get_elf_hwcap2(void)134 static uint32_t get_elf_hwcap2(void)
135 {
136 ARMCPU *cpu = ARM_CPU(thread_cpu);
137 uint32_t hwcaps = 0;
138
139 GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
140 GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
141 GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES);
142 GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
143 GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
144 GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
145 GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
146 GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
147 GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
148 GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
149 GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
150 GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
151 GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
152 GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
153 GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
154 GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
155 GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
156 GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
157
158 return hwcaps;
159 }
160
161 #undef GET_FEATURE_ID
162
163 #endif /* TARGET_ARCH_ELF_H */
164