1 /* 2 * User emulator execution 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include "qemu/osdep.h" 20 #include "accel/tcg/cpu-ops.h" 21 #include "disas/disas.h" 22 #include "cpu.h" 23 #include "exec/vaddr.h" 24 #include "exec/exec-all.h" 25 #include "exec/tlb-flags.h" 26 #include "tcg/tcg.h" 27 #include "qemu/bitops.h" 28 #include "qemu/rcu.h" 29 #include "exec/cpu_ldst.h" 30 #include "user/cpu_loop.h" 31 #include "qemu/main-loop.h" 32 #include "user/page-protection.h" 33 #include "exec/page-protection.h" 34 #include "exec/helper-proto.h" 35 #include "qemu/atomic128.h" 36 #include "qemu/bswap.h" 37 #include "qemu/int128.h" 38 #include "trace.h" 39 #include "tcg/tcg-ldst.h" 40 #include "internal-common.h" 41 #include "internal-target.h" 42 #include "tb-internal.h" 43 44 __thread uintptr_t helper_retaddr; 45 46 //#define DEBUG_SIGNAL 47 48 void cpu_interrupt(CPUState *cpu, int mask) 49 { 50 g_assert(bql_locked()); 51 cpu->interrupt_request |= mask; 52 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 53 } 54 55 /* 56 * Adjust the pc to pass to cpu_restore_state; return the memop type. 57 */ 58 MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) 59 { 60 switch (helper_retaddr) { 61 default: 62 /* 63 * Fault during host memory operation within a helper function. 64 * The helper's host return address, saved here, gives us a 65 * pointer into the generated code that will unwind to the 66 * correct guest pc. 67 */ 68 *pc = helper_retaddr; 69 break; 70 71 case 0: 72 /* 73 * Fault during host memory operation within generated code. 74 * (Or, a unrelated bug within qemu, but we can't tell from here). 75 * 76 * We take the host pc from the signal frame. However, we cannot 77 * use that value directly. Within cpu_restore_state_from_tb, we 78 * assume PC comes from GETPC(), as used by the helper functions, 79 * so we adjust the address by -GETPC_ADJ to form an address that 80 * is within the call insn, so that the address does not accidentally 81 * match the beginning of the next guest insn. However, when the 82 * pc comes from the signal frame it points to the actual faulting 83 * host memory insn and not the return from a call insn. 84 * 85 * Therefore, adjust to compensate for what will be done later 86 * by cpu_restore_state_from_tb. 87 */ 88 *pc += GETPC_ADJ; 89 break; 90 91 case 1: 92 /* 93 * Fault during host read for translation, or loosely, "execution". 94 * 95 * The guest pc is already pointing to the start of the TB for which 96 * code is being generated. If the guest translator manages the 97 * page crossings correctly, this is exactly the correct address 98 * (and if the translator doesn't handle page boundaries correctly 99 * there's little we can do about that here). Therefore, do not 100 * trigger the unwinder. 101 */ 102 *pc = 0; 103 return MMU_INST_FETCH; 104 } 105 106 return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; 107 } 108 109 /** 110 * handle_sigsegv_accerr_write: 111 * @cpu: the cpu context 112 * @old_set: the sigset_t from the signal ucontext_t 113 * @host_pc: the host pc, adjusted for the signal 114 * @guest_addr: the guest address of the fault 115 * 116 * Return true if the write fault has been handled, and should be re-tried. 117 * 118 * Note that it is important that we don't call page_unprotect() unless 119 * this is really a "write to nonwritable page" fault, because 120 * page_unprotect() assumes that if it is called for an access to 121 * a page that's writable this means we had two threads racing and 122 * another thread got there first and already made the page writable; 123 * so we will retry the access. If we were to call page_unprotect() 124 * for some other kind of fault that should really be passed to the 125 * guest, we'd end up in an infinite loop of retrying the faulting access. 126 */ 127 bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, 128 uintptr_t host_pc, abi_ptr guest_addr) 129 { 130 switch (page_unprotect(guest_addr, host_pc)) { 131 case 0: 132 /* 133 * Fault not caused by a page marked unwritable to protect 134 * cached translations, must be the guest binary's problem. 135 */ 136 return false; 137 case 1: 138 /* 139 * Fault caused by protection of cached translation; TBs 140 * invalidated, so resume execution. 141 */ 142 return true; 143 case 2: 144 /* 145 * Fault caused by protection of cached translation, and the 146 * currently executing TB was modified and must be exited immediately. 147 */ 148 sigprocmask(SIG_SETMASK, old_set, NULL); 149 cpu_loop_exit_noexc(cpu); 150 /* NORETURN */ 151 default: 152 g_assert_not_reached(); 153 } 154 } 155 156 typedef struct PageFlagsNode { 157 struct rcu_head rcu; 158 IntervalTreeNode itree; 159 int flags; 160 } PageFlagsNode; 161 162 static IntervalTreeRoot pageflags_root; 163 164 static PageFlagsNode *pageflags_find(target_ulong start, target_ulong last) 165 { 166 IntervalTreeNode *n; 167 168 n = interval_tree_iter_first(&pageflags_root, start, last); 169 return n ? container_of(n, PageFlagsNode, itree) : NULL; 170 } 171 172 static PageFlagsNode *pageflags_next(PageFlagsNode *p, target_ulong start, 173 target_ulong last) 174 { 175 IntervalTreeNode *n; 176 177 n = interval_tree_iter_next(&p->itree, start, last); 178 return n ? container_of(n, PageFlagsNode, itree) : NULL; 179 } 180 181 int walk_memory_regions(void *priv, walk_memory_regions_fn fn) 182 { 183 IntervalTreeNode *n; 184 int rc = 0; 185 186 mmap_lock(); 187 for (n = interval_tree_iter_first(&pageflags_root, 0, -1); 188 n != NULL; 189 n = interval_tree_iter_next(n, 0, -1)) { 190 PageFlagsNode *p = container_of(n, PageFlagsNode, itree); 191 192 rc = fn(priv, n->start, n->last + 1, p->flags); 193 if (rc != 0) { 194 break; 195 } 196 } 197 mmap_unlock(); 198 199 return rc; 200 } 201 202 static int dump_region(void *priv, target_ulong start, 203 target_ulong end, unsigned long prot) 204 { 205 FILE *f = (FILE *)priv; 206 207 fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx" "TARGET_FMT_lx" %c%c%c\n", 208 start, end, end - start, 209 ((prot & PAGE_READ) ? 'r' : '-'), 210 ((prot & PAGE_WRITE) ? 'w' : '-'), 211 ((prot & PAGE_EXEC) ? 'x' : '-')); 212 return 0; 213 } 214 215 /* dump memory mappings */ 216 void page_dump(FILE *f) 217 { 218 const int length = sizeof(target_ulong) * 2; 219 220 fprintf(f, "%-*s %-*s %-*s %s\n", 221 length, "start", length, "end", length, "size", "prot"); 222 walk_memory_regions(f, dump_region); 223 } 224 225 int page_get_flags(target_ulong address) 226 { 227 PageFlagsNode *p = pageflags_find(address, address); 228 229 /* 230 * See util/interval-tree.c re lockless lookups: no false positives but 231 * there are false negatives. If we find nothing, retry with the mmap 232 * lock acquired. 233 */ 234 if (p) { 235 return p->flags; 236 } 237 if (have_mmap_lock()) { 238 return 0; 239 } 240 241 mmap_lock(); 242 p = pageflags_find(address, address); 243 mmap_unlock(); 244 return p ? p->flags : 0; 245 } 246 247 /* A subroutine of page_set_flags: insert a new node for [start,last]. */ 248 static void pageflags_create(target_ulong start, target_ulong last, int flags) 249 { 250 PageFlagsNode *p = g_new(PageFlagsNode, 1); 251 252 p->itree.start = start; 253 p->itree.last = last; 254 p->flags = flags; 255 interval_tree_insert(&p->itree, &pageflags_root); 256 } 257 258 /* A subroutine of page_set_flags: remove everything in [start,last]. */ 259 static bool pageflags_unset(target_ulong start, target_ulong last) 260 { 261 bool inval_tb = false; 262 263 while (true) { 264 PageFlagsNode *p = pageflags_find(start, last); 265 target_ulong p_last; 266 267 if (!p) { 268 break; 269 } 270 271 if (p->flags & PAGE_EXEC) { 272 inval_tb = true; 273 } 274 275 interval_tree_remove(&p->itree, &pageflags_root); 276 p_last = p->itree.last; 277 278 if (p->itree.start < start) { 279 /* Truncate the node from the end, or split out the middle. */ 280 p->itree.last = start - 1; 281 interval_tree_insert(&p->itree, &pageflags_root); 282 if (last < p_last) { 283 pageflags_create(last + 1, p_last, p->flags); 284 break; 285 } 286 } else if (p_last <= last) { 287 /* Range completely covers node -- remove it. */ 288 g_free_rcu(p, rcu); 289 } else { 290 /* Truncate the node from the start. */ 291 p->itree.start = last + 1; 292 interval_tree_insert(&p->itree, &pageflags_root); 293 break; 294 } 295 } 296 297 return inval_tb; 298 } 299 300 /* 301 * A subroutine of page_set_flags: nothing overlaps [start,last], 302 * but check adjacent mappings and maybe merge into a single range. 303 */ 304 static void pageflags_create_merge(target_ulong start, target_ulong last, 305 int flags) 306 { 307 PageFlagsNode *next = NULL, *prev = NULL; 308 309 if (start > 0) { 310 prev = pageflags_find(start - 1, start - 1); 311 if (prev) { 312 if (prev->flags == flags) { 313 interval_tree_remove(&prev->itree, &pageflags_root); 314 } else { 315 prev = NULL; 316 } 317 } 318 } 319 if (last + 1 != 0) { 320 next = pageflags_find(last + 1, last + 1); 321 if (next) { 322 if (next->flags == flags) { 323 interval_tree_remove(&next->itree, &pageflags_root); 324 } else { 325 next = NULL; 326 } 327 } 328 } 329 330 if (prev) { 331 if (next) { 332 prev->itree.last = next->itree.last; 333 g_free_rcu(next, rcu); 334 } else { 335 prev->itree.last = last; 336 } 337 interval_tree_insert(&prev->itree, &pageflags_root); 338 } else if (next) { 339 next->itree.start = start; 340 interval_tree_insert(&next->itree, &pageflags_root); 341 } else { 342 pageflags_create(start, last, flags); 343 } 344 } 345 346 /* 347 * Allow the target to decide if PAGE_TARGET_[12] may be reset. 348 * By default, they are not kept. 349 */ 350 #ifndef PAGE_TARGET_STICKY 351 #define PAGE_TARGET_STICKY 0 352 #endif 353 #define PAGE_STICKY (PAGE_ANON | PAGE_PASSTHROUGH | PAGE_TARGET_STICKY) 354 355 /* A subroutine of page_set_flags: add flags to [start,last]. */ 356 static bool pageflags_set_clear(target_ulong start, target_ulong last, 357 int set_flags, int clear_flags) 358 { 359 PageFlagsNode *p; 360 target_ulong p_start, p_last; 361 int p_flags, merge_flags; 362 bool inval_tb = false; 363 364 restart: 365 p = pageflags_find(start, last); 366 if (!p) { 367 if (set_flags) { 368 pageflags_create_merge(start, last, set_flags); 369 } 370 goto done; 371 } 372 373 p_start = p->itree.start; 374 p_last = p->itree.last; 375 p_flags = p->flags; 376 /* Using mprotect on a page does not change sticky bits. */ 377 merge_flags = (p_flags & ~clear_flags) | set_flags; 378 379 /* 380 * Need to flush if an overlapping executable region 381 * removes exec, or adds write. 382 */ 383 if ((p_flags & PAGE_EXEC) 384 && (!(merge_flags & PAGE_EXEC) 385 || (merge_flags & ~p_flags & PAGE_WRITE))) { 386 inval_tb = true; 387 } 388 389 /* 390 * If there is an exact range match, update and return without 391 * attempting to merge with adjacent regions. 392 */ 393 if (start == p_start && last == p_last) { 394 if (merge_flags) { 395 p->flags = merge_flags; 396 } else { 397 interval_tree_remove(&p->itree, &pageflags_root); 398 g_free_rcu(p, rcu); 399 } 400 goto done; 401 } 402 403 /* 404 * If sticky bits affect the original mapping, then we must be more 405 * careful about the existing intervals and the separate flags. 406 */ 407 if (set_flags != merge_flags) { 408 if (p_start < start) { 409 interval_tree_remove(&p->itree, &pageflags_root); 410 p->itree.last = start - 1; 411 interval_tree_insert(&p->itree, &pageflags_root); 412 413 if (last < p_last) { 414 if (merge_flags) { 415 pageflags_create(start, last, merge_flags); 416 } 417 pageflags_create(last + 1, p_last, p_flags); 418 } else { 419 if (merge_flags) { 420 pageflags_create(start, p_last, merge_flags); 421 } 422 if (p_last < last) { 423 start = p_last + 1; 424 goto restart; 425 } 426 } 427 } else { 428 if (start < p_start && set_flags) { 429 pageflags_create(start, p_start - 1, set_flags); 430 } 431 if (last < p_last) { 432 interval_tree_remove(&p->itree, &pageflags_root); 433 p->itree.start = last + 1; 434 interval_tree_insert(&p->itree, &pageflags_root); 435 if (merge_flags) { 436 pageflags_create(start, last, merge_flags); 437 } 438 } else { 439 if (merge_flags) { 440 p->flags = merge_flags; 441 } else { 442 interval_tree_remove(&p->itree, &pageflags_root); 443 g_free_rcu(p, rcu); 444 } 445 if (p_last < last) { 446 start = p_last + 1; 447 goto restart; 448 } 449 } 450 } 451 goto done; 452 } 453 454 /* If flags are not changing for this range, incorporate it. */ 455 if (set_flags == p_flags) { 456 if (start < p_start) { 457 interval_tree_remove(&p->itree, &pageflags_root); 458 p->itree.start = start; 459 interval_tree_insert(&p->itree, &pageflags_root); 460 } 461 if (p_last < last) { 462 start = p_last + 1; 463 goto restart; 464 } 465 goto done; 466 } 467 468 /* Maybe split out head and/or tail ranges with the original flags. */ 469 interval_tree_remove(&p->itree, &pageflags_root); 470 if (p_start < start) { 471 p->itree.last = start - 1; 472 interval_tree_insert(&p->itree, &pageflags_root); 473 474 if (p_last < last) { 475 goto restart; 476 } 477 if (last < p_last) { 478 pageflags_create(last + 1, p_last, p_flags); 479 } 480 } else if (last < p_last) { 481 p->itree.start = last + 1; 482 interval_tree_insert(&p->itree, &pageflags_root); 483 } else { 484 g_free_rcu(p, rcu); 485 goto restart; 486 } 487 if (set_flags) { 488 pageflags_create(start, last, set_flags); 489 } 490 491 done: 492 return inval_tb; 493 } 494 495 void page_set_flags(target_ulong start, target_ulong last, int flags) 496 { 497 bool reset = false; 498 bool inval_tb = false; 499 500 /* This function should never be called with addresses outside the 501 guest address space. If this assert fires, it probably indicates 502 a missing call to h2g_valid. */ 503 assert(start <= last); 504 assert(last <= GUEST_ADDR_MAX); 505 /* Only set PAGE_ANON with new mappings. */ 506 assert(!(flags & PAGE_ANON) || (flags & PAGE_RESET)); 507 assert_memory_lock(); 508 509 start &= TARGET_PAGE_MASK; 510 last |= ~TARGET_PAGE_MASK; 511 512 if (!(flags & PAGE_VALID)) { 513 flags = 0; 514 } else { 515 reset = flags & PAGE_RESET; 516 flags &= ~PAGE_RESET; 517 if (flags & PAGE_WRITE) { 518 flags |= PAGE_WRITE_ORG; 519 } 520 } 521 522 if (!flags || reset) { 523 page_reset_target_data(start, last); 524 inval_tb |= pageflags_unset(start, last); 525 } 526 if (flags) { 527 inval_tb |= pageflags_set_clear(start, last, flags, 528 ~(reset ? 0 : PAGE_STICKY)); 529 } 530 if (inval_tb) { 531 tb_invalidate_phys_range(start, last); 532 } 533 } 534 535 bool page_check_range(target_ulong start, target_ulong len, int flags) 536 { 537 target_ulong last; 538 int locked; /* tri-state: =0: unlocked, +1: global, -1: local */ 539 bool ret; 540 541 if (len == 0) { 542 return true; /* trivial length */ 543 } 544 545 last = start + len - 1; 546 if (last < start) { 547 return false; /* wrap around */ 548 } 549 550 locked = have_mmap_lock(); 551 while (true) { 552 PageFlagsNode *p = pageflags_find(start, last); 553 int missing; 554 555 if (!p) { 556 if (!locked) { 557 /* 558 * Lockless lookups have false negatives. 559 * Retry with the lock held. 560 */ 561 mmap_lock(); 562 locked = -1; 563 p = pageflags_find(start, last); 564 } 565 if (!p) { 566 ret = false; /* entire region invalid */ 567 break; 568 } 569 } 570 if (start < p->itree.start) { 571 ret = false; /* initial bytes invalid */ 572 break; 573 } 574 575 missing = flags & ~p->flags; 576 if (missing & ~PAGE_WRITE) { 577 ret = false; /* page doesn't match */ 578 break; 579 } 580 if (missing & PAGE_WRITE) { 581 if (!(p->flags & PAGE_WRITE_ORG)) { 582 ret = false; /* page not writable */ 583 break; 584 } 585 /* Asking about writable, but has been protected: undo. */ 586 if (!page_unprotect(start, 0)) { 587 ret = false; 588 break; 589 } 590 /* TODO: page_unprotect should take a range, not a single page. */ 591 if (last - start < TARGET_PAGE_SIZE) { 592 ret = true; /* ok */ 593 break; 594 } 595 start += TARGET_PAGE_SIZE; 596 continue; 597 } 598 599 if (last <= p->itree.last) { 600 ret = true; /* ok */ 601 break; 602 } 603 start = p->itree.last + 1; 604 } 605 606 /* Release the lock if acquired locally. */ 607 if (locked < 0) { 608 mmap_unlock(); 609 } 610 return ret; 611 } 612 613 bool page_check_range_empty(target_ulong start, target_ulong last) 614 { 615 assert(last >= start); 616 assert_memory_lock(); 617 return pageflags_find(start, last) == NULL; 618 } 619 620 target_ulong page_find_range_empty(target_ulong min, target_ulong max, 621 target_ulong len, target_ulong align) 622 { 623 target_ulong len_m1, align_m1; 624 625 assert(min <= max); 626 assert(max <= GUEST_ADDR_MAX); 627 assert(len != 0); 628 assert(is_power_of_2(align)); 629 assert_memory_lock(); 630 631 len_m1 = len - 1; 632 align_m1 = align - 1; 633 634 /* Iteratively narrow the search region. */ 635 while (1) { 636 PageFlagsNode *p; 637 638 /* Align min and double-check there's enough space remaining. */ 639 min = (min + align_m1) & ~align_m1; 640 if (min > max) { 641 return -1; 642 } 643 if (len_m1 > max - min) { 644 return -1; 645 } 646 647 p = pageflags_find(min, min + len_m1); 648 if (p == NULL) { 649 /* Found! */ 650 return min; 651 } 652 if (max <= p->itree.last) { 653 /* Existing allocation fills the remainder of the search region. */ 654 return -1; 655 } 656 /* Skip across existing allocation. */ 657 min = p->itree.last + 1; 658 } 659 } 660 661 void tb_lock_page0(tb_page_addr_t address) 662 { 663 PageFlagsNode *p; 664 target_ulong start, last; 665 int host_page_size = qemu_real_host_page_size(); 666 int prot; 667 668 assert_memory_lock(); 669 670 if (host_page_size <= TARGET_PAGE_SIZE) { 671 start = address & TARGET_PAGE_MASK; 672 last = start + TARGET_PAGE_SIZE - 1; 673 } else { 674 start = address & -host_page_size; 675 last = start + host_page_size - 1; 676 } 677 678 p = pageflags_find(start, last); 679 if (!p) { 680 return; 681 } 682 prot = p->flags; 683 684 if (unlikely(p->itree.last < last)) { 685 /* More than one protection region covers the one host page. */ 686 assert(TARGET_PAGE_SIZE < host_page_size); 687 while ((p = pageflags_next(p, start, last)) != NULL) { 688 prot |= p->flags; 689 } 690 } 691 692 if (prot & PAGE_WRITE) { 693 pageflags_set_clear(start, last, 0, PAGE_WRITE); 694 mprotect(g2h_untagged(start), last - start + 1, 695 prot & (PAGE_READ | PAGE_EXEC) ? PROT_READ : PROT_NONE); 696 } 697 } 698 699 /* 700 * Called from signal handler: invalidate the code and unprotect the 701 * page. Return 0 if the fault was not handled, 1 if it was handled, 702 * and 2 if it was handled but the caller must cause the TB to be 703 * immediately exited. (We can only return 2 if the 'pc' argument is 704 * non-zero.) 705 */ 706 int page_unprotect(tb_page_addr_t address, uintptr_t pc) 707 { 708 PageFlagsNode *p; 709 bool current_tb_invalidated; 710 711 /* 712 * Technically this isn't safe inside a signal handler. However we 713 * know this only ever happens in a synchronous SEGV handler, so in 714 * practice it seems to be ok. 715 */ 716 mmap_lock(); 717 718 p = pageflags_find(address, address); 719 720 /* If this address was not really writable, nothing to do. */ 721 if (!p || !(p->flags & PAGE_WRITE_ORG)) { 722 mmap_unlock(); 723 return 0; 724 } 725 726 current_tb_invalidated = false; 727 if (p->flags & PAGE_WRITE) { 728 /* 729 * If the page is actually marked WRITE then assume this is because 730 * this thread raced with another one which got here first and 731 * set the page to PAGE_WRITE and did the TB invalidate for us. 732 */ 733 #ifdef TARGET_HAS_PRECISE_SMC 734 TranslationBlock *current_tb = tcg_tb_lookup(pc); 735 if (current_tb) { 736 current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID; 737 } 738 #endif 739 } else { 740 int host_page_size = qemu_real_host_page_size(); 741 target_ulong start, len, i; 742 int prot; 743 744 if (host_page_size <= TARGET_PAGE_SIZE) { 745 start = address & TARGET_PAGE_MASK; 746 len = TARGET_PAGE_SIZE; 747 prot = p->flags | PAGE_WRITE; 748 pageflags_set_clear(start, start + len - 1, PAGE_WRITE, 0); 749 current_tb_invalidated = tb_invalidate_phys_page_unwind(start, pc); 750 } else { 751 start = address & -host_page_size; 752 len = host_page_size; 753 prot = 0; 754 755 for (i = 0; i < len; i += TARGET_PAGE_SIZE) { 756 target_ulong addr = start + i; 757 758 p = pageflags_find(addr, addr); 759 if (p) { 760 prot |= p->flags; 761 if (p->flags & PAGE_WRITE_ORG) { 762 prot |= PAGE_WRITE; 763 pageflags_set_clear(addr, addr + TARGET_PAGE_SIZE - 1, 764 PAGE_WRITE, 0); 765 } 766 } 767 /* 768 * Since the content will be modified, we must invalidate 769 * the corresponding translated code. 770 */ 771 current_tb_invalidated |= 772 tb_invalidate_phys_page_unwind(addr, pc); 773 } 774 } 775 if (prot & PAGE_EXEC) { 776 prot = (prot & ~PAGE_EXEC) | PAGE_READ; 777 } 778 mprotect((void *)g2h_untagged(start), len, prot & PAGE_RWX); 779 } 780 mmap_unlock(); 781 782 /* If current TB was invalidated return to main loop */ 783 return current_tb_invalidated ? 2 : 1; 784 } 785 786 static int probe_access_internal(CPUArchState *env, vaddr addr, 787 int fault_size, MMUAccessType access_type, 788 bool nonfault, uintptr_t ra) 789 { 790 int acc_flag; 791 bool maperr; 792 793 switch (access_type) { 794 case MMU_DATA_STORE: 795 acc_flag = PAGE_WRITE_ORG; 796 break; 797 case MMU_DATA_LOAD: 798 acc_flag = PAGE_READ; 799 break; 800 case MMU_INST_FETCH: 801 acc_flag = PAGE_EXEC; 802 break; 803 default: 804 g_assert_not_reached(); 805 } 806 807 if (guest_addr_valid_untagged(addr)) { 808 int page_flags = page_get_flags(addr); 809 if (page_flags & acc_flag) { 810 if (access_type != MMU_INST_FETCH 811 && cpu_plugin_mem_cbs_enabled(env_cpu(env))) { 812 return TLB_MMIO; 813 } 814 return 0; /* success */ 815 } 816 maperr = !(page_flags & PAGE_VALID); 817 } else { 818 maperr = true; 819 } 820 821 if (nonfault) { 822 return TLB_INVALID_MASK; 823 } 824 825 cpu_loop_exit_sigsegv(env_cpu(env), addr, access_type, maperr, ra); 826 } 827 828 int probe_access_flags(CPUArchState *env, vaddr addr, int size, 829 MMUAccessType access_type, int mmu_idx, 830 bool nonfault, void **phost, uintptr_t ra) 831 { 832 int flags; 833 834 g_assert(-(addr | TARGET_PAGE_MASK) >= size); 835 flags = probe_access_internal(env, addr, size, access_type, nonfault, ra); 836 *phost = (flags & TLB_INVALID_MASK) ? NULL : g2h(env_cpu(env), addr); 837 return flags; 838 } 839 840 void *probe_access(CPUArchState *env, vaddr addr, int size, 841 MMUAccessType access_type, int mmu_idx, uintptr_t ra) 842 { 843 int flags; 844 845 g_assert(-(addr | TARGET_PAGE_MASK) >= size); 846 flags = probe_access_internal(env, addr, size, access_type, false, ra); 847 g_assert((flags & ~TLB_MMIO) == 0); 848 849 return size ? g2h(env_cpu(env), addr) : NULL; 850 } 851 852 tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, 853 void **hostp) 854 { 855 int flags; 856 857 flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, false, 0); 858 g_assert(flags == 0); 859 860 if (hostp) { 861 *hostp = g2h_untagged(addr); 862 } 863 return addr; 864 } 865 866 #ifdef TARGET_PAGE_DATA_SIZE 867 /* 868 * Allocate chunks of target data together. For the only current user, 869 * if we allocate one hunk per page, we have overhead of 40/128 or 40%. 870 * Therefore, allocate memory for 64 pages at a time for overhead < 1%. 871 */ 872 #define TPD_PAGES 64 873 #define TBD_MASK (TARGET_PAGE_MASK * TPD_PAGES) 874 875 typedef struct TargetPageDataNode { 876 struct rcu_head rcu; 877 IntervalTreeNode itree; 878 char data[] __attribute__((aligned)); 879 } TargetPageDataNode; 880 881 static IntervalTreeRoot targetdata_root; 882 883 void page_reset_target_data(target_ulong start, target_ulong last) 884 { 885 IntervalTreeNode *n, *next; 886 887 assert_memory_lock(); 888 889 start &= TARGET_PAGE_MASK; 890 last |= ~TARGET_PAGE_MASK; 891 892 for (n = interval_tree_iter_first(&targetdata_root, start, last), 893 next = n ? interval_tree_iter_next(n, start, last) : NULL; 894 n != NULL; 895 n = next, 896 next = next ? interval_tree_iter_next(n, start, last) : NULL) { 897 target_ulong n_start, n_last, p_ofs, p_len; 898 TargetPageDataNode *t = container_of(n, TargetPageDataNode, itree); 899 900 if (n->start >= start && n->last <= last) { 901 interval_tree_remove(n, &targetdata_root); 902 g_free_rcu(t, rcu); 903 continue; 904 } 905 906 if (n->start < start) { 907 n_start = start; 908 p_ofs = (start - n->start) >> TARGET_PAGE_BITS; 909 } else { 910 n_start = n->start; 911 p_ofs = 0; 912 } 913 n_last = MIN(last, n->last); 914 p_len = (n_last + 1 - n_start) >> TARGET_PAGE_BITS; 915 916 memset(t->data + p_ofs * TARGET_PAGE_DATA_SIZE, 0, 917 p_len * TARGET_PAGE_DATA_SIZE); 918 } 919 } 920 921 void *page_get_target_data(target_ulong address) 922 { 923 IntervalTreeNode *n; 924 TargetPageDataNode *t; 925 target_ulong page, region, p_ofs; 926 927 page = address & TARGET_PAGE_MASK; 928 region = address & TBD_MASK; 929 930 n = interval_tree_iter_first(&targetdata_root, page, page); 931 if (!n) { 932 /* 933 * See util/interval-tree.c re lockless lookups: no false positives 934 * but there are false negatives. If we find nothing, retry with 935 * the mmap lock acquired. We also need the lock for the 936 * allocation + insert. 937 */ 938 mmap_lock(); 939 n = interval_tree_iter_first(&targetdata_root, page, page); 940 if (!n) { 941 t = g_malloc0(sizeof(TargetPageDataNode) 942 + TPD_PAGES * TARGET_PAGE_DATA_SIZE); 943 n = &t->itree; 944 n->start = region; 945 n->last = region | ~TBD_MASK; 946 interval_tree_insert(n, &targetdata_root); 947 } 948 mmap_unlock(); 949 } 950 951 t = container_of(n, TargetPageDataNode, itree); 952 p_ofs = (page - region) >> TARGET_PAGE_BITS; 953 return t->data + p_ofs * TARGET_PAGE_DATA_SIZE; 954 } 955 #else 956 void page_reset_target_data(target_ulong start, target_ulong last) { } 957 #endif /* TARGET_PAGE_DATA_SIZE */ 958 959 /* The system-mode versions of these helpers are in cputlb.c. */ 960 961 static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr, 962 MemOp mop, uintptr_t ra, MMUAccessType type) 963 { 964 int a_bits = memop_alignment_bits(mop); 965 void *ret; 966 967 /* Enforce guest required alignment. */ 968 if (unlikely(addr & ((1 << a_bits) - 1))) { 969 cpu_loop_exit_sigbus(cpu, addr, type, ra); 970 } 971 972 ret = g2h(cpu, addr); 973 set_helper_retaddr(ra); 974 return ret; 975 } 976 977 /* physical memory access (slow version, mainly for debug) */ 978 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, 979 void *ptr, size_t len, bool is_write) 980 { 981 int flags; 982 vaddr l, page; 983 uint8_t *buf = ptr; 984 ssize_t written; 985 int ret = -1; 986 int fd = -1; 987 988 mmap_lock(); 989 990 while (len > 0) { 991 page = addr & TARGET_PAGE_MASK; 992 l = (page + TARGET_PAGE_SIZE) - addr; 993 if (l > len) { 994 l = len; 995 } 996 flags = page_get_flags(page); 997 if (!(flags & PAGE_VALID)) { 998 goto out_close; 999 } 1000 if (is_write) { 1001 if (flags & PAGE_WRITE) { 1002 memcpy(g2h(cpu, addr), buf, l); 1003 } else { 1004 /* Bypass the host page protection using ptrace. */ 1005 if (fd == -1) { 1006 fd = open("/proc/self/mem", O_WRONLY); 1007 if (fd == -1) { 1008 goto out; 1009 } 1010 } 1011 /* 1012 * If there is a TranslationBlock and we weren't bypassing the 1013 * host page protection, the memcpy() above would SEGV, 1014 * ultimately leading to page_unprotect(). So invalidate the 1015 * translations manually. Both invalidation and pwrite() must 1016 * be under mmap_lock() in order to prevent the creation of 1017 * another TranslationBlock in between. 1018 */ 1019 tb_invalidate_phys_range(addr, addr + l - 1); 1020 written = pwrite(fd, buf, l, 1021 (off_t)(uintptr_t)g2h_untagged(addr)); 1022 if (written != l) { 1023 goto out_close; 1024 } 1025 } 1026 } else if (flags & PAGE_READ) { 1027 memcpy(buf, g2h(cpu, addr), l); 1028 } else { 1029 /* Bypass the host page protection using ptrace. */ 1030 if (fd == -1) { 1031 fd = open("/proc/self/mem", O_RDONLY); 1032 if (fd == -1) { 1033 goto out; 1034 } 1035 } 1036 if (pread(fd, buf, l, 1037 (off_t)(uintptr_t)g2h_untagged(addr)) != l) { 1038 goto out_close; 1039 } 1040 } 1041 len -= l; 1042 buf += l; 1043 addr += l; 1044 } 1045 ret = 0; 1046 out_close: 1047 if (fd != -1) { 1048 close(fd); 1049 } 1050 out: 1051 mmap_unlock(); 1052 1053 return ret; 1054 } 1055 1056 #include "ldst_atomicity.c.inc" 1057 1058 static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1059 uintptr_t ra, MMUAccessType access_type) 1060 { 1061 void *haddr; 1062 uint8_t ret; 1063 1064 cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); 1065 haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, access_type); 1066 ret = ldub_p(haddr); 1067 clear_helper_retaddr(); 1068 return ret; 1069 } 1070 1071 static uint16_t do_ld2_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1072 uintptr_t ra, MMUAccessType access_type) 1073 { 1074 void *haddr; 1075 uint16_t ret; 1076 MemOp mop = get_memop(oi); 1077 1078 cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); 1079 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1080 ret = load_atom_2(cpu, ra, haddr, mop); 1081 clear_helper_retaddr(); 1082 1083 if (mop & MO_BSWAP) { 1084 ret = bswap16(ret); 1085 } 1086 return ret; 1087 } 1088 1089 static uint32_t do_ld4_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1090 uintptr_t ra, MMUAccessType access_type) 1091 { 1092 void *haddr; 1093 uint32_t ret; 1094 MemOp mop = get_memop(oi); 1095 1096 cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); 1097 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1098 ret = load_atom_4(cpu, ra, haddr, mop); 1099 clear_helper_retaddr(); 1100 1101 if (mop & MO_BSWAP) { 1102 ret = bswap32(ret); 1103 } 1104 return ret; 1105 } 1106 1107 static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, 1108 uintptr_t ra, MMUAccessType access_type) 1109 { 1110 void *haddr; 1111 uint64_t ret; 1112 MemOp mop = get_memop(oi); 1113 1114 cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); 1115 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); 1116 ret = load_atom_8(cpu, ra, haddr, mop); 1117 clear_helper_retaddr(); 1118 1119 if (mop & MO_BSWAP) { 1120 ret = bswap64(ret); 1121 } 1122 return ret; 1123 } 1124 1125 static Int128 do_ld16_mmu(CPUState *cpu, abi_ptr addr, 1126 MemOpIdx oi, uintptr_t ra) 1127 { 1128 void *haddr; 1129 Int128 ret; 1130 MemOp mop = get_memop(oi); 1131 1132 tcg_debug_assert((mop & MO_SIZE) == MO_128); 1133 cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); 1134 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_LOAD); 1135 ret = load_atom_16(cpu, ra, haddr, mop); 1136 clear_helper_retaddr(); 1137 1138 if (mop & MO_BSWAP) { 1139 ret = bswap128(ret); 1140 } 1141 return ret; 1142 } 1143 1144 static void do_st1_mmu(CPUState *cpu, vaddr addr, uint8_t val, 1145 MemOpIdx oi, uintptr_t ra) 1146 { 1147 void *haddr; 1148 1149 cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); 1150 haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, MMU_DATA_STORE); 1151 stb_p(haddr, val); 1152 clear_helper_retaddr(); 1153 } 1154 1155 static void do_st2_mmu(CPUState *cpu, vaddr addr, uint16_t val, 1156 MemOpIdx oi, uintptr_t ra) 1157 { 1158 void *haddr; 1159 MemOp mop = get_memop(oi); 1160 1161 cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); 1162 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1163 1164 if (mop & MO_BSWAP) { 1165 val = bswap16(val); 1166 } 1167 store_atom_2(cpu, ra, haddr, mop, val); 1168 clear_helper_retaddr(); 1169 } 1170 1171 static void do_st4_mmu(CPUState *cpu, vaddr addr, uint32_t val, 1172 MemOpIdx oi, uintptr_t ra) 1173 { 1174 void *haddr; 1175 MemOp mop = get_memop(oi); 1176 1177 cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); 1178 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1179 1180 if (mop & MO_BSWAP) { 1181 val = bswap32(val); 1182 } 1183 store_atom_4(cpu, ra, haddr, mop, val); 1184 clear_helper_retaddr(); 1185 } 1186 1187 static void do_st8_mmu(CPUState *cpu, vaddr addr, uint64_t val, 1188 MemOpIdx oi, uintptr_t ra) 1189 { 1190 void *haddr; 1191 MemOp mop = get_memop(oi); 1192 1193 cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); 1194 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1195 1196 if (mop & MO_BSWAP) { 1197 val = bswap64(val); 1198 } 1199 store_atom_8(cpu, ra, haddr, mop, val); 1200 clear_helper_retaddr(); 1201 } 1202 1203 static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val, 1204 MemOpIdx oi, uintptr_t ra) 1205 { 1206 void *haddr; 1207 MemOpIdx mop = get_memop(oi); 1208 1209 cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); 1210 haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); 1211 1212 if (mop & MO_BSWAP) { 1213 val = bswap128(val); 1214 } 1215 store_atom_16(cpu, ra, haddr, mop, val); 1216 clear_helper_retaddr(); 1217 } 1218 1219 uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, 1220 MemOpIdx oi, uintptr_t ra) 1221 { 1222 return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1223 } 1224 1225 uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, 1226 MemOpIdx oi, uintptr_t ra) 1227 { 1228 return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1229 } 1230 1231 uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, 1232 MemOpIdx oi, uintptr_t ra) 1233 { 1234 return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1235 } 1236 1237 uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, 1238 MemOpIdx oi, uintptr_t ra) 1239 { 1240 return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); 1241 } 1242 1243 #include "ldst_common.c.inc" 1244 1245 /* 1246 * Do not allow unaligned operations to proceed. Return the host address. 1247 */ 1248 static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi, 1249 int size, uintptr_t retaddr) 1250 { 1251 MemOp mop = get_memop(oi); 1252 int a_bits = memop_alignment_bits(mop); 1253 void *ret; 1254 1255 /* Enforce guest required alignment. */ 1256 if (unlikely(addr & ((1 << a_bits) - 1))) { 1257 cpu_loop_exit_sigbus(cpu, addr, MMU_DATA_STORE, retaddr); 1258 } 1259 1260 /* Enforce qemu required alignment. */ 1261 if (unlikely(addr & (size - 1))) { 1262 cpu_loop_exit_atomic(cpu, retaddr); 1263 } 1264 1265 ret = g2h(cpu, addr); 1266 set_helper_retaddr(retaddr); 1267 return ret; 1268 } 1269 1270 #include "atomic_common.c.inc" 1271 1272 /* 1273 * First set of functions passes in OI and RETADDR. 1274 * This makes them callable from other helpers. 1275 */ 1276 1277 #define ATOMIC_NAME(X) \ 1278 glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu) 1279 #define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0) 1280 1281 #define DATA_SIZE 1 1282 #include "atomic_template.h" 1283 1284 #define DATA_SIZE 2 1285 #include "atomic_template.h" 1286 1287 #define DATA_SIZE 4 1288 #include "atomic_template.h" 1289 1290 #ifdef CONFIG_ATOMIC64 1291 #define DATA_SIZE 8 1292 #include "atomic_template.h" 1293 #endif 1294 1295 #if defined(CONFIG_ATOMIC128) || HAVE_CMPXCHG128 1296 #define DATA_SIZE 16 1297 #include "atomic_template.h" 1298 #endif 1299