1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/log.h" 12 #include "qemu/error-report.h" 13 #include "exec/exec-all.h" 14 #include "exec/translator.h" 15 #include "exec/cpu_ldst.h" 16 #include "exec/plugin-gen.h" 17 #include "exec/cpu_ldst.h" 18 #include "tcg/tcg-op-common.h" 19 #include "internal-target.h" 20 #include "disas/disas.h" 21 22 static void set_can_do_io(DisasContextBase *db, bool val) 23 { 24 QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1); 25 tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, 26 offsetof(ArchCPU, parent_obj.neg.can_do_io) - 27 offsetof(ArchCPU, env)); 28 } 29 30 bool translator_io_start(DisasContextBase *db) 31 { 32 /* 33 * Ensure that this instruction will be the last in the TB. 34 * The target may override this to something more forceful. 35 */ 36 if (db->is_jmp == DISAS_NEXT) { 37 db->is_jmp = DISAS_TOO_MANY; 38 } 39 return true; 40 } 41 42 static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags) 43 { 44 TCGv_i32 count = NULL; 45 TCGOp *icount_start_insn = NULL; 46 47 if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) { 48 count = tcg_temp_new_i32(); 49 tcg_gen_ld_i32(count, tcg_env, 50 offsetof(ArchCPU, parent_obj.neg.icount_decr.u32) 51 - offsetof(ArchCPU, env)); 52 } 53 54 if (cflags & CF_USE_ICOUNT) { 55 /* 56 * We emit a sub with a dummy immediate argument. Keep the insn index 57 * of the sub so that we later (when we know the actual insn count) 58 * can update the argument with the actual insn count. 59 */ 60 tcg_gen_sub_i32(count, count, tcg_constant_i32(0)); 61 icount_start_insn = tcg_last_op(); 62 } 63 64 /* 65 * Emit the check against icount_decr.u32 to see if we should exit 66 * unless we suppress the check with CF_NOIRQ. If we are using 67 * icount and have suppressed interruption the higher level code 68 * should have ensured we don't run more instructions than the 69 * budget. 70 */ 71 if (cflags & CF_NOIRQ) { 72 tcg_ctx->exitreq_label = NULL; 73 } else { 74 tcg_ctx->exitreq_label = gen_new_label(); 75 tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label); 76 } 77 78 if (cflags & CF_USE_ICOUNT) { 79 tcg_gen_st16_i32(count, tcg_env, 80 offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low) 81 - offsetof(ArchCPU, env)); 82 } 83 84 return icount_start_insn; 85 } 86 87 static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags, 88 TCGOp *icount_start_insn, int num_insns) 89 { 90 if (cflags & CF_USE_ICOUNT) { 91 /* 92 * Update the num_insn immediate parameter now that we know 93 * the actual insn count. 94 */ 95 tcg_set_insn_param(icount_start_insn, 2, 96 tcgv_i32_arg(tcg_constant_i32(num_insns))); 97 } 98 99 if (tcg_ctx->exitreq_label) { 100 gen_set_label(tcg_ctx->exitreq_label); 101 tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED); 102 } 103 } 104 105 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest) 106 { 107 /* Suppress goto_tb if requested. */ 108 if (tb_cflags(db->tb) & CF_NO_GOTO_TB) { 109 return false; 110 } 111 112 /* Check for the dest on the same page as the start of the TB. */ 113 return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0; 114 } 115 116 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, 117 vaddr pc, void *host_pc, const TranslatorOps *ops, 118 DisasContextBase *db) 119 { 120 uint32_t cflags = tb_cflags(tb); 121 TCGOp *icount_start_insn; 122 TCGOp *first_insn_start = NULL; 123 bool plugin_enabled; 124 125 /* Initialize DisasContext */ 126 db->tb = tb; 127 db->pc_first = pc; 128 db->pc_next = pc; 129 db->is_jmp = DISAS_NEXT; 130 db->num_insns = 0; 131 db->max_insns = *max_insns; 132 db->singlestep_enabled = cflags & CF_SINGLE_STEP; 133 db->insn_start = NULL; 134 db->fake_insn = false; 135 db->host_addr[0] = host_pc; 136 db->host_addr[1] = NULL; 137 db->record_start = 0; 138 db->record_len = 0; 139 140 ops->init_disas_context(db, cpu); 141 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 142 143 /* Start translating. */ 144 icount_start_insn = gen_tb_start(db, cflags); 145 ops->tb_start(db, cpu); 146 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 147 148 plugin_enabled = plugin_gen_tb_start(cpu, db); 149 db->plugin_enabled = plugin_enabled; 150 151 while (true) { 152 *max_insns = ++db->num_insns; 153 ops->insn_start(db, cpu); 154 db->insn_start = tcg_last_op(); 155 if (first_insn_start == NULL) { 156 first_insn_start = db->insn_start; 157 } 158 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 159 160 if (plugin_enabled) { 161 plugin_gen_insn_start(cpu, db); 162 } 163 164 /* 165 * Disassemble one instruction. The translate_insn hook should 166 * update db->pc_next and db->is_jmp to indicate what should be 167 * done next -- either exiting this loop or locate the start of 168 * the next instruction. 169 */ 170 ops->translate_insn(db, cpu); 171 172 /* 173 * We can't instrument after instructions that change control 174 * flow although this only really affects post-load operations. 175 * 176 * Calling plugin_gen_insn_end() before we possibly stop translation 177 * is important. Even if this ends up as dead code, plugin generation 178 * needs to see a matching plugin_gen_insn_{start,end}() pair in order 179 * to accurately track instrumented helpers that might access memory. 180 */ 181 if (plugin_enabled) { 182 plugin_gen_insn_end(); 183 } 184 185 /* Stop translation if translate_insn so indicated. */ 186 if (db->is_jmp != DISAS_NEXT) { 187 break; 188 } 189 190 /* Stop translation if the output buffer is full, 191 or we have executed all of the allowed instructions. */ 192 if (tcg_op_buf_full() || db->num_insns >= db->max_insns) { 193 db->is_jmp = DISAS_TOO_MANY; 194 break; 195 } 196 } 197 198 /* Emit code to exit the TB, as indicated by db->is_jmp. */ 199 ops->tb_stop(db, cpu); 200 gen_tb_end(tb, cflags, icount_start_insn, db->num_insns); 201 202 /* 203 * Manage can_do_io for the translation block: set to false before 204 * the first insn and set to true before the last insn. 205 */ 206 if (db->num_insns == 1) { 207 tcg_debug_assert(first_insn_start == db->insn_start); 208 } else { 209 tcg_debug_assert(first_insn_start != db->insn_start); 210 tcg_ctx->emit_before_op = first_insn_start; 211 set_can_do_io(db, false); 212 } 213 tcg_ctx->emit_before_op = db->insn_start; 214 set_can_do_io(db, true); 215 tcg_ctx->emit_before_op = NULL; 216 217 /* May be used by disas_log or plugin callbacks. */ 218 tb->size = db->pc_next - db->pc_first; 219 tb->icount = db->num_insns; 220 221 if (plugin_enabled) { 222 plugin_gen_tb_end(cpu, db->num_insns); 223 } 224 225 if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) 226 && qemu_log_in_addr_range(db->pc_first)) { 227 FILE *logfile = qemu_log_trylock(); 228 if (logfile) { 229 fprintf(logfile, "----------------\n"); 230 231 if (!ops->disas_log || 232 !ops->disas_log(db, cpu, logfile)) { 233 fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first)); 234 target_disas(logfile, cpu, db); 235 } 236 fprintf(logfile, "\n"); 237 qemu_log_unlock(logfile); 238 } 239 } 240 } 241 242 static bool translator_ld(CPUArchState *env, DisasContextBase *db, 243 void *dest, vaddr pc, size_t len) 244 { 245 TranslationBlock *tb = db->tb; 246 vaddr last = pc + len - 1; 247 void *host; 248 vaddr base; 249 250 /* Use slow path if first page is MMIO. */ 251 if (unlikely(tb_page_addr0(tb) == -1)) { 252 /* We capped translation with first page MMIO in tb_gen_code. */ 253 tcg_debug_assert(db->max_insns == 1); 254 return false; 255 } 256 257 host = db->host_addr[0]; 258 base = db->pc_first; 259 260 if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) { 261 /* Entire read is from the first page. */ 262 memcpy(dest, host + (pc - base), len); 263 return true; 264 } 265 266 if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) { 267 /* Read begins on the first page and extends to the second. */ 268 size_t len0 = -(pc | TARGET_PAGE_MASK); 269 memcpy(dest, host + (pc - base), len0); 270 pc += len0; 271 dest += len0; 272 len -= len0; 273 } 274 275 /* 276 * The read must conclude on the second page and not extend to a third. 277 * 278 * TODO: We could allow the two pages to be virtually discontiguous, 279 * since we already allow the two pages to be physically discontiguous. 280 * The only reasonable use case would be executing an insn at the end 281 * of the address space wrapping around to the beginning. For that, 282 * we would need to know the current width of the address space. 283 * In the meantime, assert. 284 */ 285 base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 286 assert(((base ^ pc) & TARGET_PAGE_MASK) == 0); 287 assert(((base ^ last) & TARGET_PAGE_MASK) == 0); 288 host = db->host_addr[1]; 289 290 if (host == NULL) { 291 tb_page_addr_t page0, old_page1, new_page1; 292 293 new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]); 294 295 /* 296 * If the second page is MMIO, treat as if the first page 297 * was MMIO as well, so that we do not cache the TB. 298 */ 299 if (unlikely(new_page1 == -1)) { 300 tb_unlock_pages(tb); 301 tb_set_page_addr0(tb, -1); 302 /* Require that this be the final insn. */ 303 db->max_insns = db->num_insns; 304 return false; 305 } 306 307 /* 308 * If this is not the first time around, and page1 matches, 309 * then we already have the page locked. Alternately, we're 310 * not doing anything to prevent the PTE from changing, so 311 * we might wind up with a different page, requiring us to 312 * re-do the locking. 313 */ 314 old_page1 = tb_page_addr1(tb); 315 if (likely(new_page1 != old_page1)) { 316 page0 = tb_page_addr0(tb); 317 if (unlikely(old_page1 != -1)) { 318 tb_unlock_page1(page0, old_page1); 319 } 320 tb_set_page_addr1(tb, new_page1); 321 tb_lock_page1(page0, new_page1); 322 } 323 host = db->host_addr[1]; 324 } 325 326 memcpy(dest, host + (pc - base), len); 327 return true; 328 } 329 330 static void record_save(DisasContextBase *db, vaddr pc, 331 const void *from, int size) 332 { 333 int offset; 334 335 /* Do not record probes before the start of TB. */ 336 if (pc < db->pc_first) { 337 return; 338 } 339 340 /* 341 * In translator_access, we verified that pc is within 2 pages 342 * of pc_first, thus this will never overflow. 343 */ 344 offset = pc - db->pc_first; 345 346 /* 347 * Either the first or second page may be I/O. If it is the second, 348 * then the first byte we need to record will be at a non-zero offset. 349 * In either case, we should not need to record but a single insn. 350 */ 351 if (db->record_len == 0) { 352 db->record_start = offset; 353 db->record_len = size; 354 } else { 355 assert(offset == db->record_start + db->record_len); 356 assert(db->record_len + size <= sizeof(db->record)); 357 db->record_len += size; 358 } 359 360 memcpy(db->record + (offset - db->record_start), from, size); 361 } 362 363 size_t translator_st_len(const DisasContextBase *db) 364 { 365 return db->fake_insn ? db->record_len : db->tb->size; 366 } 367 368 bool translator_st(const DisasContextBase *db, void *dest, 369 vaddr addr, size_t len) 370 { 371 size_t offset, offset_end; 372 373 if (addr < db->pc_first) { 374 return false; 375 } 376 offset = addr - db->pc_first; 377 offset_end = offset + len; 378 if (offset_end > translator_st_len(db)) { 379 return false; 380 } 381 382 if (!db->fake_insn) { 383 size_t offset_page1 = -(db->pc_first | TARGET_PAGE_MASK); 384 385 /* Get all the bytes from the first page. */ 386 if (db->host_addr[0]) { 387 if (offset_end <= offset_page1) { 388 memcpy(dest, db->host_addr[0] + offset, len); 389 return true; 390 } 391 if (offset < offset_page1) { 392 size_t len0 = offset_page1 - offset; 393 memcpy(dest, db->host_addr[0] + offset, len0); 394 offset += len0; 395 dest += len0; 396 } 397 } 398 399 /* Get any bytes from the second page. */ 400 if (db->host_addr[1] && offset >= offset_page1) { 401 memcpy(dest, db->host_addr[1] + (offset - offset_page1), 402 offset_end - offset); 403 return true; 404 } 405 } 406 407 /* Else get recorded bytes. */ 408 if (db->record_len != 0 && 409 offset >= db->record_start && 410 offset_end <= db->record_start + db->record_len) { 411 memcpy(dest, db->record + (offset - db->record_start), 412 offset_end - offset); 413 return true; 414 } 415 return false; 416 } 417 418 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc) 419 { 420 uint8_t raw; 421 422 if (!translator_ld(env, db, &raw, pc, sizeof(raw))) { 423 raw = cpu_ldub_code(env, pc); 424 record_save(db, pc, &raw, sizeof(raw)); 425 } 426 return raw; 427 } 428 429 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) 430 { 431 uint16_t raw, tgt; 432 433 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 434 tgt = tswap16(raw); 435 } else { 436 tgt = cpu_lduw_code(env, pc); 437 raw = tswap16(tgt); 438 record_save(db, pc, &raw, sizeof(raw)); 439 } 440 return tgt; 441 } 442 443 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) 444 { 445 uint32_t raw, tgt; 446 447 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 448 tgt = tswap32(raw); 449 } else { 450 tgt = cpu_ldl_code(env, pc); 451 raw = tswap32(tgt); 452 record_save(db, pc, &raw, sizeof(raw)); 453 } 454 return tgt; 455 } 456 457 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) 458 { 459 uint64_t raw, tgt; 460 461 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 462 tgt = tswap64(raw); 463 } else { 464 tgt = cpu_ldq_code(env, pc); 465 raw = tswap64(tgt); 466 record_save(db, pc, &raw, sizeof(raw)); 467 } 468 return tgt; 469 } 470 471 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) 472 { 473 db->fake_insn = true; 474 record_save(db, db->pc_first, data, len); 475 } 476