1 /* 2 * Generic intermediate code generation. 3 * 4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/log.h" 12 #include "qemu/error-report.h" 13 #include "exec/exec-all.h" 14 #include "exec/translator.h" 15 #include "exec/cpu_ldst.h" 16 #include "exec/plugin-gen.h" 17 #include "exec/cpu_ldst.h" 18 #include "tcg/tcg-op-common.h" 19 #include "internal-target.h" 20 #include "disas/disas.h" 21 22 static void set_can_do_io(DisasContextBase *db, bool val) 23 { 24 QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1); 25 tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, 26 offsetof(ArchCPU, parent_obj.neg.can_do_io) - 27 offsetof(ArchCPU, env)); 28 } 29 30 bool translator_io_start(DisasContextBase *db) 31 { 32 /* 33 * Ensure that this instruction will be the last in the TB. 34 * The target may override this to something more forceful. 35 */ 36 if (db->is_jmp == DISAS_NEXT) { 37 db->is_jmp = DISAS_TOO_MANY; 38 } 39 return true; 40 } 41 42 static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags) 43 { 44 TCGv_i32 count = NULL; 45 TCGOp *icount_start_insn = NULL; 46 47 if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) { 48 count = tcg_temp_new_i32(); 49 tcg_gen_ld_i32(count, tcg_env, 50 offsetof(ArchCPU, parent_obj.neg.icount_decr.u32) 51 - offsetof(ArchCPU, env)); 52 } 53 54 if (cflags & CF_USE_ICOUNT) { 55 /* 56 * We emit a sub with a dummy immediate argument. Keep the insn index 57 * of the sub so that we later (when we know the actual insn count) 58 * can update the argument with the actual insn count. 59 */ 60 tcg_gen_sub_i32(count, count, tcg_constant_i32(0)); 61 icount_start_insn = tcg_last_op(); 62 } 63 64 /* 65 * Emit the check against icount_decr.u32 to see if we should exit 66 * unless we suppress the check with CF_NOIRQ. If we are using 67 * icount and have suppressed interruption the higher level code 68 * should have ensured we don't run more instructions than the 69 * budget. 70 */ 71 if (cflags & CF_NOIRQ) { 72 tcg_ctx->exitreq_label = NULL; 73 } else { 74 tcg_ctx->exitreq_label = gen_new_label(); 75 tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label); 76 } 77 78 if (cflags & CF_USE_ICOUNT) { 79 tcg_gen_st16_i32(count, tcg_env, 80 offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low) 81 - offsetof(ArchCPU, env)); 82 } 83 84 return icount_start_insn; 85 } 86 87 static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags, 88 TCGOp *icount_start_insn, int num_insns) 89 { 90 if (cflags & CF_USE_ICOUNT) { 91 /* 92 * Update the num_insn immediate parameter now that we know 93 * the actual insn count. 94 */ 95 tcg_set_insn_param(icount_start_insn, 2, 96 tcgv_i32_arg(tcg_constant_i32(num_insns))); 97 } 98 99 if (tcg_ctx->exitreq_label) { 100 gen_set_label(tcg_ctx->exitreq_label); 101 tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED); 102 } 103 } 104 105 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest) 106 { 107 /* Suppress goto_tb if requested. */ 108 if (tb_cflags(db->tb) & CF_NO_GOTO_TB) { 109 return false; 110 } 111 112 /* Check for the dest on the same page as the start of the TB. */ 113 return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0; 114 } 115 116 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, 117 vaddr pc, void *host_pc, const TranslatorOps *ops, 118 DisasContextBase *db) 119 { 120 uint32_t cflags = tb_cflags(tb); 121 TCGOp *icount_start_insn; 122 TCGOp *first_insn_start = NULL; 123 bool plugin_enabled; 124 125 /* Initialize DisasContext */ 126 db->tb = tb; 127 db->pc_first = pc; 128 db->pc_next = pc; 129 db->is_jmp = DISAS_NEXT; 130 db->num_insns = 0; 131 db->max_insns = *max_insns; 132 db->insn_start = NULL; 133 db->fake_insn = false; 134 db->host_addr[0] = host_pc; 135 db->host_addr[1] = NULL; 136 db->record_start = 0; 137 db->record_len = 0; 138 139 ops->init_disas_context(db, cpu); 140 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 141 142 /* Start translating. */ 143 icount_start_insn = gen_tb_start(db, cflags); 144 ops->tb_start(db, cpu); 145 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 146 147 plugin_enabled = plugin_gen_tb_start(cpu, db); 148 db->plugin_enabled = plugin_enabled; 149 150 while (true) { 151 *max_insns = ++db->num_insns; 152 ops->insn_start(db, cpu); 153 db->insn_start = tcg_last_op(); 154 if (first_insn_start == NULL) { 155 first_insn_start = db->insn_start; 156 } 157 tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ 158 159 if (plugin_enabled) { 160 plugin_gen_insn_start(cpu, db); 161 } 162 163 /* 164 * Disassemble one instruction. The translate_insn hook should 165 * update db->pc_next and db->is_jmp to indicate what should be 166 * done next -- either exiting this loop or locate the start of 167 * the next instruction. 168 */ 169 ops->translate_insn(db, cpu); 170 171 /* 172 * We can't instrument after instructions that change control 173 * flow although this only really affects post-load operations. 174 * 175 * Calling plugin_gen_insn_end() before we possibly stop translation 176 * is important. Even if this ends up as dead code, plugin generation 177 * needs to see a matching plugin_gen_insn_{start,end}() pair in order 178 * to accurately track instrumented helpers that might access memory. 179 */ 180 if (plugin_enabled) { 181 plugin_gen_insn_end(); 182 } 183 184 /* Stop translation if translate_insn so indicated. */ 185 if (db->is_jmp != DISAS_NEXT) { 186 break; 187 } 188 189 /* Stop translation if the output buffer is full, 190 or we have executed all of the allowed instructions. */ 191 if (tcg_op_buf_full() || db->num_insns >= db->max_insns) { 192 db->is_jmp = DISAS_TOO_MANY; 193 break; 194 } 195 } 196 197 /* Emit code to exit the TB, as indicated by db->is_jmp. */ 198 ops->tb_stop(db, cpu); 199 gen_tb_end(tb, cflags, icount_start_insn, db->num_insns); 200 201 /* 202 * Manage can_do_io for the translation block: set to false before 203 * the first insn and set to true before the last insn. 204 */ 205 if (db->num_insns == 1) { 206 tcg_debug_assert(first_insn_start == db->insn_start); 207 } else { 208 tcg_debug_assert(first_insn_start != db->insn_start); 209 tcg_ctx->emit_before_op = first_insn_start; 210 set_can_do_io(db, false); 211 } 212 tcg_ctx->emit_before_op = db->insn_start; 213 set_can_do_io(db, true); 214 tcg_ctx->emit_before_op = NULL; 215 216 /* May be used by disas_log or plugin callbacks. */ 217 tb->size = db->pc_next - db->pc_first; 218 tb->icount = db->num_insns; 219 220 if (plugin_enabled) { 221 plugin_gen_tb_end(cpu, db->num_insns); 222 } 223 224 if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) 225 && qemu_log_in_addr_range(db->pc_first)) { 226 FILE *logfile = qemu_log_trylock(); 227 if (logfile) { 228 fprintf(logfile, "----------------\n"); 229 230 if (!ops->disas_log || 231 !ops->disas_log(db, cpu, logfile)) { 232 fprintf(logfile, "IN: %s\n", lookup_symbol(db->pc_first)); 233 target_disas(logfile, cpu, db); 234 } 235 fprintf(logfile, "\n"); 236 qemu_log_unlock(logfile); 237 } 238 } 239 } 240 241 static bool translator_ld(CPUArchState *env, DisasContextBase *db, 242 void *dest, vaddr pc, size_t len) 243 { 244 TranslationBlock *tb = db->tb; 245 vaddr last = pc + len - 1; 246 void *host; 247 vaddr base; 248 249 /* Use slow path if first page is MMIO. */ 250 if (unlikely(tb_page_addr0(tb) == -1)) { 251 /* We capped translation with first page MMIO in tb_gen_code. */ 252 tcg_debug_assert(db->max_insns == 1); 253 return false; 254 } 255 256 host = db->host_addr[0]; 257 base = db->pc_first; 258 259 if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) { 260 /* Entire read is from the first page. */ 261 memcpy(dest, host + (pc - base), len); 262 return true; 263 } 264 265 if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) { 266 /* Read begins on the first page and extends to the second. */ 267 size_t len0 = -(pc | TARGET_PAGE_MASK); 268 memcpy(dest, host + (pc - base), len0); 269 pc += len0; 270 dest += len0; 271 len -= len0; 272 } 273 274 /* 275 * The read must conclude on the second page and not extend to a third. 276 * 277 * TODO: We could allow the two pages to be virtually discontiguous, 278 * since we already allow the two pages to be physically discontiguous. 279 * The only reasonable use case would be executing an insn at the end 280 * of the address space wrapping around to the beginning. For that, 281 * we would need to know the current width of the address space. 282 * In the meantime, assert. 283 */ 284 base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 285 assert(((base ^ pc) & TARGET_PAGE_MASK) == 0); 286 assert(((base ^ last) & TARGET_PAGE_MASK) == 0); 287 host = db->host_addr[1]; 288 289 if (host == NULL) { 290 tb_page_addr_t page0, old_page1, new_page1; 291 292 new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]); 293 294 /* 295 * If the second page is MMIO, treat as if the first page 296 * was MMIO as well, so that we do not cache the TB. 297 */ 298 if (unlikely(new_page1 == -1)) { 299 tb_unlock_pages(tb); 300 tb_set_page_addr0(tb, -1); 301 /* Require that this be the final insn. */ 302 db->max_insns = db->num_insns; 303 return false; 304 } 305 306 /* 307 * If this is not the first time around, and page1 matches, 308 * then we already have the page locked. Alternately, we're 309 * not doing anything to prevent the PTE from changing, so 310 * we might wind up with a different page, requiring us to 311 * re-do the locking. 312 */ 313 old_page1 = tb_page_addr1(tb); 314 if (likely(new_page1 != old_page1)) { 315 page0 = tb_page_addr0(tb); 316 if (unlikely(old_page1 != -1)) { 317 tb_unlock_page1(page0, old_page1); 318 } 319 tb_set_page_addr1(tb, new_page1); 320 tb_lock_page1(page0, new_page1); 321 } 322 host = db->host_addr[1]; 323 } 324 325 memcpy(dest, host + (pc - base), len); 326 return true; 327 } 328 329 static void record_save(DisasContextBase *db, vaddr pc, 330 const void *from, int size) 331 { 332 int offset; 333 334 /* Do not record probes before the start of TB. */ 335 if (pc < db->pc_first) { 336 return; 337 } 338 339 /* 340 * In translator_access, we verified that pc is within 2 pages 341 * of pc_first, thus this will never overflow. 342 */ 343 offset = pc - db->pc_first; 344 345 /* 346 * Either the first or second page may be I/O. If it is the second, 347 * then the first byte we need to record will be at a non-zero offset. 348 * In either case, we should not need to record but a single insn. 349 */ 350 if (db->record_len == 0) { 351 db->record_start = offset; 352 db->record_len = size; 353 } else { 354 assert(offset == db->record_start + db->record_len); 355 assert(db->record_len + size <= sizeof(db->record)); 356 db->record_len += size; 357 } 358 359 memcpy(db->record + (offset - db->record_start), from, size); 360 } 361 362 size_t translator_st_len(const DisasContextBase *db) 363 { 364 return db->fake_insn ? db->record_len : db->tb->size; 365 } 366 367 bool translator_st(const DisasContextBase *db, void *dest, 368 vaddr addr, size_t len) 369 { 370 size_t offset, offset_end; 371 372 if (addr < db->pc_first) { 373 return false; 374 } 375 offset = addr - db->pc_first; 376 offset_end = offset + len; 377 if (offset_end > translator_st_len(db)) { 378 return false; 379 } 380 381 if (!db->fake_insn) { 382 size_t offset_page1 = -(db->pc_first | TARGET_PAGE_MASK); 383 384 /* Get all the bytes from the first page. */ 385 if (db->host_addr[0]) { 386 if (offset_end <= offset_page1) { 387 memcpy(dest, db->host_addr[0] + offset, len); 388 return true; 389 } 390 if (offset < offset_page1) { 391 size_t len0 = offset_page1 - offset; 392 memcpy(dest, db->host_addr[0] + offset, len0); 393 offset += len0; 394 dest += len0; 395 } 396 } 397 398 /* Get any bytes from the second page. */ 399 if (db->host_addr[1] && offset >= offset_page1) { 400 memcpy(dest, db->host_addr[1] + (offset - offset_page1), 401 offset_end - offset); 402 return true; 403 } 404 } 405 406 /* Else get recorded bytes. */ 407 if (db->record_len != 0 && 408 offset >= db->record_start && 409 offset_end <= db->record_start + db->record_len) { 410 memcpy(dest, db->record + (offset - db->record_start), 411 offset_end - offset); 412 return true; 413 } 414 return false; 415 } 416 417 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc) 418 { 419 uint8_t raw; 420 421 if (!translator_ld(env, db, &raw, pc, sizeof(raw))) { 422 raw = cpu_ldub_code(env, pc); 423 record_save(db, pc, &raw, sizeof(raw)); 424 } 425 return raw; 426 } 427 428 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) 429 { 430 uint16_t raw, tgt; 431 432 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 433 tgt = tswap16(raw); 434 } else { 435 tgt = cpu_lduw_code(env, pc); 436 raw = tswap16(tgt); 437 record_save(db, pc, &raw, sizeof(raw)); 438 } 439 return tgt; 440 } 441 442 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) 443 { 444 uint32_t raw, tgt; 445 446 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 447 tgt = tswap32(raw); 448 } else { 449 tgt = cpu_ldl_code(env, pc); 450 raw = tswap32(tgt); 451 record_save(db, pc, &raw, sizeof(raw)); 452 } 453 return tgt; 454 } 455 456 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) 457 { 458 uint64_t raw, tgt; 459 460 if (translator_ld(env, db, &raw, pc, sizeof(raw))) { 461 tgt = tswap64(raw); 462 } else { 463 tgt = cpu_ldq_code(env, pc); 464 raw = tswap64(tgt); 465 record_save(db, pc, &raw, sizeof(raw)); 466 } 467 return tgt; 468 } 469 470 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len) 471 { 472 db->fake_insn = true; 473 record_save(db, db->pc_first, data, len); 474 } 475