1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qemu/host-utils.h" 26 #include "cpu.h" 27 #include "exec/helper-proto.h" 28 #include "exec/cpu_ldst.h" 29 #include "exec/exec-all.h" 30 #include "exec/tb-hash.h" 31 #include "disas/disas.h" 32 #include "exec/log.h" 33 34 /* 32-bit helpers */ 35 36 int32_t HELPER(div_i32)(int32_t arg1, int32_t arg2) 37 { 38 return arg1 / arg2; 39 } 40 41 int32_t HELPER(rem_i32)(int32_t arg1, int32_t arg2) 42 { 43 return arg1 % arg2; 44 } 45 46 uint32_t HELPER(divu_i32)(uint32_t arg1, uint32_t arg2) 47 { 48 return arg1 / arg2; 49 } 50 51 uint32_t HELPER(remu_i32)(uint32_t arg1, uint32_t arg2) 52 { 53 return arg1 % arg2; 54 } 55 56 /* 64-bit helpers */ 57 58 uint64_t HELPER(shl_i64)(uint64_t arg1, uint64_t arg2) 59 { 60 return arg1 << arg2; 61 } 62 63 uint64_t HELPER(shr_i64)(uint64_t arg1, uint64_t arg2) 64 { 65 return arg1 >> arg2; 66 } 67 68 int64_t HELPER(sar_i64)(int64_t arg1, int64_t arg2) 69 { 70 return arg1 >> arg2; 71 } 72 73 int64_t HELPER(div_i64)(int64_t arg1, int64_t arg2) 74 { 75 return arg1 / arg2; 76 } 77 78 int64_t HELPER(rem_i64)(int64_t arg1, int64_t arg2) 79 { 80 return arg1 % arg2; 81 } 82 83 uint64_t HELPER(divu_i64)(uint64_t arg1, uint64_t arg2) 84 { 85 return arg1 / arg2; 86 } 87 88 uint64_t HELPER(remu_i64)(uint64_t arg1, uint64_t arg2) 89 { 90 return arg1 % arg2; 91 } 92 93 uint64_t HELPER(muluh_i64)(uint64_t arg1, uint64_t arg2) 94 { 95 uint64_t l, h; 96 mulu64(&l, &h, arg1, arg2); 97 return h; 98 } 99 100 int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2) 101 { 102 uint64_t l, h; 103 muls64(&l, &h, arg1, arg2); 104 return h; 105 } 106 107 uint32_t HELPER(clz_i32)(uint32_t arg, uint32_t zero_val) 108 { 109 return arg ? clz32(arg) : zero_val; 110 } 111 112 uint32_t HELPER(ctz_i32)(uint32_t arg, uint32_t zero_val) 113 { 114 return arg ? ctz32(arg) : zero_val; 115 } 116 117 uint64_t HELPER(clz_i64)(uint64_t arg, uint64_t zero_val) 118 { 119 return arg ? clz64(arg) : zero_val; 120 } 121 122 uint64_t HELPER(ctz_i64)(uint64_t arg, uint64_t zero_val) 123 { 124 return arg ? ctz64(arg) : zero_val; 125 } 126 127 uint32_t HELPER(clrsb_i32)(uint32_t arg) 128 { 129 return clrsb32(arg); 130 } 131 132 uint64_t HELPER(clrsb_i64)(uint64_t arg) 133 { 134 return clrsb64(arg); 135 } 136 137 uint32_t HELPER(ctpop_i32)(uint32_t arg) 138 { 139 return ctpop32(arg); 140 } 141 142 uint64_t HELPER(ctpop_i64)(uint64_t arg) 143 { 144 return ctpop64(arg); 145 } 146 147 void *HELPER(lookup_tb_ptr)(CPUArchState *env, target_ulong addr) 148 { 149 CPUState *cpu = ENV_GET_CPU(env); 150 TranslationBlock *tb; 151 target_ulong cs_base, pc; 152 uint32_t flags, addr_hash; 153 154 addr_hash = tb_jmp_cache_hash_func(addr); 155 tb = atomic_rcu_read(&cpu->tb_jmp_cache[addr_hash]); 156 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 157 158 if (unlikely(!(tb 159 && tb->pc == addr 160 && tb->cs_base == cs_base 161 && tb->flags == flags 162 && tb->trace_vcpu_dstate == *cpu->trace_dstate))) { 163 tb = tb_htable_lookup(cpu, addr, cs_base, flags); 164 if (!tb) { 165 return tcg_ctx.code_gen_epilogue; 166 } 167 atomic_set(&cpu->tb_jmp_cache[addr_hash], tb); 168 } 169 170 qemu_log_mask_and_addr(CPU_LOG_EXEC, addr, 171 "Chain %p [%d: " TARGET_FMT_lx "] %s\n", 172 tb->tc_ptr, cpu->cpu_index, addr, 173 lookup_symbol(addr)); 174 return tb->tc_ptr; 175 } 176 177 void HELPER(exit_atomic)(CPUArchState *env) 178 { 179 cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC()); 180 } 181