xref: /openbmc/qemu/accel/tcg/tcg-all.c (revision d2dfe0b5)
1 /*
2  * QEMU System Emulator, accelerator interfaces
3  *
4  * Copyright (c) 2003-2008 Fabrice Bellard
5  * Copyright (c) 2014 Red Hat Inc.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include "qemu/osdep.h"
27 #include "sysemu/tcg.h"
28 #include "exec/replay-core.h"
29 #include "sysemu/cpu-timers.h"
30 #include "tcg/tcg.h"
31 #include "tcg/oversized-guest.h"
32 #include "qapi/error.h"
33 #include "qemu/error-report.h"
34 #include "qemu/accel.h"
35 #include "qemu/atomic.h"
36 #include "qapi/qapi-builtin-visit.h"
37 #include "qemu/units.h"
38 #if !defined(CONFIG_USER_ONLY)
39 #include "hw/boards.h"
40 #endif
41 #include "internal.h"
42 
43 struct TCGState {
44     AccelState parent_obj;
45 
46     bool mttcg_enabled;
47     bool one_insn_per_tb;
48     int splitwx_enabled;
49     unsigned long tb_size;
50 };
51 typedef struct TCGState TCGState;
52 
53 #define TYPE_TCG_ACCEL ACCEL_CLASS_NAME("tcg")
54 
55 DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE,
56                          TYPE_TCG_ACCEL)
57 
58 /*
59  * We default to false if we know other options have been enabled
60  * which are currently incompatible with MTTCG. Otherwise when each
61  * guest (target) has been updated to support:
62  *   - atomic instructions
63  *   - memory ordering primitives (barriers)
64  * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
65  *
66  * Once a guest architecture has been converted to the new primitives
67  * there are two remaining limitations to check.
68  *
69  * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
70  * - The host must have a stronger memory order than the guest
71  *
72  * It may be possible in future to support strong guests on weak hosts
73  * but that will require tagging all load/stores in a guest with their
74  * implicit memory order requirements which would likely slow things
75  * down a lot.
76  */
77 
78 static bool check_tcg_memory_orders_compatible(void)
79 {
80 #if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
81     return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
82 #else
83     return false;
84 #endif
85 }
86 
87 static bool default_mttcg_enabled(void)
88 {
89     if (icount_enabled() || TCG_OVERSIZED_GUEST) {
90         return false;
91     } else {
92 #ifdef TARGET_SUPPORTS_MTTCG
93         return check_tcg_memory_orders_compatible();
94 #else
95         return false;
96 #endif
97     }
98 }
99 
100 static void tcg_accel_instance_init(Object *obj)
101 {
102     TCGState *s = TCG_STATE(obj);
103 
104     s->mttcg_enabled = default_mttcg_enabled();
105 
106     /* If debugging enabled, default "auto on", otherwise off. */
107 #if defined(CONFIG_DEBUG_TCG) && !defined(CONFIG_USER_ONLY)
108     s->splitwx_enabled = -1;
109 #else
110     s->splitwx_enabled = 0;
111 #endif
112 }
113 
114 bool mttcg_enabled;
115 bool one_insn_per_tb;
116 
117 static int tcg_init_machine(MachineState *ms)
118 {
119     TCGState *s = TCG_STATE(current_accel());
120 #ifdef CONFIG_USER_ONLY
121     unsigned max_cpus = 1;
122 #else
123     unsigned max_cpus = ms->smp.max_cpus;
124 #endif
125 
126     tcg_allowed = true;
127     mttcg_enabled = s->mttcg_enabled;
128 
129     page_init();
130     tb_htable_init();
131     tcg_init(s->tb_size * MiB, s->splitwx_enabled, max_cpus);
132 
133 #if defined(CONFIG_SOFTMMU)
134     /*
135      * There's no guest base to take into account, so go ahead and
136      * initialize the prologue now.
137      */
138     tcg_prologue_init(tcg_ctx);
139 #endif
140 
141     return 0;
142 }
143 
144 static char *tcg_get_thread(Object *obj, Error **errp)
145 {
146     TCGState *s = TCG_STATE(obj);
147 
148     return g_strdup(s->mttcg_enabled ? "multi" : "single");
149 }
150 
151 static void tcg_set_thread(Object *obj, const char *value, Error **errp)
152 {
153     TCGState *s = TCG_STATE(obj);
154 
155     if (strcmp(value, "multi") == 0) {
156         if (TCG_OVERSIZED_GUEST) {
157             error_setg(errp, "No MTTCG when guest word size > hosts");
158         } else if (icount_enabled()) {
159             error_setg(errp, "No MTTCG when icount is enabled");
160         } else {
161 #ifndef TARGET_SUPPORTS_MTTCG
162             warn_report("Guest not yet converted to MTTCG - "
163                         "you may get unexpected results");
164 #endif
165             if (!check_tcg_memory_orders_compatible()) {
166                 warn_report("Guest expects a stronger memory ordering "
167                             "than the host provides");
168                 error_printf("This may cause strange/hard to debug errors\n");
169             }
170             s->mttcg_enabled = true;
171         }
172     } else if (strcmp(value, "single") == 0) {
173         s->mttcg_enabled = false;
174     } else {
175         error_setg(errp, "Invalid 'thread' setting %s", value);
176     }
177 }
178 
179 static void tcg_get_tb_size(Object *obj, Visitor *v,
180                             const char *name, void *opaque,
181                             Error **errp)
182 {
183     TCGState *s = TCG_STATE(obj);
184     uint32_t value = s->tb_size;
185 
186     visit_type_uint32(v, name, &value, errp);
187 }
188 
189 static void tcg_set_tb_size(Object *obj, Visitor *v,
190                             const char *name, void *opaque,
191                             Error **errp)
192 {
193     TCGState *s = TCG_STATE(obj);
194     uint32_t value;
195 
196     if (!visit_type_uint32(v, name, &value, errp)) {
197         return;
198     }
199 
200     s->tb_size = value;
201 }
202 
203 static bool tcg_get_splitwx(Object *obj, Error **errp)
204 {
205     TCGState *s = TCG_STATE(obj);
206     return s->splitwx_enabled;
207 }
208 
209 static void tcg_set_splitwx(Object *obj, bool value, Error **errp)
210 {
211     TCGState *s = TCG_STATE(obj);
212     s->splitwx_enabled = value;
213 }
214 
215 static bool tcg_get_one_insn_per_tb(Object *obj, Error **errp)
216 {
217     TCGState *s = TCG_STATE(obj);
218     return s->one_insn_per_tb;
219 }
220 
221 static void tcg_set_one_insn_per_tb(Object *obj, bool value, Error **errp)
222 {
223     TCGState *s = TCG_STATE(obj);
224     s->one_insn_per_tb = value;
225     /* Set the global also: this changes the behaviour */
226     qatomic_set(&one_insn_per_tb, value);
227 }
228 
229 static int tcg_gdbstub_supported_sstep_flags(void)
230 {
231     /*
232      * In replay mode all events will come from the log and can't be
233      * suppressed otherwise we would break determinism. However as those
234      * events are tied to the number of executed instructions we won't see
235      * them occurring every time we single step.
236      */
237     if (replay_mode != REPLAY_MODE_NONE) {
238         return SSTEP_ENABLE;
239     } else {
240         return SSTEP_ENABLE | SSTEP_NOIRQ | SSTEP_NOTIMER;
241     }
242 }
243 
244 static void tcg_accel_class_init(ObjectClass *oc, void *data)
245 {
246     AccelClass *ac = ACCEL_CLASS(oc);
247     ac->name = "tcg";
248     ac->init_machine = tcg_init_machine;
249     ac->allowed = &tcg_allowed;
250     ac->gdbstub_supported_sstep_flags = tcg_gdbstub_supported_sstep_flags;
251 
252     object_class_property_add_str(oc, "thread",
253                                   tcg_get_thread,
254                                   tcg_set_thread);
255 
256     object_class_property_add(oc, "tb-size", "int",
257         tcg_get_tb_size, tcg_set_tb_size,
258         NULL, NULL);
259     object_class_property_set_description(oc, "tb-size",
260         "TCG translation block cache size");
261 
262     object_class_property_add_bool(oc, "split-wx",
263         tcg_get_splitwx, tcg_set_splitwx);
264     object_class_property_set_description(oc, "split-wx",
265         "Map jit pages into separate RW and RX regions");
266 
267     object_class_property_add_bool(oc, "one-insn-per-tb",
268                                    tcg_get_one_insn_per_tb,
269                                    tcg_set_one_insn_per_tb);
270     object_class_property_set_description(oc, "one-insn-per-tb",
271         "Only put one guest insn in each translation block");
272 }
273 
274 static const TypeInfo tcg_accel_type = {
275     .name = TYPE_TCG_ACCEL,
276     .parent = TYPE_ACCEL,
277     .instance_init = tcg_accel_instance_init,
278     .class_init = tcg_accel_class_init,
279     .instance_size = sizeof(TCGState),
280 };
281 module_obj(TYPE_TCG_ACCEL);
282 
283 static void register_accel_types(void)
284 {
285     type_register_static(&tcg_accel_type);
286 }
287 
288 type_init(register_accel_types);
289