xref: /openbmc/qemu/accel/tcg/tcg-all.c (revision 8201f1a29c95bca095bdd6e6c6eba42d8d06499b)
1 /*
2  * QEMU System Emulator, accelerator interfaces
3  *
4  * Copyright (c) 2003-2008 Fabrice Bellard
5  * Copyright (c) 2014 Red Hat Inc.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include "qemu/osdep.h"
27 #include "system/tcg.h"
28 #include "exec/replay-core.h"
29 #include "exec/icount.h"
30 #include "tcg/startup.h"
31 #include "qapi/error.h"
32 #include "qemu/error-report.h"
33 #include "qemu/accel.h"
34 #include "qemu/atomic.h"
35 #include "qapi/qapi-builtin-visit.h"
36 #include "qemu/units.h"
37 #if defined(CONFIG_USER_ONLY)
38 #include "hw/qdev-core.h"
39 #else
40 #include "hw/boards.h"
41 #endif
42 #include "internal-common.h"
43 #include "cpu-param.h"
44 
45 
46 struct TCGState {
47     AccelState parent_obj;
48 
49     bool mttcg_enabled;
50     bool one_insn_per_tb;
51     int splitwx_enabled;
52     unsigned long tb_size;
53 };
54 typedef struct TCGState TCGState;
55 
56 #define TYPE_TCG_ACCEL ACCEL_CLASS_NAME("tcg")
57 
58 DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE,
59                          TYPE_TCG_ACCEL)
60 
61 /*
62  * We default to false if we know other options have been enabled
63  * which are currently incompatible with MTTCG. Otherwise when each
64  * guest (target) has been updated to support:
65  *   - atomic instructions
66  *   - memory ordering primitives (barriers)
67  * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
68  *
69  * Once a guest architecture has been converted to the new primitives
70  * there is one remaining limitation to check:
71  *   - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
72  */
73 
74 static bool default_mttcg_enabled(void)
75 {
76     if (icount_enabled()) {
77         return false;
78     }
79 #ifdef TARGET_SUPPORTS_MTTCG
80     return true;
81 #else
82     return false;
83 #endif
84 }
85 
86 static void tcg_accel_instance_init(Object *obj)
87 {
88     TCGState *s = TCG_STATE(obj);
89 
90     s->mttcg_enabled = default_mttcg_enabled();
91 
92     /* If debugging enabled, default "auto on", otherwise off. */
93 #if defined(CONFIG_DEBUG_TCG) && !defined(CONFIG_USER_ONLY)
94     s->splitwx_enabled = -1;
95 #else
96     s->splitwx_enabled = 0;
97 #endif
98 }
99 
100 bool mttcg_enabled;
101 bool one_insn_per_tb;
102 
103 static int tcg_init_machine(MachineState *ms)
104 {
105     TCGState *s = TCG_STATE(current_accel());
106 #ifdef CONFIG_USER_ONLY
107     unsigned max_cpus = 1;
108 #else
109     unsigned max_cpus = ms->smp.max_cpus;
110 #endif
111 
112     tcg_allowed = true;
113     mttcg_enabled = s->mttcg_enabled;
114 
115     page_init();
116     tb_htable_init();
117     tcg_init(s->tb_size * MiB, s->splitwx_enabled, max_cpus);
118 
119 #if defined(CONFIG_SOFTMMU)
120     /*
121      * There's no guest base to take into account, so go ahead and
122      * initialize the prologue now.
123      */
124     tcg_prologue_init();
125 #endif
126 
127 #ifdef CONFIG_USER_ONLY
128     qdev_create_fake_machine();
129 #endif
130 
131     return 0;
132 }
133 
134 static char *tcg_get_thread(Object *obj, Error **errp)
135 {
136     TCGState *s = TCG_STATE(obj);
137 
138     return g_strdup(s->mttcg_enabled ? "multi" : "single");
139 }
140 
141 static void tcg_set_thread(Object *obj, const char *value, Error **errp)
142 {
143     TCGState *s = TCG_STATE(obj);
144 
145     if (strcmp(value, "multi") == 0) {
146         if (icount_enabled()) {
147             error_setg(errp, "No MTTCG when icount is enabled");
148         } else {
149 #ifndef TARGET_SUPPORTS_MTTCG
150             warn_report("Guest not yet converted to MTTCG - "
151                         "you may get unexpected results");
152 #endif
153             s->mttcg_enabled = true;
154         }
155     } else if (strcmp(value, "single") == 0) {
156         s->mttcg_enabled = false;
157     } else {
158         error_setg(errp, "Invalid 'thread' setting %s", value);
159     }
160 }
161 
162 static void tcg_get_tb_size(Object *obj, Visitor *v,
163                             const char *name, void *opaque,
164                             Error **errp)
165 {
166     TCGState *s = TCG_STATE(obj);
167     uint32_t value = s->tb_size;
168 
169     visit_type_uint32(v, name, &value, errp);
170 }
171 
172 static void tcg_set_tb_size(Object *obj, Visitor *v,
173                             const char *name, void *opaque,
174                             Error **errp)
175 {
176     TCGState *s = TCG_STATE(obj);
177     uint32_t value;
178 
179     if (!visit_type_uint32(v, name, &value, errp)) {
180         return;
181     }
182 
183     s->tb_size = value;
184 }
185 
186 static bool tcg_get_splitwx(Object *obj, Error **errp)
187 {
188     TCGState *s = TCG_STATE(obj);
189     return s->splitwx_enabled;
190 }
191 
192 static void tcg_set_splitwx(Object *obj, bool value, Error **errp)
193 {
194     TCGState *s = TCG_STATE(obj);
195     s->splitwx_enabled = value;
196 }
197 
198 static bool tcg_get_one_insn_per_tb(Object *obj, Error **errp)
199 {
200     TCGState *s = TCG_STATE(obj);
201     return s->one_insn_per_tb;
202 }
203 
204 static void tcg_set_one_insn_per_tb(Object *obj, bool value, Error **errp)
205 {
206     TCGState *s = TCG_STATE(obj);
207     s->one_insn_per_tb = value;
208     /* Set the global also: this changes the behaviour */
209     qatomic_set(&one_insn_per_tb, value);
210 }
211 
212 static int tcg_gdbstub_supported_sstep_flags(void)
213 {
214     /*
215      * In replay mode all events will come from the log and can't be
216      * suppressed otherwise we would break determinism. However as those
217      * events are tied to the number of executed instructions we won't see
218      * them occurring every time we single step.
219      */
220     if (replay_mode != REPLAY_MODE_NONE) {
221         return SSTEP_ENABLE;
222     } else {
223         return SSTEP_ENABLE | SSTEP_NOIRQ | SSTEP_NOTIMER;
224     }
225 }
226 
227 static void tcg_accel_class_init(ObjectClass *oc, void *data)
228 {
229     AccelClass *ac = ACCEL_CLASS(oc);
230     ac->name = "tcg";
231     ac->init_machine = tcg_init_machine;
232     ac->cpu_common_realize = tcg_exec_realizefn;
233     ac->cpu_common_unrealize = tcg_exec_unrealizefn;
234     ac->allowed = &tcg_allowed;
235     ac->gdbstub_supported_sstep_flags = tcg_gdbstub_supported_sstep_flags;
236 
237     object_class_property_add_str(oc, "thread",
238                                   tcg_get_thread,
239                                   tcg_set_thread);
240 
241     object_class_property_add(oc, "tb-size", "int",
242         tcg_get_tb_size, tcg_set_tb_size,
243         NULL, NULL);
244     object_class_property_set_description(oc, "tb-size",
245         "TCG translation block cache size");
246 
247     object_class_property_add_bool(oc, "split-wx",
248         tcg_get_splitwx, tcg_set_splitwx);
249     object_class_property_set_description(oc, "split-wx",
250         "Map jit pages into separate RW and RX regions");
251 
252     object_class_property_add_bool(oc, "one-insn-per-tb",
253                                    tcg_get_one_insn_per_tb,
254                                    tcg_set_one_insn_per_tb);
255     object_class_property_set_description(oc, "one-insn-per-tb",
256         "Only put one guest insn in each translation block");
257 }
258 
259 static const TypeInfo tcg_accel_type = {
260     .name = TYPE_TCG_ACCEL,
261     .parent = TYPE_ACCEL,
262     .instance_init = tcg_accel_instance_init,
263     .class_init = tcg_accel_class_init,
264     .instance_size = sizeof(TCGState),
265 };
266 module_obj(TYPE_TCG_ACCEL);
267 
268 static void register_accel_types(void)
269 {
270     type_register_static(&tcg_accel_type);
271 }
272 
273 type_init(register_accel_types);
274