1 /* 2 * QEMU TCG vCPU common functionality 3 * 4 * Functionality common to all TCG vCPU variants: mttcg, rr and icount. 5 * 6 * Copyright (c) 2003-2008 Fabrice Bellard 7 * Copyright (c) 2014 Red Hat Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "sysemu/tcg.h" 30 #include "sysemu/replay.h" 31 #include "sysemu/cpu-timers.h" 32 #include "qemu/main-loop.h" 33 #include "qemu/guest-random.h" 34 #include "qemu/timer.h" 35 #include "exec/exec-all.h" 36 #include "exec/hwaddr.h" 37 #include "exec/tb-flush.h" 38 #include "exec/gdbstub.h" 39 40 #include "hw/core/cpu.h" 41 42 #include "tcg-accel-ops.h" 43 #include "tcg-accel-ops-mttcg.h" 44 #include "tcg-accel-ops-rr.h" 45 #include "tcg-accel-ops-icount.h" 46 47 /* common functionality among all TCG variants */ 48 49 void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) 50 { 51 uint32_t cflags; 52 53 /* 54 * Include the cluster number in the hash we use to look up TBs. 55 * This is important because a TB that is valid for one cluster at 56 * a given physical address and set of CPU flags is not necessarily 57 * valid for another: 58 * the two clusters may have different views of physical memory, or 59 * may have different CPU features (eg FPU present or absent). 60 */ 61 cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; 62 63 cflags |= parallel ? CF_PARALLEL : 0; 64 cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; 65 cpu->tcg_cflags |= cflags; 66 } 67 68 void tcg_cpu_destroy(CPUState *cpu) 69 { 70 cpu_thread_signal_destroyed(cpu); 71 } 72 73 int tcg_cpu_exec(CPUState *cpu) 74 { 75 int ret; 76 assert(tcg_enabled()); 77 cpu_exec_start(cpu); 78 ret = cpu_exec(cpu); 79 cpu_exec_end(cpu); 80 return ret; 81 } 82 83 static void tcg_cpu_reset_hold(CPUState *cpu) 84 { 85 tcg_flush_jmp_cache(cpu); 86 87 tlb_flush(cpu); 88 } 89 90 /* mask must never be zero, except for A20 change call */ 91 void tcg_handle_interrupt(CPUState *cpu, int mask) 92 { 93 g_assert(bql_locked()); 94 95 cpu->interrupt_request |= mask; 96 97 /* 98 * If called from iothread context, wake the target cpu in 99 * case its halted. 100 */ 101 if (!qemu_cpu_is_self(cpu)) { 102 qemu_cpu_kick(cpu); 103 } else { 104 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 105 } 106 } 107 108 static bool tcg_supports_guest_debug(void) 109 { 110 return true; 111 } 112 113 /* Translate GDB watchpoint type to a flags value for cpu_watchpoint_* */ 114 static inline int xlat_gdb_type(CPUState *cpu, int gdbtype) 115 { 116 static const int xlat[] = { 117 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, 118 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, 119 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, 120 }; 121 122 CPUClass *cc = CPU_GET_CLASS(cpu); 123 int cputype = xlat[gdbtype]; 124 125 if (cc->gdb_stop_before_watchpoint) { 126 cputype |= BP_STOP_BEFORE_ACCESS; 127 } 128 return cputype; 129 } 130 131 static int tcg_insert_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 132 { 133 CPUState *cpu; 134 int err = 0; 135 136 switch (type) { 137 case GDB_BREAKPOINT_SW: 138 case GDB_BREAKPOINT_HW: 139 CPU_FOREACH(cpu) { 140 err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL); 141 if (err) { 142 break; 143 } 144 } 145 return err; 146 case GDB_WATCHPOINT_WRITE: 147 case GDB_WATCHPOINT_READ: 148 case GDB_WATCHPOINT_ACCESS: 149 CPU_FOREACH(cpu) { 150 err = cpu_watchpoint_insert(cpu, addr, len, 151 xlat_gdb_type(cpu, type), NULL); 152 if (err) { 153 break; 154 } 155 } 156 return err; 157 default: 158 return -ENOSYS; 159 } 160 } 161 162 static int tcg_remove_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 163 { 164 CPUState *cpu; 165 int err = 0; 166 167 switch (type) { 168 case GDB_BREAKPOINT_SW: 169 case GDB_BREAKPOINT_HW: 170 CPU_FOREACH(cpu) { 171 err = cpu_breakpoint_remove(cpu, addr, BP_GDB); 172 if (err) { 173 break; 174 } 175 } 176 return err; 177 case GDB_WATCHPOINT_WRITE: 178 case GDB_WATCHPOINT_READ: 179 case GDB_WATCHPOINT_ACCESS: 180 CPU_FOREACH(cpu) { 181 err = cpu_watchpoint_remove(cpu, addr, len, 182 xlat_gdb_type(cpu, type)); 183 if (err) { 184 break; 185 } 186 } 187 return err; 188 default: 189 return -ENOSYS; 190 } 191 } 192 193 static inline void tcg_remove_all_breakpoints(CPUState *cpu) 194 { 195 cpu_breakpoint_remove_all(cpu, BP_GDB); 196 cpu_watchpoint_remove_all(cpu, BP_GDB); 197 } 198 199 static void tcg_accel_ops_init(AccelOpsClass *ops) 200 { 201 if (qemu_tcg_mttcg_enabled()) { 202 ops->create_vcpu_thread = mttcg_start_vcpu_thread; 203 ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; 204 ops->handle_interrupt = tcg_handle_interrupt; 205 } else { 206 ops->create_vcpu_thread = rr_start_vcpu_thread; 207 ops->kick_vcpu_thread = rr_kick_vcpu_thread; 208 209 if (icount_enabled()) { 210 ops->handle_interrupt = icount_handle_interrupt; 211 ops->get_virtual_clock = icount_get; 212 ops->get_elapsed_ticks = icount_get; 213 } else { 214 ops->handle_interrupt = tcg_handle_interrupt; 215 } 216 } 217 218 ops->cpu_reset_hold = tcg_cpu_reset_hold; 219 ops->supports_guest_debug = tcg_supports_guest_debug; 220 ops->insert_breakpoint = tcg_insert_breakpoint; 221 ops->remove_breakpoint = tcg_remove_breakpoint; 222 ops->remove_all_breakpoints = tcg_remove_all_breakpoints; 223 } 224 225 static void tcg_accel_ops_class_init(ObjectClass *oc, void *data) 226 { 227 AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); 228 229 ops->ops_init = tcg_accel_ops_init; 230 } 231 232 static const TypeInfo tcg_accel_ops_type = { 233 .name = ACCEL_OPS_NAME("tcg"), 234 235 .parent = TYPE_ACCEL_OPS, 236 .class_init = tcg_accel_ops_class_init, 237 .abstract = true, 238 }; 239 module_obj(ACCEL_OPS_NAME("tcg")); 240 241 static void tcg_accel_ops_register_types(void) 242 { 243 type_register_static(&tcg_accel_ops_type); 244 } 245 type_init(tcg_accel_ops_register_types); 246