1 /* 2 * QEMU TCG vCPU common functionality 3 * 4 * Functionality common to all TCG vCPU variants: mttcg, rr and icount. 5 * 6 * Copyright (c) 2003-2008 Fabrice Bellard 7 * Copyright (c) 2014 Red Hat Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "system/accel-ops.h" 30 #include "system/tcg.h" 31 #include "system/replay.h" 32 #include "exec/icount.h" 33 #include "qemu/main-loop.h" 34 #include "qemu/guest-random.h" 35 #include "qemu/timer.h" 36 #include "exec/cputlb.h" 37 #include "exec/hwaddr.h" 38 #include "exec/tb-flush.h" 39 #include "exec/translation-block.h" 40 #include "exec/watchpoint.h" 41 #include "gdbstub/enums.h" 42 43 #include "hw/core/cpu.h" 44 45 #include "tcg-accel-ops.h" 46 #include "tcg-accel-ops-mttcg.h" 47 #include "tcg-accel-ops-rr.h" 48 #include "tcg-accel-ops-icount.h" 49 50 /* common functionality among all TCG variants */ 51 52 void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) 53 { 54 uint32_t cflags; 55 56 /* 57 * Include the cluster number in the hash we use to look up TBs. 58 * This is important because a TB that is valid for one cluster at 59 * a given physical address and set of CPU flags is not necessarily 60 * valid for another: 61 * the two clusters may have different views of physical memory, or 62 * may have different CPU features (eg FPU present or absent). 63 */ 64 cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; 65 66 cflags |= parallel ? CF_PARALLEL : 0; 67 cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; 68 tcg_cflags_set(cpu, cflags); 69 } 70 71 void tcg_cpu_destroy(CPUState *cpu) 72 { 73 cpu_thread_signal_destroyed(cpu); 74 } 75 76 int tcg_cpu_exec(CPUState *cpu) 77 { 78 int ret; 79 assert(tcg_enabled()); 80 cpu_exec_start(cpu); 81 ret = cpu_exec(cpu); 82 cpu_exec_end(cpu); 83 84 qatomic_set_mb(&cpu->exit_request, 0); 85 86 return ret; 87 } 88 89 static void tcg_cpu_reset_hold(CPUState *cpu) 90 { 91 tcg_flush_jmp_cache(cpu); 92 93 tlb_flush(cpu); 94 } 95 96 /* mask must never be zero, except for A20 change call */ 97 void tcg_handle_interrupt(CPUState *cpu, int mask) 98 { 99 cpu->interrupt_request |= mask; 100 101 /* 102 * If called from iothread context, wake the target cpu in 103 * case its halted. 104 */ 105 if (!qemu_cpu_is_self(cpu)) { 106 qemu_cpu_kick(cpu); 107 } else { 108 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 109 } 110 } 111 112 static bool tcg_supports_guest_debug(void) 113 { 114 return true; 115 } 116 117 /* Translate GDB watchpoint type to a flags value for cpu_watchpoint_* */ 118 static inline int xlat_gdb_type(CPUState *cpu, int gdbtype) 119 { 120 static const int xlat[] = { 121 [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, 122 [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, 123 [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, 124 }; 125 126 int cputype = xlat[gdbtype]; 127 128 if (cpu->cc->gdb_stop_before_watchpoint) { 129 cputype |= BP_STOP_BEFORE_ACCESS; 130 } 131 return cputype; 132 } 133 134 static int tcg_insert_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 135 { 136 CPUState *cpu; 137 int err = 0; 138 139 switch (type) { 140 case GDB_BREAKPOINT_SW: 141 case GDB_BREAKPOINT_HW: 142 CPU_FOREACH(cpu) { 143 err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL); 144 if (err) { 145 break; 146 } 147 } 148 return err; 149 case GDB_WATCHPOINT_WRITE: 150 case GDB_WATCHPOINT_READ: 151 case GDB_WATCHPOINT_ACCESS: 152 CPU_FOREACH(cpu) { 153 err = cpu_watchpoint_insert(cpu, addr, len, 154 xlat_gdb_type(cpu, type), NULL); 155 if (err) { 156 break; 157 } 158 } 159 return err; 160 default: 161 return -ENOSYS; 162 } 163 } 164 165 static int tcg_remove_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len) 166 { 167 CPUState *cpu; 168 int err = 0; 169 170 switch (type) { 171 case GDB_BREAKPOINT_SW: 172 case GDB_BREAKPOINT_HW: 173 CPU_FOREACH(cpu) { 174 err = cpu_breakpoint_remove(cpu, addr, BP_GDB); 175 if (err) { 176 break; 177 } 178 } 179 return err; 180 case GDB_WATCHPOINT_WRITE: 181 case GDB_WATCHPOINT_READ: 182 case GDB_WATCHPOINT_ACCESS: 183 CPU_FOREACH(cpu) { 184 err = cpu_watchpoint_remove(cpu, addr, len, 185 xlat_gdb_type(cpu, type)); 186 if (err) { 187 break; 188 } 189 } 190 return err; 191 default: 192 return -ENOSYS; 193 } 194 } 195 196 static inline void tcg_remove_all_breakpoints(CPUState *cpu) 197 { 198 cpu_breakpoint_remove_all(cpu, BP_GDB); 199 cpu_watchpoint_remove_all(cpu, BP_GDB); 200 } 201 202 static void tcg_accel_ops_init(AccelClass *ac) 203 { 204 AccelOpsClass *ops = ac->ops; 205 206 if (qemu_tcg_mttcg_enabled()) { 207 ops->create_vcpu_thread = mttcg_start_vcpu_thread; 208 ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; 209 ops->handle_interrupt = tcg_handle_interrupt; 210 } else { 211 ops->create_vcpu_thread = rr_start_vcpu_thread; 212 ops->kick_vcpu_thread = rr_kick_vcpu_thread; 213 214 if (icount_enabled()) { 215 ops->handle_interrupt = icount_handle_interrupt; 216 ops->get_virtual_clock = icount_get; 217 ops->get_elapsed_ticks = icount_get; 218 } else { 219 ops->handle_interrupt = tcg_handle_interrupt; 220 } 221 } 222 223 ops->cpu_reset_hold = tcg_cpu_reset_hold; 224 ops->supports_guest_debug = tcg_supports_guest_debug; 225 ops->insert_breakpoint = tcg_insert_breakpoint; 226 ops->remove_breakpoint = tcg_remove_breakpoint; 227 ops->remove_all_breakpoints = tcg_remove_all_breakpoints; 228 } 229 230 static void tcg_accel_ops_class_init(ObjectClass *oc, const void *data) 231 { 232 AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); 233 234 ops->ops_init = tcg_accel_ops_init; 235 } 236 237 static const TypeInfo tcg_accel_ops_type = { 238 .name = ACCEL_OPS_NAME("tcg"), 239 240 .parent = TYPE_ACCEL_OPS, 241 .class_init = tcg_accel_ops_class_init, 242 .abstract = true, 243 }; 244 module_obj(ACCEL_OPS_NAME("tcg")); 245 246 static void tcg_accel_ops_register_types(void) 247 { 248 type_register_static(&tcg_accel_ops_type); 249 } 250 type_init(tcg_accel_ops_register_types); 251