1 /* 2 * emulator main execution loop 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu-common.h" 22 #include "qemu/qemu-print.h" 23 #include "hw/core/tcg-cpu-ops.h" 24 #include "trace.h" 25 #include "disas/disas.h" 26 #include "exec/exec-all.h" 27 #include "tcg/tcg.h" 28 #include "qemu/atomic.h" 29 #include "qemu/compiler.h" 30 #include "qemu/timer.h" 31 #include "qemu/rcu.h" 32 #include "exec/log.h" 33 #include "qemu/main-loop.h" 34 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 35 #include "hw/i386/apic.h" 36 #endif 37 #include "sysemu/cpus.h" 38 #include "exec/cpu-all.h" 39 #include "sysemu/cpu-timers.h" 40 #include "sysemu/replay.h" 41 #include "exec/helper-proto.h" 42 #include "tb-hash.h" 43 #include "tb-context.h" 44 #include "internal.h" 45 46 /* -icount align implementation. */ 47 48 typedef struct SyncClocks { 49 int64_t diff_clk; 50 int64_t last_cpu_icount; 51 int64_t realtime_clock; 52 } SyncClocks; 53 54 #if !defined(CONFIG_USER_ONLY) 55 /* Allow the guest to have a max 3ms advance. 56 * The difference between the 2 clocks could therefore 57 * oscillate around 0. 58 */ 59 #define VM_CLOCK_ADVANCE 3000000 60 #define THRESHOLD_REDUCE 1.5 61 #define MAX_DELAY_PRINT_RATE 2000000000LL 62 #define MAX_NB_PRINTS 100 63 64 static int64_t max_delay; 65 static int64_t max_advance; 66 67 static void align_clocks(SyncClocks *sc, CPUState *cpu) 68 { 69 int64_t cpu_icount; 70 71 if (!icount_align_option) { 72 return; 73 } 74 75 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low; 76 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount); 77 sc->last_cpu_icount = cpu_icount; 78 79 if (sc->diff_clk > VM_CLOCK_ADVANCE) { 80 #ifndef _WIN32 81 struct timespec sleep_delay, rem_delay; 82 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; 83 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; 84 if (nanosleep(&sleep_delay, &rem_delay) < 0) { 85 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; 86 } else { 87 sc->diff_clk = 0; 88 } 89 #else 90 Sleep(sc->diff_clk / SCALE_MS); 91 sc->diff_clk = 0; 92 #endif 93 } 94 } 95 96 static void print_delay(const SyncClocks *sc) 97 { 98 static float threshold_delay; 99 static int64_t last_realtime_clock; 100 static int nb_prints; 101 102 if (icount_align_option && 103 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && 104 nb_prints < MAX_NB_PRINTS) { 105 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || 106 (-sc->diff_clk / (float)1000000000LL < 107 (threshold_delay - THRESHOLD_REDUCE))) { 108 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; 109 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n", 110 threshold_delay - 1, 111 threshold_delay); 112 nb_prints++; 113 last_realtime_clock = sc->realtime_clock; 114 } 115 } 116 } 117 118 static void init_delay_params(SyncClocks *sc, CPUState *cpu) 119 { 120 if (!icount_align_option) { 121 return; 122 } 123 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); 124 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; 125 sc->last_cpu_icount 126 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low; 127 if (sc->diff_clk < max_delay) { 128 max_delay = sc->diff_clk; 129 } 130 if (sc->diff_clk > max_advance) { 131 max_advance = sc->diff_clk; 132 } 133 134 /* Print every 2s max if the guest is late. We limit the number 135 of printed messages to NB_PRINT_MAX(currently 100) */ 136 print_delay(sc); 137 } 138 #else 139 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 140 { 141 } 142 143 static void init_delay_params(SyncClocks *sc, const CPUState *cpu) 144 { 145 } 146 #endif /* CONFIG USER ONLY */ 147 148 uint32_t curr_cflags(CPUState *cpu) 149 { 150 uint32_t cflags = cpu->tcg_cflags; 151 152 /* 153 * For singlestep and -d nochain, suppress goto_tb so that 154 * we can log -d cpu,exec after every TB. 155 */ 156 if (singlestep) { 157 cflags |= CF_NO_GOTO_TB | 1; 158 } else if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { 159 cflags |= CF_NO_GOTO_TB; 160 } 161 162 return cflags; 163 } 164 165 /* Might cause an exception, so have a longjmp destination ready */ 166 static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc, 167 target_ulong cs_base, 168 uint32_t flags, uint32_t cflags) 169 { 170 TranslationBlock *tb; 171 uint32_t hash; 172 173 /* we should never be trying to look up an INVALID tb */ 174 tcg_debug_assert(!(cflags & CF_INVALID)); 175 176 hash = tb_jmp_cache_hash_func(pc); 177 tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); 178 179 if (likely(tb && 180 tb->pc == pc && 181 tb->cs_base == cs_base && 182 tb->flags == flags && 183 tb->trace_vcpu_dstate == *cpu->trace_dstate && 184 tb_cflags(tb) == cflags)) { 185 return tb; 186 } 187 tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags); 188 if (tb == NULL) { 189 return NULL; 190 } 191 qatomic_set(&cpu->tb_jmp_cache[hash], tb); 192 return tb; 193 } 194 195 static inline void log_cpu_exec(target_ulong pc, CPUState *cpu, 196 const TranslationBlock *tb) 197 { 198 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_CPU | CPU_LOG_EXEC)) 199 && qemu_log_in_addr_range(pc)) { 200 201 qemu_log_mask(CPU_LOG_EXEC, 202 "Trace %d: %p [" TARGET_FMT_lx 203 "/" TARGET_FMT_lx "/%08x/%08x] %s\n", 204 cpu->cpu_index, tb->tc.ptr, tb->cs_base, pc, 205 tb->flags, tb->cflags, lookup_symbol(pc)); 206 207 #if defined(DEBUG_DISAS) 208 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { 209 FILE *logfile = qemu_log_lock(); 210 int flags = 0; 211 212 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { 213 flags |= CPU_DUMP_FPU; 214 } 215 #if defined(TARGET_I386) 216 flags |= CPU_DUMP_CCOP; 217 #endif 218 log_cpu_state(cpu, flags); 219 qemu_log_unlock(logfile); 220 } 221 #endif /* DEBUG_DISAS */ 222 } 223 } 224 225 /** 226 * helper_lookup_tb_ptr: quick check for next tb 227 * @env: current cpu state 228 * 229 * Look for an existing TB matching the current cpu state. 230 * If found, return the code pointer. If not found, return 231 * the tcg epilogue so that we return into cpu_tb_exec. 232 */ 233 const void *HELPER(lookup_tb_ptr)(CPUArchState *env) 234 { 235 CPUState *cpu = env_cpu(env); 236 TranslationBlock *tb; 237 target_ulong cs_base, pc; 238 uint32_t flags; 239 240 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 241 242 tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags(cpu)); 243 if (tb == NULL) { 244 return tcg_code_gen_epilogue; 245 } 246 247 log_cpu_exec(pc, cpu, tb); 248 249 return tb->tc.ptr; 250 } 251 252 /* Execute a TB, and fix up the CPU state afterwards if necessary */ 253 /* 254 * Disable CFI checks. 255 * TCG creates binary blobs at runtime, with the transformed code. 256 * A TB is a blob of binary code, created at runtime and called with an 257 * indirect function call. Since such function did not exist at compile time, 258 * the CFI runtime has no way to verify its signature and would fail. 259 * TCG is not considered a security-sensitive part of QEMU so this does not 260 * affect the impact of CFI in environment with high security requirements 261 */ 262 static inline TranslationBlock * QEMU_DISABLE_CFI 263 cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit) 264 { 265 CPUArchState *env = cpu->env_ptr; 266 uintptr_t ret; 267 TranslationBlock *last_tb; 268 const void *tb_ptr = itb->tc.ptr; 269 270 log_cpu_exec(itb->pc, cpu, itb); 271 272 qemu_thread_jit_execute(); 273 ret = tcg_qemu_tb_exec(env, tb_ptr); 274 cpu->can_do_io = 1; 275 /* 276 * TODO: Delay swapping back to the read-write region of the TB 277 * until we actually need to modify the TB. The read-only copy, 278 * coming from the rx region, shares the same host TLB entry as 279 * the code that executed the exit_tb opcode that arrived here. 280 * If we insist on touching both the RX and the RW pages, we 281 * double the host TLB pressure. 282 */ 283 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK)); 284 *tb_exit = ret & TB_EXIT_MASK; 285 286 trace_exec_tb_exit(last_tb, *tb_exit); 287 288 if (*tb_exit > TB_EXIT_IDX1) { 289 /* We didn't start executing this TB (eg because the instruction 290 * counter hit zero); we must restore the guest PC to the address 291 * of the start of the TB. 292 */ 293 CPUClass *cc = CPU_GET_CLASS(cpu); 294 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, 295 "Stopped execution of TB chain before %p [" 296 TARGET_FMT_lx "] %s\n", 297 last_tb->tc.ptr, last_tb->pc, 298 lookup_symbol(last_tb->pc)); 299 if (cc->tcg_ops->synchronize_from_tb) { 300 cc->tcg_ops->synchronize_from_tb(cpu, last_tb); 301 } else { 302 assert(cc->set_pc); 303 cc->set_pc(cpu, last_tb->pc); 304 } 305 } 306 return last_tb; 307 } 308 309 310 static void cpu_exec_enter(CPUState *cpu) 311 { 312 CPUClass *cc = CPU_GET_CLASS(cpu); 313 314 if (cc->tcg_ops->cpu_exec_enter) { 315 cc->tcg_ops->cpu_exec_enter(cpu); 316 } 317 } 318 319 static void cpu_exec_exit(CPUState *cpu) 320 { 321 CPUClass *cc = CPU_GET_CLASS(cpu); 322 323 if (cc->tcg_ops->cpu_exec_exit) { 324 cc->tcg_ops->cpu_exec_exit(cpu); 325 } 326 } 327 328 void cpu_exec_step_atomic(CPUState *cpu) 329 { 330 CPUArchState *env = (CPUArchState *)cpu->env_ptr; 331 TranslationBlock *tb; 332 target_ulong cs_base, pc; 333 uint32_t flags, cflags; 334 int tb_exit; 335 336 if (sigsetjmp(cpu->jmp_env, 0) == 0) { 337 start_exclusive(); 338 g_assert(cpu == current_cpu); 339 g_assert(!cpu->running); 340 cpu->running = true; 341 342 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 343 344 cflags = curr_cflags(cpu); 345 /* Execute in a serial context. */ 346 cflags &= ~CF_PARALLEL; 347 /* After 1 insn, return and release the exclusive lock. */ 348 cflags |= CF_NO_GOTO_TB | CF_NO_GOTO_PTR | 1; 349 350 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); 351 if (tb == NULL) { 352 mmap_lock(); 353 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 354 mmap_unlock(); 355 } 356 357 cpu_exec_enter(cpu); 358 /* execute the generated code */ 359 trace_exec_tb(tb, pc); 360 cpu_tb_exec(cpu, tb, &tb_exit); 361 cpu_exec_exit(cpu); 362 } else { 363 /* 364 * The mmap_lock is dropped by tb_gen_code if it runs out of 365 * memory. 366 */ 367 #ifndef CONFIG_SOFTMMU 368 tcg_debug_assert(!have_mmap_lock()); 369 #endif 370 if (qemu_mutex_iothread_locked()) { 371 qemu_mutex_unlock_iothread(); 372 } 373 assert_no_pages_locked(); 374 qemu_plugin_disable_mem_helpers(cpu); 375 } 376 377 378 /* 379 * As we start the exclusive region before codegen we must still 380 * be in the region if we longjump out of either the codegen or 381 * the execution. 382 */ 383 g_assert(cpu_in_exclusive_context(cpu)); 384 cpu->running = false; 385 end_exclusive(); 386 } 387 388 struct tb_desc { 389 target_ulong pc; 390 target_ulong cs_base; 391 CPUArchState *env; 392 tb_page_addr_t phys_page1; 393 uint32_t flags; 394 uint32_t cflags; 395 uint32_t trace_vcpu_dstate; 396 }; 397 398 static bool tb_lookup_cmp(const void *p, const void *d) 399 { 400 const TranslationBlock *tb = p; 401 const struct tb_desc *desc = d; 402 403 if (tb->pc == desc->pc && 404 tb->page_addr[0] == desc->phys_page1 && 405 tb->cs_base == desc->cs_base && 406 tb->flags == desc->flags && 407 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && 408 tb_cflags(tb) == desc->cflags) { 409 /* check next page if needed */ 410 if (tb->page_addr[1] == -1) { 411 return true; 412 } else { 413 tb_page_addr_t phys_page2; 414 target_ulong virt_page2; 415 416 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 417 phys_page2 = get_page_addr_code(desc->env, virt_page2); 418 if (tb->page_addr[1] == phys_page2) { 419 return true; 420 } 421 } 422 } 423 return false; 424 } 425 426 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, 427 target_ulong cs_base, uint32_t flags, 428 uint32_t cflags) 429 { 430 tb_page_addr_t phys_pc; 431 struct tb_desc desc; 432 uint32_t h; 433 434 desc.env = (CPUArchState *)cpu->env_ptr; 435 desc.cs_base = cs_base; 436 desc.flags = flags; 437 desc.cflags = cflags; 438 desc.trace_vcpu_dstate = *cpu->trace_dstate; 439 desc.pc = pc; 440 phys_pc = get_page_addr_code(desc.env, pc); 441 if (phys_pc == -1) { 442 return NULL; 443 } 444 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; 445 h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); 446 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); 447 } 448 449 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) 450 { 451 if (TCG_TARGET_HAS_direct_jump) { 452 uintptr_t offset = tb->jmp_target_arg[n]; 453 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; 454 uintptr_t jmp_rx = tc_ptr + offset; 455 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff; 456 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr); 457 } else { 458 tb->jmp_target_arg[n] = addr; 459 } 460 } 461 462 static inline void tb_add_jump(TranslationBlock *tb, int n, 463 TranslationBlock *tb_next) 464 { 465 uintptr_t old; 466 467 qemu_thread_jit_write(); 468 assert(n < ARRAY_SIZE(tb->jmp_list_next)); 469 qemu_spin_lock(&tb_next->jmp_lock); 470 471 /* make sure the destination TB is valid */ 472 if (tb_next->cflags & CF_INVALID) { 473 goto out_unlock_next; 474 } 475 /* Atomically claim the jump destination slot only if it was NULL */ 476 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, 477 (uintptr_t)tb_next); 478 if (old) { 479 goto out_unlock_next; 480 } 481 482 /* patch the native jump address */ 483 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); 484 485 /* add in TB jmp list */ 486 tb->jmp_list_next[n] = tb_next->jmp_list_head; 487 tb_next->jmp_list_head = (uintptr_t)tb | n; 488 489 qemu_spin_unlock(&tb_next->jmp_lock); 490 491 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, 492 "Linking TBs %p [" TARGET_FMT_lx 493 "] index %d -> %p [" TARGET_FMT_lx "]\n", 494 tb->tc.ptr, tb->pc, n, 495 tb_next->tc.ptr, tb_next->pc); 496 return; 497 498 out_unlock_next: 499 qemu_spin_unlock(&tb_next->jmp_lock); 500 return; 501 } 502 503 static inline TranslationBlock *tb_find(CPUState *cpu, 504 TranslationBlock *last_tb, 505 int tb_exit, uint32_t cflags) 506 { 507 CPUArchState *env = (CPUArchState *)cpu->env_ptr; 508 TranslationBlock *tb; 509 target_ulong cs_base, pc; 510 uint32_t flags; 511 512 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 513 514 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); 515 if (tb == NULL) { 516 mmap_lock(); 517 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 518 mmap_unlock(); 519 /* We add the TB in the virtual pc hash table for the fast lookup */ 520 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); 521 } 522 #ifndef CONFIG_USER_ONLY 523 /* We don't take care of direct jumps when address mapping changes in 524 * system emulation. So it's not safe to make a direct jump to a TB 525 * spanning two pages because the mapping for the second page can change. 526 */ 527 if (tb->page_addr[1] != -1) { 528 last_tb = NULL; 529 } 530 #endif 531 /* See if we can patch the calling TB. */ 532 if (last_tb) { 533 tb_add_jump(last_tb, tb_exit, tb); 534 } 535 return tb; 536 } 537 538 static inline bool cpu_handle_halt(CPUState *cpu) 539 { 540 if (cpu->halted) { 541 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 542 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { 543 X86CPU *x86_cpu = X86_CPU(cpu); 544 qemu_mutex_lock_iothread(); 545 apic_poll_irq(x86_cpu->apic_state); 546 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); 547 qemu_mutex_unlock_iothread(); 548 } 549 #endif 550 if (!cpu_has_work(cpu)) { 551 return true; 552 } 553 554 cpu->halted = 0; 555 } 556 557 return false; 558 } 559 560 static inline void cpu_handle_debug_exception(CPUState *cpu) 561 { 562 CPUClass *cc = CPU_GET_CLASS(cpu); 563 CPUWatchpoint *wp; 564 565 if (!cpu->watchpoint_hit) { 566 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 567 wp->flags &= ~BP_WATCHPOINT_HIT; 568 } 569 } 570 571 if (cc->tcg_ops->debug_excp_handler) { 572 cc->tcg_ops->debug_excp_handler(cpu); 573 } 574 } 575 576 static inline bool cpu_handle_exception(CPUState *cpu, int *ret) 577 { 578 if (cpu->exception_index < 0) { 579 #ifndef CONFIG_USER_ONLY 580 if (replay_has_exception() 581 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) { 582 /* Execute just one insn to trigger exception pending in the log */ 583 cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1; 584 } 585 #endif 586 return false; 587 } 588 if (cpu->exception_index >= EXCP_INTERRUPT) { 589 /* exit request from the cpu execution loop */ 590 *ret = cpu->exception_index; 591 if (*ret == EXCP_DEBUG) { 592 cpu_handle_debug_exception(cpu); 593 } 594 cpu->exception_index = -1; 595 return true; 596 } else { 597 #if defined(CONFIG_USER_ONLY) 598 /* if user mode only, we simulate a fake exception 599 which will be handled outside the cpu execution 600 loop */ 601 #if defined(TARGET_I386) 602 CPUClass *cc = CPU_GET_CLASS(cpu); 603 cc->tcg_ops->do_interrupt(cpu); 604 #endif 605 *ret = cpu->exception_index; 606 cpu->exception_index = -1; 607 return true; 608 #else 609 if (replay_exception()) { 610 CPUClass *cc = CPU_GET_CLASS(cpu); 611 qemu_mutex_lock_iothread(); 612 cc->tcg_ops->do_interrupt(cpu); 613 qemu_mutex_unlock_iothread(); 614 cpu->exception_index = -1; 615 616 if (unlikely(cpu->singlestep_enabled)) { 617 /* 618 * After processing the exception, ensure an EXCP_DEBUG is 619 * raised when single-stepping so that GDB doesn't miss the 620 * next instruction. 621 */ 622 *ret = EXCP_DEBUG; 623 cpu_handle_debug_exception(cpu); 624 return true; 625 } 626 } else if (!replay_has_interrupt()) { 627 /* give a chance to iothread in replay mode */ 628 *ret = EXCP_INTERRUPT; 629 return true; 630 } 631 #endif 632 } 633 634 return false; 635 } 636 637 /* 638 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a 639 * "real" interrupt event later. It does not need to be recorded for 640 * replay purposes. 641 */ 642 static inline bool need_replay_interrupt(int interrupt_request) 643 { 644 #if defined(TARGET_I386) 645 return !(interrupt_request & CPU_INTERRUPT_POLL); 646 #else 647 return true; 648 #endif 649 } 650 651 static inline bool cpu_handle_interrupt(CPUState *cpu, 652 TranslationBlock **last_tb) 653 { 654 CPUClass *cc = CPU_GET_CLASS(cpu); 655 656 /* Clear the interrupt flag now since we're processing 657 * cpu->interrupt_request and cpu->exit_request. 658 * Ensure zeroing happens before reading cpu->exit_request or 659 * cpu->interrupt_request (see also smp_wmb in cpu_exit()) 660 */ 661 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0); 662 663 if (unlikely(qatomic_read(&cpu->interrupt_request))) { 664 int interrupt_request; 665 qemu_mutex_lock_iothread(); 666 interrupt_request = cpu->interrupt_request; 667 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { 668 /* Mask out external interrupts for this step. */ 669 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; 670 } 671 if (interrupt_request & CPU_INTERRUPT_DEBUG) { 672 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; 673 cpu->exception_index = EXCP_DEBUG; 674 qemu_mutex_unlock_iothread(); 675 return true; 676 } 677 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { 678 /* Do nothing */ 679 } else if (interrupt_request & CPU_INTERRUPT_HALT) { 680 replay_interrupt(); 681 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; 682 cpu->halted = 1; 683 cpu->exception_index = EXCP_HLT; 684 qemu_mutex_unlock_iothread(); 685 return true; 686 } 687 #if defined(TARGET_I386) 688 else if (interrupt_request & CPU_INTERRUPT_INIT) { 689 X86CPU *x86_cpu = X86_CPU(cpu); 690 CPUArchState *env = &x86_cpu->env; 691 replay_interrupt(); 692 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); 693 do_cpu_init(x86_cpu); 694 cpu->exception_index = EXCP_HALTED; 695 qemu_mutex_unlock_iothread(); 696 return true; 697 } 698 #else 699 else if (interrupt_request & CPU_INTERRUPT_RESET) { 700 replay_interrupt(); 701 cpu_reset(cpu); 702 qemu_mutex_unlock_iothread(); 703 return true; 704 } 705 #endif 706 /* The target hook has 3 exit conditions: 707 False when the interrupt isn't processed, 708 True when it is, and we should restart on a new TB, 709 and via longjmp via cpu_loop_exit. */ 710 else { 711 if (cc->tcg_ops->cpu_exec_interrupt && 712 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { 713 if (need_replay_interrupt(interrupt_request)) { 714 replay_interrupt(); 715 } 716 /* 717 * After processing the interrupt, ensure an EXCP_DEBUG is 718 * raised when single-stepping so that GDB doesn't miss the 719 * next instruction. 720 */ 721 cpu->exception_index = 722 (cpu->singlestep_enabled ? EXCP_DEBUG : -1); 723 *last_tb = NULL; 724 } 725 /* The target hook may have updated the 'cpu->interrupt_request'; 726 * reload the 'interrupt_request' value */ 727 interrupt_request = cpu->interrupt_request; 728 } 729 if (interrupt_request & CPU_INTERRUPT_EXITTB) { 730 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; 731 /* ensure that no TB jump will be modified as 732 the program flow was changed */ 733 *last_tb = NULL; 734 } 735 736 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ 737 qemu_mutex_unlock_iothread(); 738 } 739 740 /* Finally, check if we need to exit to the main loop. */ 741 if (unlikely(qatomic_read(&cpu->exit_request)) 742 || (icount_enabled() 743 && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT) 744 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) { 745 qatomic_set(&cpu->exit_request, 0); 746 if (cpu->exception_index == -1) { 747 cpu->exception_index = EXCP_INTERRUPT; 748 } 749 return true; 750 } 751 752 return false; 753 } 754 755 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, 756 TranslationBlock **last_tb, int *tb_exit) 757 { 758 int32_t insns_left; 759 760 trace_exec_tb(tb, tb->pc); 761 tb = cpu_tb_exec(cpu, tb, tb_exit); 762 if (*tb_exit != TB_EXIT_REQUESTED) { 763 *last_tb = tb; 764 return; 765 } 766 767 *last_tb = NULL; 768 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32); 769 if (insns_left < 0) { 770 /* Something asked us to stop executing chained TBs; just 771 * continue round the main loop. Whatever requested the exit 772 * will also have set something else (eg exit_request or 773 * interrupt_request) which will be handled by 774 * cpu_handle_interrupt. cpu_handle_interrupt will also 775 * clear cpu->icount_decr.u16.high. 776 */ 777 return; 778 } 779 780 /* Instruction counter expired. */ 781 assert(icount_enabled()); 782 #ifndef CONFIG_USER_ONLY 783 /* Ensure global icount has gone forward */ 784 icount_update(cpu); 785 /* Refill decrementer and continue execution. */ 786 insns_left = MIN(CF_COUNT_MASK, cpu->icount_budget); 787 cpu_neg(cpu)->icount_decr.u16.low = insns_left; 788 cpu->icount_extra = cpu->icount_budget - insns_left; 789 790 /* 791 * If the next tb has more instructions than we have left to 792 * execute we need to ensure we find/generate a TB with exactly 793 * insns_left instructions in it. 794 */ 795 if (!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount) { 796 cpu->cflags_next_tb = (tb->cflags & ~CF_COUNT_MASK) | insns_left; 797 } 798 #endif 799 } 800 801 /* main execution loop */ 802 803 int cpu_exec(CPUState *cpu) 804 { 805 CPUClass *cc = CPU_GET_CLASS(cpu); 806 int ret; 807 SyncClocks sc = { 0 }; 808 809 /* replay_interrupt may need current_cpu */ 810 current_cpu = cpu; 811 812 if (cpu_handle_halt(cpu)) { 813 return EXCP_HALTED; 814 } 815 816 rcu_read_lock(); 817 818 cpu_exec_enter(cpu); 819 820 /* Calculate difference between guest clock and host clock. 821 * This delay includes the delay of the last cycle, so 822 * what we have to do is sleep until it is 0. As for the 823 * advance/delay we gain here, we try to fix it next time. 824 */ 825 init_delay_params(&sc, cpu); 826 827 /* prepare setjmp context for exception handling */ 828 if (sigsetjmp(cpu->jmp_env, 0) != 0) { 829 #if defined(__clang__) 830 /* 831 * Some compilers wrongly smash all local variables after 832 * siglongjmp (the spec requires that only non-volatile locals 833 * which are changed between the sigsetjmp and siglongjmp are 834 * permitted to be trashed). There were bug reports for gcc 835 * 4.5.0 and clang. The bug is fixed in all versions of gcc 836 * that we support, but is still unfixed in clang: 837 * https://bugs.llvm.org/show_bug.cgi?id=21183 838 * 839 * Reload essential local variables here for those compilers. 840 * Newer versions of gcc would complain about this code (-Wclobbered), 841 * so we only perform the workaround for clang. 842 */ 843 cpu = current_cpu; 844 cc = CPU_GET_CLASS(cpu); 845 #else 846 /* 847 * Non-buggy compilers preserve these locals; assert that 848 * they have the correct value. 849 */ 850 g_assert(cpu == current_cpu); 851 g_assert(cc == CPU_GET_CLASS(cpu)); 852 #endif 853 854 #ifndef CONFIG_SOFTMMU 855 tcg_debug_assert(!have_mmap_lock()); 856 #endif 857 if (qemu_mutex_iothread_locked()) { 858 qemu_mutex_unlock_iothread(); 859 } 860 qemu_plugin_disable_mem_helpers(cpu); 861 862 assert_no_pages_locked(); 863 } 864 865 /* if an exception is pending, we execute it here */ 866 while (!cpu_handle_exception(cpu, &ret)) { 867 TranslationBlock *last_tb = NULL; 868 int tb_exit = 0; 869 870 while (!cpu_handle_interrupt(cpu, &last_tb)) { 871 uint32_t cflags = cpu->cflags_next_tb; 872 TranslationBlock *tb; 873 874 /* When requested, use an exact setting for cflags for the next 875 execution. This is used for icount, precise smc, and stop- 876 after-access watchpoints. Since this request should never 877 have CF_INVALID set, -1 is a convenient invalid value that 878 does not require tcg headers for cpu_common_reset. */ 879 if (cflags == -1) { 880 cflags = curr_cflags(cpu); 881 } else { 882 cpu->cflags_next_tb = -1; 883 } 884 885 tb = tb_find(cpu, last_tb, tb_exit, cflags); 886 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); 887 /* Try to align the host and virtual clocks 888 if the guest is in advance */ 889 align_clocks(&sc, cpu); 890 } 891 } 892 893 cpu_exec_exit(cpu); 894 rcu_read_unlock(); 895 896 return ret; 897 } 898 899 void tcg_exec_realizefn(CPUState *cpu, Error **errp) 900 { 901 static bool tcg_target_initialized; 902 CPUClass *cc = CPU_GET_CLASS(cpu); 903 904 if (!tcg_target_initialized) { 905 cc->tcg_ops->initialize(); 906 tcg_target_initialized = true; 907 } 908 tlb_init(cpu); 909 qemu_plugin_vcpu_init_hook(cpu); 910 911 #ifndef CONFIG_USER_ONLY 912 tcg_iommu_init_notifier_list(cpu); 913 #endif /* !CONFIG_USER_ONLY */ 914 } 915 916 /* undo the initializations in reverse order */ 917 void tcg_exec_unrealizefn(CPUState *cpu) 918 { 919 #ifndef CONFIG_USER_ONLY 920 tcg_iommu_free_notifier_list(cpu); 921 #endif /* !CONFIG_USER_ONLY */ 922 923 qemu_plugin_vcpu_exit_hook(cpu); 924 tlb_destroy(cpu); 925 } 926 927 #ifndef CONFIG_USER_ONLY 928 929 void dump_drift_info(void) 930 { 931 if (!icount_enabled()) { 932 return; 933 } 934 935 qemu_printf("Host - Guest clock %"PRIi64" ms\n", 936 (cpu_get_clock() - icount_get()) / SCALE_MS); 937 if (icount_align_option) { 938 qemu_printf("Max guest delay %"PRIi64" ms\n", 939 -max_delay / SCALE_MS); 940 qemu_printf("Max guest advance %"PRIi64" ms\n", 941 max_advance / SCALE_MS); 942 } else { 943 qemu_printf("Max guest delay NA\n"); 944 qemu_printf("Max guest advance NA\n"); 945 } 946 } 947 948 #endif /* !CONFIG_USER_ONLY */ 949