xref: /openbmc/qemu/accel/tcg/cpu-exec.c (revision cfbc3c6083dbdd0fdd9cc98965182e79431d3c63)
1 /*
2  *  emulator main execution loop
3  *
4  *  Copyright (c) 2003-2005 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "cpu.h"
23 #include "trace.h"
24 #include "disas/disas.h"
25 #include "exec/exec-all.h"
26 #include "tcg.h"
27 #include "qemu/atomic.h"
28 #include "sysemu/qtest.h"
29 #include "qemu/timer.h"
30 #include "qemu/rcu.h"
31 #include "exec/tb-hash.h"
32 #include "exec/tb-lookup.h"
33 #include "exec/log.h"
34 #include "qemu/main-loop.h"
35 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
36 #include "hw/i386/apic.h"
37 #endif
38 #include "sysemu/cpus.h"
39 #include "sysemu/replay.h"
40 
41 /* -icount align implementation. */
42 
43 typedef struct SyncClocks {
44     int64_t diff_clk;
45     int64_t last_cpu_icount;
46     int64_t realtime_clock;
47 } SyncClocks;
48 
49 #if !defined(CONFIG_USER_ONLY)
50 /* Allow the guest to have a max 3ms advance.
51  * The difference between the 2 clocks could therefore
52  * oscillate around 0.
53  */
54 #define VM_CLOCK_ADVANCE 3000000
55 #define THRESHOLD_REDUCE 1.5
56 #define MAX_DELAY_PRINT_RATE 2000000000LL
57 #define MAX_NB_PRINTS 100
58 
59 static void align_clocks(SyncClocks *sc, CPUState *cpu)
60 {
61     int64_t cpu_icount;
62 
63     if (!icount_align_option) {
64         return;
65     }
66 
67     cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
68     sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
69     sc->last_cpu_icount = cpu_icount;
70 
71     if (sc->diff_clk > VM_CLOCK_ADVANCE) {
72 #ifndef _WIN32
73         struct timespec sleep_delay, rem_delay;
74         sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
75         sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
76         if (nanosleep(&sleep_delay, &rem_delay) < 0) {
77             sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
78         } else {
79             sc->diff_clk = 0;
80         }
81 #else
82         Sleep(sc->diff_clk / SCALE_MS);
83         sc->diff_clk = 0;
84 #endif
85     }
86 }
87 
88 static void print_delay(const SyncClocks *sc)
89 {
90     static float threshold_delay;
91     static int64_t last_realtime_clock;
92     static int nb_prints;
93 
94     if (icount_align_option &&
95         sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
96         nb_prints < MAX_NB_PRINTS) {
97         if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
98             (-sc->diff_clk / (float)1000000000LL <
99              (threshold_delay - THRESHOLD_REDUCE))) {
100             threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
101             printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
102                    threshold_delay - 1,
103                    threshold_delay);
104             nb_prints++;
105             last_realtime_clock = sc->realtime_clock;
106         }
107     }
108 }
109 
110 static void init_delay_params(SyncClocks *sc, CPUState *cpu)
111 {
112     if (!icount_align_option) {
113         return;
114     }
115     sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
116     sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
117     sc->last_cpu_icount
118         = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
119     if (sc->diff_clk < max_delay) {
120         max_delay = sc->diff_clk;
121     }
122     if (sc->diff_clk > max_advance) {
123         max_advance = sc->diff_clk;
124     }
125 
126     /* Print every 2s max if the guest is late. We limit the number
127        of printed messages to NB_PRINT_MAX(currently 100) */
128     print_delay(sc);
129 }
130 #else
131 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
132 {
133 }
134 
135 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
136 {
137 }
138 #endif /* CONFIG USER ONLY */
139 
140 /* Execute a TB, and fix up the CPU state afterwards if necessary */
141 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
142 {
143     CPUArchState *env = cpu->env_ptr;
144     uintptr_t ret;
145     TranslationBlock *last_tb;
146     int tb_exit;
147     uint8_t *tb_ptr = itb->tc.ptr;
148 
149     qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
150                            "Trace %d: %p ["
151                            TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
152                            cpu->cpu_index, itb->tc.ptr,
153                            itb->cs_base, itb->pc, itb->flags,
154                            lookup_symbol(itb->pc));
155 
156 #if defined(DEBUG_DISAS)
157     if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
158         && qemu_log_in_addr_range(itb->pc)) {
159         qemu_log_lock();
160         int flags = 0;
161         if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
162             flags |= CPU_DUMP_FPU;
163         }
164 #if defined(TARGET_I386)
165         flags |= CPU_DUMP_CCOP;
166 #endif
167         log_cpu_state(cpu, flags);
168         qemu_log_unlock();
169     }
170 #endif /* DEBUG_DISAS */
171 
172     ret = tcg_qemu_tb_exec(env, tb_ptr);
173     cpu->can_do_io = 1;
174     last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
175     tb_exit = ret & TB_EXIT_MASK;
176     trace_exec_tb_exit(last_tb, tb_exit);
177 
178     if (tb_exit > TB_EXIT_IDX1) {
179         /* We didn't start executing this TB (eg because the instruction
180          * counter hit zero); we must restore the guest PC to the address
181          * of the start of the TB.
182          */
183         CPUClass *cc = CPU_GET_CLASS(cpu);
184         qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
185                                "Stopped execution of TB chain before %p ["
186                                TARGET_FMT_lx "] %s\n",
187                                last_tb->tc.ptr, last_tb->pc,
188                                lookup_symbol(last_tb->pc));
189         if (cc->synchronize_from_tb) {
190             cc->synchronize_from_tb(cpu, last_tb);
191         } else {
192             assert(cc->set_pc);
193             cc->set_pc(cpu, last_tb->pc);
194         }
195     }
196     return ret;
197 }
198 
199 #ifndef CONFIG_USER_ONLY
200 /* Execute the code without caching the generated code. An interpreter
201    could be used if available. */
202 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
203                              TranslationBlock *orig_tb, bool ignore_icount)
204 {
205     TranslationBlock *tb;
206     uint32_t cflags = curr_cflags() | CF_NOCACHE;
207 
208     if (ignore_icount) {
209         cflags &= ~CF_USE_ICOUNT;
210     }
211 
212     /* Should never happen.
213        We only end up here when an existing TB is too long.  */
214     cflags |= MIN(max_cycles, CF_COUNT_MASK);
215 
216     mmap_lock();
217     tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
218                      orig_tb->flags, cflags);
219     tb->orig_tb = orig_tb;
220     mmap_unlock();
221 
222     /* execute the generated code */
223     trace_exec_tb_nocache(tb, tb->pc);
224     cpu_tb_exec(cpu, tb);
225 
226     mmap_lock();
227     tb_phys_invalidate(tb, -1);
228     mmap_unlock();
229     tcg_tb_remove(tb);
230 }
231 #endif
232 
233 void cpu_exec_step_atomic(CPUState *cpu)
234 {
235     CPUClass *cc = CPU_GET_CLASS(cpu);
236     TranslationBlock *tb;
237     target_ulong cs_base, pc;
238     uint32_t flags;
239     uint32_t cflags = 1;
240     uint32_t cf_mask = cflags & CF_HASH_MASK;
241 
242     if (sigsetjmp(cpu->jmp_env, 0) == 0) {
243         tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
244         if (tb == NULL) {
245             mmap_lock();
246             tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
247             mmap_unlock();
248         }
249 
250         start_exclusive();
251 
252         /* Since we got here, we know that parallel_cpus must be true.  */
253         parallel_cpus = false;
254         cc->cpu_exec_enter(cpu);
255         /* execute the generated code */
256         trace_exec_tb(tb, pc);
257         cpu_tb_exec(cpu, tb);
258         cc->cpu_exec_exit(cpu);
259     } else {
260         /*
261          * The mmap_lock is dropped by tb_gen_code if it runs out of
262          * memory.
263          */
264 #ifndef CONFIG_SOFTMMU
265         tcg_debug_assert(!have_mmap_lock());
266 #endif
267         if (qemu_mutex_iothread_locked()) {
268             qemu_mutex_unlock_iothread();
269         }
270         assert_no_pages_locked();
271     }
272 
273     if (cpu_in_exclusive_context(cpu)) {
274         /* We might longjump out of either the codegen or the
275          * execution, so must make sure we only end the exclusive
276          * region if we started it.
277          */
278         parallel_cpus = true;
279         end_exclusive();
280     }
281 }
282 
283 struct tb_desc {
284     target_ulong pc;
285     target_ulong cs_base;
286     CPUArchState *env;
287     tb_page_addr_t phys_page1;
288     uint32_t flags;
289     uint32_t cf_mask;
290     uint32_t trace_vcpu_dstate;
291 };
292 
293 static bool tb_lookup_cmp(const void *p, const void *d)
294 {
295     const TranslationBlock *tb = p;
296     const struct tb_desc *desc = d;
297 
298     if (tb->pc == desc->pc &&
299         tb->page_addr[0] == desc->phys_page1 &&
300         tb->cs_base == desc->cs_base &&
301         tb->flags == desc->flags &&
302         tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
303         (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
304         /* check next page if needed */
305         if (tb->page_addr[1] == -1) {
306             return true;
307         } else {
308             tb_page_addr_t phys_page2;
309             target_ulong virt_page2;
310 
311             virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
312             phys_page2 = get_page_addr_code(desc->env, virt_page2);
313             if (tb->page_addr[1] == phys_page2) {
314                 return true;
315             }
316         }
317     }
318     return false;
319 }
320 
321 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
322                                    target_ulong cs_base, uint32_t flags,
323                                    uint32_t cf_mask)
324 {
325     tb_page_addr_t phys_pc;
326     struct tb_desc desc;
327     uint32_t h;
328 
329     desc.env = (CPUArchState *)cpu->env_ptr;
330     desc.cs_base = cs_base;
331     desc.flags = flags;
332     desc.cf_mask = cf_mask;
333     desc.trace_vcpu_dstate = *cpu->trace_dstate;
334     desc.pc = pc;
335     phys_pc = get_page_addr_code(desc.env, pc);
336     if (phys_pc == -1) {
337         return NULL;
338     }
339     desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
340     h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
341     return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
342 }
343 
344 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
345 {
346     if (TCG_TARGET_HAS_direct_jump) {
347         uintptr_t offset = tb->jmp_target_arg[n];
348         uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
349         tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr);
350     } else {
351         tb->jmp_target_arg[n] = addr;
352     }
353 }
354 
355 static inline void tb_add_jump(TranslationBlock *tb, int n,
356                                TranslationBlock *tb_next)
357 {
358     uintptr_t old;
359 
360     assert(n < ARRAY_SIZE(tb->jmp_list_next));
361     qemu_spin_lock(&tb_next->jmp_lock);
362 
363     /* make sure the destination TB is valid */
364     if (tb_next->cflags & CF_INVALID) {
365         goto out_unlock_next;
366     }
367     /* Atomically claim the jump destination slot only if it was NULL */
368     old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
369     if (old) {
370         goto out_unlock_next;
371     }
372 
373     /* patch the native jump address */
374     tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
375 
376     /* add in TB jmp list */
377     tb->jmp_list_next[n] = tb_next->jmp_list_head;
378     tb_next->jmp_list_head = (uintptr_t)tb | n;
379 
380     qemu_spin_unlock(&tb_next->jmp_lock);
381 
382     qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
383                            "Linking TBs %p [" TARGET_FMT_lx
384                            "] index %d -> %p [" TARGET_FMT_lx "]\n",
385                            tb->tc.ptr, tb->pc, n,
386                            tb_next->tc.ptr, tb_next->pc);
387     return;
388 
389  out_unlock_next:
390     qemu_spin_unlock(&tb_next->jmp_lock);
391     return;
392 }
393 
394 static inline TranslationBlock *tb_find(CPUState *cpu,
395                                         TranslationBlock *last_tb,
396                                         int tb_exit, uint32_t cf_mask)
397 {
398     TranslationBlock *tb;
399     target_ulong cs_base, pc;
400     uint32_t flags;
401 
402     tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
403     if (tb == NULL) {
404         mmap_lock();
405         tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
406         mmap_unlock();
407         /* We add the TB in the virtual pc hash table for the fast lookup */
408         atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
409     }
410 #ifndef CONFIG_USER_ONLY
411     /* We don't take care of direct jumps when address mapping changes in
412      * system emulation. So it's not safe to make a direct jump to a TB
413      * spanning two pages because the mapping for the second page can change.
414      */
415     if (tb->page_addr[1] != -1) {
416         last_tb = NULL;
417     }
418 #endif
419     /* See if we can patch the calling TB. */
420     if (last_tb) {
421         tb_add_jump(last_tb, tb_exit, tb);
422     }
423     return tb;
424 }
425 
426 static inline bool cpu_handle_halt(CPUState *cpu)
427 {
428     if (cpu->halted) {
429 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
430         if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
431             && replay_interrupt()) {
432             X86CPU *x86_cpu = X86_CPU(cpu);
433             qemu_mutex_lock_iothread();
434             apic_poll_irq(x86_cpu->apic_state);
435             cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
436             qemu_mutex_unlock_iothread();
437         }
438 #endif
439         if (!cpu_has_work(cpu)) {
440             return true;
441         }
442 
443         cpu->halted = 0;
444     }
445 
446     return false;
447 }
448 
449 static inline void cpu_handle_debug_exception(CPUState *cpu)
450 {
451     CPUClass *cc = CPU_GET_CLASS(cpu);
452     CPUWatchpoint *wp;
453 
454     if (!cpu->watchpoint_hit) {
455         QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
456             wp->flags &= ~BP_WATCHPOINT_HIT;
457         }
458     }
459 
460     cc->debug_excp_handler(cpu);
461 }
462 
463 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
464 {
465     if (cpu->exception_index < 0) {
466 #ifndef CONFIG_USER_ONLY
467         if (replay_has_exception()
468             && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
469             /* try to cause an exception pending in the log */
470             cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true);
471         }
472 #endif
473         if (cpu->exception_index < 0) {
474             return false;
475         }
476     }
477 
478     if (cpu->exception_index >= EXCP_INTERRUPT) {
479         /* exit request from the cpu execution loop */
480         *ret = cpu->exception_index;
481         if (*ret == EXCP_DEBUG) {
482             cpu_handle_debug_exception(cpu);
483         }
484         cpu->exception_index = -1;
485         return true;
486     } else {
487 #if defined(CONFIG_USER_ONLY)
488         /* if user mode only, we simulate a fake exception
489            which will be handled outside the cpu execution
490            loop */
491 #if defined(TARGET_I386)
492         CPUClass *cc = CPU_GET_CLASS(cpu);
493         cc->do_interrupt(cpu);
494 #endif
495         *ret = cpu->exception_index;
496         cpu->exception_index = -1;
497         return true;
498 #else
499         if (replay_exception()) {
500             CPUClass *cc = CPU_GET_CLASS(cpu);
501             qemu_mutex_lock_iothread();
502             cc->do_interrupt(cpu);
503             qemu_mutex_unlock_iothread();
504             cpu->exception_index = -1;
505         } else if (!replay_has_interrupt()) {
506             /* give a chance to iothread in replay mode */
507             *ret = EXCP_INTERRUPT;
508             return true;
509         }
510 #endif
511     }
512 
513     return false;
514 }
515 
516 static inline bool cpu_handle_interrupt(CPUState *cpu,
517                                         TranslationBlock **last_tb)
518 {
519     CPUClass *cc = CPU_GET_CLASS(cpu);
520 
521     /* Clear the interrupt flag now since we're processing
522      * cpu->interrupt_request and cpu->exit_request.
523      * Ensure zeroing happens before reading cpu->exit_request or
524      * cpu->interrupt_request (see also smp_wmb in cpu_exit())
525      */
526     atomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
527 
528     if (unlikely(atomic_read(&cpu->interrupt_request))) {
529         int interrupt_request;
530         qemu_mutex_lock_iothread();
531         interrupt_request = cpu->interrupt_request;
532         if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
533             /* Mask out external interrupts for this step. */
534             interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
535         }
536         if (interrupt_request & CPU_INTERRUPT_DEBUG) {
537             cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
538             cpu->exception_index = EXCP_DEBUG;
539             qemu_mutex_unlock_iothread();
540             return true;
541         }
542         if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
543             /* Do nothing */
544         } else if (interrupt_request & CPU_INTERRUPT_HALT) {
545             replay_interrupt();
546             cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
547             cpu->halted = 1;
548             cpu->exception_index = EXCP_HLT;
549             qemu_mutex_unlock_iothread();
550             return true;
551         }
552 #if defined(TARGET_I386)
553         else if (interrupt_request & CPU_INTERRUPT_INIT) {
554             X86CPU *x86_cpu = X86_CPU(cpu);
555             CPUArchState *env = &x86_cpu->env;
556             replay_interrupt();
557             cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
558             do_cpu_init(x86_cpu);
559             cpu->exception_index = EXCP_HALTED;
560             qemu_mutex_unlock_iothread();
561             return true;
562         }
563 #else
564         else if (interrupt_request & CPU_INTERRUPT_RESET) {
565             replay_interrupt();
566             cpu_reset(cpu);
567             qemu_mutex_unlock_iothread();
568             return true;
569         }
570 #endif
571         /* The target hook has 3 exit conditions:
572            False when the interrupt isn't processed,
573            True when it is, and we should restart on a new TB,
574            and via longjmp via cpu_loop_exit.  */
575         else {
576             if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
577                 replay_interrupt();
578                 cpu->exception_index = -1;
579                 *last_tb = NULL;
580             }
581             /* The target hook may have updated the 'cpu->interrupt_request';
582              * reload the 'interrupt_request' value */
583             interrupt_request = cpu->interrupt_request;
584         }
585         if (interrupt_request & CPU_INTERRUPT_EXITTB) {
586             cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
587             /* ensure that no TB jump will be modified as
588                the program flow was changed */
589             *last_tb = NULL;
590         }
591 
592         /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
593         qemu_mutex_unlock_iothread();
594     }
595 
596     /* Finally, check if we need to exit to the main loop.  */
597     if (unlikely(atomic_read(&cpu->exit_request))
598         || (use_icount
599             && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
600         atomic_set(&cpu->exit_request, 0);
601         if (cpu->exception_index == -1) {
602             cpu->exception_index = EXCP_INTERRUPT;
603         }
604         return true;
605     }
606 
607     return false;
608 }
609 
610 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
611                                     TranslationBlock **last_tb, int *tb_exit)
612 {
613     uintptr_t ret;
614     int32_t insns_left;
615 
616     trace_exec_tb(tb, tb->pc);
617     ret = cpu_tb_exec(cpu, tb);
618     tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
619     *tb_exit = ret & TB_EXIT_MASK;
620     if (*tb_exit != TB_EXIT_REQUESTED) {
621         *last_tb = tb;
622         return;
623     }
624 
625     *last_tb = NULL;
626     insns_left = atomic_read(&cpu_neg(cpu)->icount_decr.u32);
627     if (insns_left < 0) {
628         /* Something asked us to stop executing chained TBs; just
629          * continue round the main loop. Whatever requested the exit
630          * will also have set something else (eg exit_request or
631          * interrupt_request) which will be handled by
632          * cpu_handle_interrupt.  cpu_handle_interrupt will also
633          * clear cpu->icount_decr.u16.high.
634          */
635         return;
636     }
637 
638     /* Instruction counter expired.  */
639     assert(use_icount);
640 #ifndef CONFIG_USER_ONLY
641     /* Ensure global icount has gone forward */
642     cpu_update_icount(cpu);
643     /* Refill decrementer and continue execution.  */
644     insns_left = MIN(0xffff, cpu->icount_budget);
645     cpu_neg(cpu)->icount_decr.u16.low = insns_left;
646     cpu->icount_extra = cpu->icount_budget - insns_left;
647     if (!cpu->icount_extra) {
648         /* Execute any remaining instructions, then let the main loop
649          * handle the next event.
650          */
651         if (insns_left > 0) {
652             cpu_exec_nocache(cpu, insns_left, tb, false);
653         }
654     }
655 #endif
656 }
657 
658 /* main execution loop */
659 
660 int cpu_exec(CPUState *cpu)
661 {
662     CPUClass *cc = CPU_GET_CLASS(cpu);
663     int ret;
664     SyncClocks sc = { 0 };
665 
666     /* replay_interrupt may need current_cpu */
667     current_cpu = cpu;
668 
669     if (cpu_handle_halt(cpu)) {
670         return EXCP_HALTED;
671     }
672 
673     rcu_read_lock();
674 
675     cc->cpu_exec_enter(cpu);
676 
677     /* Calculate difference between guest clock and host clock.
678      * This delay includes the delay of the last cycle, so
679      * what we have to do is sleep until it is 0. As for the
680      * advance/delay we gain here, we try to fix it next time.
681      */
682     init_delay_params(&sc, cpu);
683 
684     /* prepare setjmp context for exception handling */
685     if (sigsetjmp(cpu->jmp_env, 0) != 0) {
686 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
687         /* Some compilers wrongly smash all local variables after
688          * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
689          * Reload essential local variables here for those compilers.
690          * Newer versions of gcc would complain about this code (-Wclobbered). */
691         cpu = current_cpu;
692         cc = CPU_GET_CLASS(cpu);
693 #else /* buggy compiler */
694         /* Assert that the compiler does not smash local variables. */
695         g_assert(cpu == current_cpu);
696         g_assert(cc == CPU_GET_CLASS(cpu));
697 #endif /* buggy compiler */
698 #ifndef CONFIG_SOFTMMU
699         tcg_debug_assert(!have_mmap_lock());
700 #endif
701         if (qemu_mutex_iothread_locked()) {
702             qemu_mutex_unlock_iothread();
703         }
704         assert_no_pages_locked();
705     }
706 
707     /* if an exception is pending, we execute it here */
708     while (!cpu_handle_exception(cpu, &ret)) {
709         TranslationBlock *last_tb = NULL;
710         int tb_exit = 0;
711 
712         while (!cpu_handle_interrupt(cpu, &last_tb)) {
713             uint32_t cflags = cpu->cflags_next_tb;
714             TranslationBlock *tb;
715 
716             /* When requested, use an exact setting for cflags for the next
717                execution.  This is used for icount, precise smc, and stop-
718                after-access watchpoints.  Since this request should never
719                have CF_INVALID set, -1 is a convenient invalid value that
720                does not require tcg headers for cpu_common_reset.  */
721             if (cflags == -1) {
722                 cflags = curr_cflags();
723             } else {
724                 cpu->cflags_next_tb = -1;
725             }
726 
727             tb = tb_find(cpu, last_tb, tb_exit, cflags);
728             cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
729             /* Try to align the host and virtual clocks
730                if the guest is in advance */
731             align_clocks(&sc, cpu);
732         }
733     }
734 
735     cc->cpu_exec_exit(cpu);
736     rcu_read_unlock();
737 
738     return ret;
739 }
740