1 /* 2 * emulator main execution loop 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu-common.h" 22 #include "qemu/qemu-print.h" 23 #include "cpu.h" 24 #include "hw/core/tcg-cpu-ops.h" 25 #include "trace.h" 26 #include "disas/disas.h" 27 #include "exec/exec-all.h" 28 #include "tcg/tcg.h" 29 #include "qemu/atomic.h" 30 #include "qemu/compiler.h" 31 #include "sysemu/qtest.h" 32 #include "qemu/timer.h" 33 #include "qemu/rcu.h" 34 #include "exec/tb-hash.h" 35 #include "exec/tb-lookup.h" 36 #include "exec/log.h" 37 #include "qemu/main-loop.h" 38 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 39 #include "hw/i386/apic.h" 40 #endif 41 #include "sysemu/cpus.h" 42 #include "exec/cpu-all.h" 43 #include "sysemu/cpu-timers.h" 44 #include "sysemu/replay.h" 45 #include "internal.h" 46 47 /* -icount align implementation. */ 48 49 typedef struct SyncClocks { 50 int64_t diff_clk; 51 int64_t last_cpu_icount; 52 int64_t realtime_clock; 53 } SyncClocks; 54 55 #if !defined(CONFIG_USER_ONLY) 56 /* Allow the guest to have a max 3ms advance. 57 * The difference between the 2 clocks could therefore 58 * oscillate around 0. 59 */ 60 #define VM_CLOCK_ADVANCE 3000000 61 #define THRESHOLD_REDUCE 1.5 62 #define MAX_DELAY_PRINT_RATE 2000000000LL 63 #define MAX_NB_PRINTS 100 64 65 static int64_t max_delay; 66 static int64_t max_advance; 67 68 static void align_clocks(SyncClocks *sc, CPUState *cpu) 69 { 70 int64_t cpu_icount; 71 72 if (!icount_align_option) { 73 return; 74 } 75 76 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low; 77 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount); 78 sc->last_cpu_icount = cpu_icount; 79 80 if (sc->diff_clk > VM_CLOCK_ADVANCE) { 81 #ifndef _WIN32 82 struct timespec sleep_delay, rem_delay; 83 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; 84 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; 85 if (nanosleep(&sleep_delay, &rem_delay) < 0) { 86 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; 87 } else { 88 sc->diff_clk = 0; 89 } 90 #else 91 Sleep(sc->diff_clk / SCALE_MS); 92 sc->diff_clk = 0; 93 #endif 94 } 95 } 96 97 static void print_delay(const SyncClocks *sc) 98 { 99 static float threshold_delay; 100 static int64_t last_realtime_clock; 101 static int nb_prints; 102 103 if (icount_align_option && 104 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && 105 nb_prints < MAX_NB_PRINTS) { 106 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || 107 (-sc->diff_clk / (float)1000000000LL < 108 (threshold_delay - THRESHOLD_REDUCE))) { 109 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; 110 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n", 111 threshold_delay - 1, 112 threshold_delay); 113 nb_prints++; 114 last_realtime_clock = sc->realtime_clock; 115 } 116 } 117 } 118 119 static void init_delay_params(SyncClocks *sc, CPUState *cpu) 120 { 121 if (!icount_align_option) { 122 return; 123 } 124 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); 125 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; 126 sc->last_cpu_icount 127 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low; 128 if (sc->diff_clk < max_delay) { 129 max_delay = sc->diff_clk; 130 } 131 if (sc->diff_clk > max_advance) { 132 max_advance = sc->diff_clk; 133 } 134 135 /* Print every 2s max if the guest is late. We limit the number 136 of printed messages to NB_PRINT_MAX(currently 100) */ 137 print_delay(sc); 138 } 139 #else 140 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 141 { 142 } 143 144 static void init_delay_params(SyncClocks *sc, const CPUState *cpu) 145 { 146 } 147 #endif /* CONFIG USER ONLY */ 148 149 /* Execute a TB, and fix up the CPU state afterwards if necessary */ 150 /* 151 * Disable CFI checks. 152 * TCG creates binary blobs at runtime, with the transformed code. 153 * A TB is a blob of binary code, created at runtime and called with an 154 * indirect function call. Since such function did not exist at compile time, 155 * the CFI runtime has no way to verify its signature and would fail. 156 * TCG is not considered a security-sensitive part of QEMU so this does not 157 * affect the impact of CFI in environment with high security requirements 158 */ 159 static inline TranslationBlock * QEMU_DISABLE_CFI 160 cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit) 161 { 162 CPUArchState *env = cpu->env_ptr; 163 uintptr_t ret; 164 TranslationBlock *last_tb; 165 const void *tb_ptr = itb->tc.ptr; 166 167 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, 168 "Trace %d: %p [" 169 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n", 170 cpu->cpu_index, itb->tc.ptr, 171 itb->cs_base, itb->pc, itb->flags, 172 lookup_symbol(itb->pc)); 173 174 #if defined(DEBUG_DISAS) 175 if (qemu_loglevel_mask(CPU_LOG_TB_CPU) 176 && qemu_log_in_addr_range(itb->pc)) { 177 FILE *logfile = qemu_log_lock(); 178 int flags = 0; 179 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { 180 flags |= CPU_DUMP_FPU; 181 } 182 #if defined(TARGET_I386) 183 flags |= CPU_DUMP_CCOP; 184 #endif 185 log_cpu_state(cpu, flags); 186 qemu_log_unlock(logfile); 187 } 188 #endif /* DEBUG_DISAS */ 189 190 qemu_thread_jit_execute(); 191 ret = tcg_qemu_tb_exec(env, tb_ptr); 192 cpu->can_do_io = 1; 193 /* 194 * TODO: Delay swapping back to the read-write region of the TB 195 * until we actually need to modify the TB. The read-only copy, 196 * coming from the rx region, shares the same host TLB entry as 197 * the code that executed the exit_tb opcode that arrived here. 198 * If we insist on touching both the RX and the RW pages, we 199 * double the host TLB pressure. 200 */ 201 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK)); 202 *tb_exit = ret & TB_EXIT_MASK; 203 204 trace_exec_tb_exit(last_tb, *tb_exit); 205 206 if (*tb_exit > TB_EXIT_IDX1) { 207 /* We didn't start executing this TB (eg because the instruction 208 * counter hit zero); we must restore the guest PC to the address 209 * of the start of the TB. 210 */ 211 CPUClass *cc = CPU_GET_CLASS(cpu); 212 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, 213 "Stopped execution of TB chain before %p [" 214 TARGET_FMT_lx "] %s\n", 215 last_tb->tc.ptr, last_tb->pc, 216 lookup_symbol(last_tb->pc)); 217 if (cc->tcg_ops->synchronize_from_tb) { 218 cc->tcg_ops->synchronize_from_tb(cpu, last_tb); 219 } else { 220 assert(cc->set_pc); 221 cc->set_pc(cpu, last_tb->pc); 222 } 223 } 224 return last_tb; 225 } 226 227 228 static void cpu_exec_enter(CPUState *cpu) 229 { 230 CPUClass *cc = CPU_GET_CLASS(cpu); 231 232 if (cc->tcg_ops->cpu_exec_enter) { 233 cc->tcg_ops->cpu_exec_enter(cpu); 234 } 235 } 236 237 static void cpu_exec_exit(CPUState *cpu) 238 { 239 CPUClass *cc = CPU_GET_CLASS(cpu); 240 241 if (cc->tcg_ops->cpu_exec_exit) { 242 cc->tcg_ops->cpu_exec_exit(cpu); 243 } 244 } 245 246 void cpu_exec_step_atomic(CPUState *cpu) 247 { 248 CPUArchState *env = (CPUArchState *)cpu->env_ptr; 249 TranslationBlock *tb; 250 target_ulong cs_base, pc; 251 uint32_t flags; 252 uint32_t cflags = (curr_cflags(cpu) & ~CF_PARALLEL) | 1; 253 int tb_exit; 254 255 if (sigsetjmp(cpu->jmp_env, 0) == 0) { 256 start_exclusive(); 257 g_assert(cpu == current_cpu); 258 g_assert(!cpu->running); 259 cpu->running = true; 260 261 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 262 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); 263 264 if (tb == NULL) { 265 mmap_lock(); 266 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 267 mmap_unlock(); 268 } 269 270 cpu_exec_enter(cpu); 271 /* execute the generated code */ 272 trace_exec_tb(tb, pc); 273 cpu_tb_exec(cpu, tb, &tb_exit); 274 cpu_exec_exit(cpu); 275 } else { 276 /* 277 * The mmap_lock is dropped by tb_gen_code if it runs out of 278 * memory. 279 */ 280 #ifndef CONFIG_SOFTMMU 281 tcg_debug_assert(!have_mmap_lock()); 282 #endif 283 if (qemu_mutex_iothread_locked()) { 284 qemu_mutex_unlock_iothread(); 285 } 286 assert_no_pages_locked(); 287 qemu_plugin_disable_mem_helpers(cpu); 288 } 289 290 291 /* 292 * As we start the exclusive region before codegen we must still 293 * be in the region if we longjump out of either the codegen or 294 * the execution. 295 */ 296 g_assert(cpu_in_exclusive_context(cpu)); 297 cpu->running = false; 298 end_exclusive(); 299 } 300 301 struct tb_desc { 302 target_ulong pc; 303 target_ulong cs_base; 304 CPUArchState *env; 305 tb_page_addr_t phys_page1; 306 uint32_t flags; 307 uint32_t cflags; 308 uint32_t trace_vcpu_dstate; 309 }; 310 311 static bool tb_lookup_cmp(const void *p, const void *d) 312 { 313 const TranslationBlock *tb = p; 314 const struct tb_desc *desc = d; 315 316 if (tb->pc == desc->pc && 317 tb->page_addr[0] == desc->phys_page1 && 318 tb->cs_base == desc->cs_base && 319 tb->flags == desc->flags && 320 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && 321 tb_cflags(tb) == desc->cflags) { 322 /* check next page if needed */ 323 if (tb->page_addr[1] == -1) { 324 return true; 325 } else { 326 tb_page_addr_t phys_page2; 327 target_ulong virt_page2; 328 329 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 330 phys_page2 = get_page_addr_code(desc->env, virt_page2); 331 if (tb->page_addr[1] == phys_page2) { 332 return true; 333 } 334 } 335 } 336 return false; 337 } 338 339 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, 340 target_ulong cs_base, uint32_t flags, 341 uint32_t cflags) 342 { 343 tb_page_addr_t phys_pc; 344 struct tb_desc desc; 345 uint32_t h; 346 347 desc.env = (CPUArchState *)cpu->env_ptr; 348 desc.cs_base = cs_base; 349 desc.flags = flags; 350 desc.cflags = cflags; 351 desc.trace_vcpu_dstate = *cpu->trace_dstate; 352 desc.pc = pc; 353 phys_pc = get_page_addr_code(desc.env, pc); 354 if (phys_pc == -1) { 355 return NULL; 356 } 357 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; 358 h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); 359 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); 360 } 361 362 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) 363 { 364 if (TCG_TARGET_HAS_direct_jump) { 365 uintptr_t offset = tb->jmp_target_arg[n]; 366 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; 367 uintptr_t jmp_rx = tc_ptr + offset; 368 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff; 369 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr); 370 } else { 371 tb->jmp_target_arg[n] = addr; 372 } 373 } 374 375 static inline void tb_add_jump(TranslationBlock *tb, int n, 376 TranslationBlock *tb_next) 377 { 378 uintptr_t old; 379 380 qemu_thread_jit_write(); 381 assert(n < ARRAY_SIZE(tb->jmp_list_next)); 382 qemu_spin_lock(&tb_next->jmp_lock); 383 384 /* make sure the destination TB is valid */ 385 if (tb_next->cflags & CF_INVALID) { 386 goto out_unlock_next; 387 } 388 /* Atomically claim the jump destination slot only if it was NULL */ 389 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, 390 (uintptr_t)tb_next); 391 if (old) { 392 goto out_unlock_next; 393 } 394 395 /* patch the native jump address */ 396 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); 397 398 /* add in TB jmp list */ 399 tb->jmp_list_next[n] = tb_next->jmp_list_head; 400 tb_next->jmp_list_head = (uintptr_t)tb | n; 401 402 qemu_spin_unlock(&tb_next->jmp_lock); 403 404 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, 405 "Linking TBs %p [" TARGET_FMT_lx 406 "] index %d -> %p [" TARGET_FMT_lx "]\n", 407 tb->tc.ptr, tb->pc, n, 408 tb_next->tc.ptr, tb_next->pc); 409 return; 410 411 out_unlock_next: 412 qemu_spin_unlock(&tb_next->jmp_lock); 413 return; 414 } 415 416 static inline TranslationBlock *tb_find(CPUState *cpu, 417 TranslationBlock *last_tb, 418 int tb_exit, uint32_t cflags) 419 { 420 CPUArchState *env = (CPUArchState *)cpu->env_ptr; 421 TranslationBlock *tb; 422 target_ulong cs_base, pc; 423 uint32_t flags; 424 425 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); 426 427 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); 428 if (tb == NULL) { 429 mmap_lock(); 430 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 431 mmap_unlock(); 432 /* We add the TB in the virtual pc hash table for the fast lookup */ 433 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); 434 } 435 #ifndef CONFIG_USER_ONLY 436 /* We don't take care of direct jumps when address mapping changes in 437 * system emulation. So it's not safe to make a direct jump to a TB 438 * spanning two pages because the mapping for the second page can change. 439 */ 440 if (tb->page_addr[1] != -1) { 441 last_tb = NULL; 442 } 443 #endif 444 /* See if we can patch the calling TB. */ 445 if (last_tb) { 446 tb_add_jump(last_tb, tb_exit, tb); 447 } 448 return tb; 449 } 450 451 static inline bool cpu_handle_halt(CPUState *cpu) 452 { 453 if (cpu->halted) { 454 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 455 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { 456 X86CPU *x86_cpu = X86_CPU(cpu); 457 qemu_mutex_lock_iothread(); 458 apic_poll_irq(x86_cpu->apic_state); 459 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); 460 qemu_mutex_unlock_iothread(); 461 } 462 #endif 463 if (!cpu_has_work(cpu)) { 464 return true; 465 } 466 467 cpu->halted = 0; 468 } 469 470 return false; 471 } 472 473 static inline void cpu_handle_debug_exception(CPUState *cpu) 474 { 475 CPUClass *cc = CPU_GET_CLASS(cpu); 476 CPUWatchpoint *wp; 477 478 if (!cpu->watchpoint_hit) { 479 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 480 wp->flags &= ~BP_WATCHPOINT_HIT; 481 } 482 } 483 484 if (cc->tcg_ops->debug_excp_handler) { 485 cc->tcg_ops->debug_excp_handler(cpu); 486 } 487 } 488 489 static inline bool cpu_handle_exception(CPUState *cpu, int *ret) 490 { 491 if (cpu->exception_index < 0) { 492 #ifndef CONFIG_USER_ONLY 493 if (replay_has_exception() 494 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) { 495 /* Execute just one insn to trigger exception pending in the log */ 496 cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1; 497 } 498 #endif 499 return false; 500 } 501 if (cpu->exception_index >= EXCP_INTERRUPT) { 502 /* exit request from the cpu execution loop */ 503 *ret = cpu->exception_index; 504 if (*ret == EXCP_DEBUG) { 505 cpu_handle_debug_exception(cpu); 506 } 507 cpu->exception_index = -1; 508 return true; 509 } else { 510 #if defined(CONFIG_USER_ONLY) 511 /* if user mode only, we simulate a fake exception 512 which will be handled outside the cpu execution 513 loop */ 514 #if defined(TARGET_I386) 515 CPUClass *cc = CPU_GET_CLASS(cpu); 516 cc->tcg_ops->do_interrupt(cpu); 517 #endif 518 *ret = cpu->exception_index; 519 cpu->exception_index = -1; 520 return true; 521 #else 522 if (replay_exception()) { 523 CPUClass *cc = CPU_GET_CLASS(cpu); 524 qemu_mutex_lock_iothread(); 525 cc->tcg_ops->do_interrupt(cpu); 526 qemu_mutex_unlock_iothread(); 527 cpu->exception_index = -1; 528 529 if (unlikely(cpu->singlestep_enabled)) { 530 /* 531 * After processing the exception, ensure an EXCP_DEBUG is 532 * raised when single-stepping so that GDB doesn't miss the 533 * next instruction. 534 */ 535 *ret = EXCP_DEBUG; 536 cpu_handle_debug_exception(cpu); 537 return true; 538 } 539 } else if (!replay_has_interrupt()) { 540 /* give a chance to iothread in replay mode */ 541 *ret = EXCP_INTERRUPT; 542 return true; 543 } 544 #endif 545 } 546 547 return false; 548 } 549 550 /* 551 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a 552 * "real" interrupt event later. It does not need to be recorded for 553 * replay purposes. 554 */ 555 static inline bool need_replay_interrupt(int interrupt_request) 556 { 557 #if defined(TARGET_I386) 558 return !(interrupt_request & CPU_INTERRUPT_POLL); 559 #else 560 return true; 561 #endif 562 } 563 564 static inline bool cpu_handle_interrupt(CPUState *cpu, 565 TranslationBlock **last_tb) 566 { 567 CPUClass *cc = CPU_GET_CLASS(cpu); 568 569 /* Clear the interrupt flag now since we're processing 570 * cpu->interrupt_request and cpu->exit_request. 571 * Ensure zeroing happens before reading cpu->exit_request or 572 * cpu->interrupt_request (see also smp_wmb in cpu_exit()) 573 */ 574 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0); 575 576 if (unlikely(qatomic_read(&cpu->interrupt_request))) { 577 int interrupt_request; 578 qemu_mutex_lock_iothread(); 579 interrupt_request = cpu->interrupt_request; 580 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { 581 /* Mask out external interrupts for this step. */ 582 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; 583 } 584 if (interrupt_request & CPU_INTERRUPT_DEBUG) { 585 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; 586 cpu->exception_index = EXCP_DEBUG; 587 qemu_mutex_unlock_iothread(); 588 return true; 589 } 590 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { 591 /* Do nothing */ 592 } else if (interrupt_request & CPU_INTERRUPT_HALT) { 593 replay_interrupt(); 594 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; 595 cpu->halted = 1; 596 cpu->exception_index = EXCP_HLT; 597 qemu_mutex_unlock_iothread(); 598 return true; 599 } 600 #if defined(TARGET_I386) 601 else if (interrupt_request & CPU_INTERRUPT_INIT) { 602 X86CPU *x86_cpu = X86_CPU(cpu); 603 CPUArchState *env = &x86_cpu->env; 604 replay_interrupt(); 605 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); 606 do_cpu_init(x86_cpu); 607 cpu->exception_index = EXCP_HALTED; 608 qemu_mutex_unlock_iothread(); 609 return true; 610 } 611 #else 612 else if (interrupt_request & CPU_INTERRUPT_RESET) { 613 replay_interrupt(); 614 cpu_reset(cpu); 615 qemu_mutex_unlock_iothread(); 616 return true; 617 } 618 #endif 619 /* The target hook has 3 exit conditions: 620 False when the interrupt isn't processed, 621 True when it is, and we should restart on a new TB, 622 and via longjmp via cpu_loop_exit. */ 623 else { 624 if (cc->tcg_ops->cpu_exec_interrupt && 625 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { 626 if (need_replay_interrupt(interrupt_request)) { 627 replay_interrupt(); 628 } 629 /* 630 * After processing the interrupt, ensure an EXCP_DEBUG is 631 * raised when single-stepping so that GDB doesn't miss the 632 * next instruction. 633 */ 634 cpu->exception_index = 635 (cpu->singlestep_enabled ? EXCP_DEBUG : -1); 636 *last_tb = NULL; 637 } 638 /* The target hook may have updated the 'cpu->interrupt_request'; 639 * reload the 'interrupt_request' value */ 640 interrupt_request = cpu->interrupt_request; 641 } 642 if (interrupt_request & CPU_INTERRUPT_EXITTB) { 643 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; 644 /* ensure that no TB jump will be modified as 645 the program flow was changed */ 646 *last_tb = NULL; 647 } 648 649 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ 650 qemu_mutex_unlock_iothread(); 651 } 652 653 /* Finally, check if we need to exit to the main loop. */ 654 if (unlikely(qatomic_read(&cpu->exit_request)) 655 || (icount_enabled() 656 && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT) 657 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) { 658 qatomic_set(&cpu->exit_request, 0); 659 if (cpu->exception_index == -1) { 660 cpu->exception_index = EXCP_INTERRUPT; 661 } 662 return true; 663 } 664 665 return false; 666 } 667 668 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, 669 TranslationBlock **last_tb, int *tb_exit) 670 { 671 int32_t insns_left; 672 673 trace_exec_tb(tb, tb->pc); 674 tb = cpu_tb_exec(cpu, tb, tb_exit); 675 if (*tb_exit != TB_EXIT_REQUESTED) { 676 *last_tb = tb; 677 return; 678 } 679 680 *last_tb = NULL; 681 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32); 682 if (insns_left < 0) { 683 /* Something asked us to stop executing chained TBs; just 684 * continue round the main loop. Whatever requested the exit 685 * will also have set something else (eg exit_request or 686 * interrupt_request) which will be handled by 687 * cpu_handle_interrupt. cpu_handle_interrupt will also 688 * clear cpu->icount_decr.u16.high. 689 */ 690 return; 691 } 692 693 /* Instruction counter expired. */ 694 assert(icount_enabled()); 695 #ifndef CONFIG_USER_ONLY 696 /* Ensure global icount has gone forward */ 697 icount_update(cpu); 698 /* Refill decrementer and continue execution. */ 699 insns_left = MIN(CF_COUNT_MASK, cpu->icount_budget); 700 cpu_neg(cpu)->icount_decr.u16.low = insns_left; 701 cpu->icount_extra = cpu->icount_budget - insns_left; 702 703 /* 704 * If the next tb has more instructions than we have left to 705 * execute we need to ensure we find/generate a TB with exactly 706 * insns_left instructions in it. 707 */ 708 if (!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount) { 709 cpu->cflags_next_tb = (tb->cflags & ~CF_COUNT_MASK) | insns_left; 710 } 711 #endif 712 } 713 714 /* main execution loop */ 715 716 int cpu_exec(CPUState *cpu) 717 { 718 CPUClass *cc = CPU_GET_CLASS(cpu); 719 int ret; 720 SyncClocks sc = { 0 }; 721 722 /* replay_interrupt may need current_cpu */ 723 current_cpu = cpu; 724 725 if (cpu_handle_halt(cpu)) { 726 return EXCP_HALTED; 727 } 728 729 rcu_read_lock(); 730 731 cpu_exec_enter(cpu); 732 733 /* Calculate difference between guest clock and host clock. 734 * This delay includes the delay of the last cycle, so 735 * what we have to do is sleep until it is 0. As for the 736 * advance/delay we gain here, we try to fix it next time. 737 */ 738 init_delay_params(&sc, cpu); 739 740 /* prepare setjmp context for exception handling */ 741 if (sigsetjmp(cpu->jmp_env, 0) != 0) { 742 #if defined(__clang__) 743 /* 744 * Some compilers wrongly smash all local variables after 745 * siglongjmp (the spec requires that only non-volatile locals 746 * which are changed between the sigsetjmp and siglongjmp are 747 * permitted to be trashed). There were bug reports for gcc 748 * 4.5.0 and clang. The bug is fixed in all versions of gcc 749 * that we support, but is still unfixed in clang: 750 * https://bugs.llvm.org/show_bug.cgi?id=21183 751 * 752 * Reload essential local variables here for those compilers. 753 * Newer versions of gcc would complain about this code (-Wclobbered), 754 * so we only perform the workaround for clang. 755 */ 756 cpu = current_cpu; 757 cc = CPU_GET_CLASS(cpu); 758 #else 759 /* 760 * Non-buggy compilers preserve these locals; assert that 761 * they have the correct value. 762 */ 763 g_assert(cpu == current_cpu); 764 g_assert(cc == CPU_GET_CLASS(cpu)); 765 #endif 766 767 #ifndef CONFIG_SOFTMMU 768 tcg_debug_assert(!have_mmap_lock()); 769 #endif 770 if (qemu_mutex_iothread_locked()) { 771 qemu_mutex_unlock_iothread(); 772 } 773 qemu_plugin_disable_mem_helpers(cpu); 774 775 assert_no_pages_locked(); 776 } 777 778 /* if an exception is pending, we execute it here */ 779 while (!cpu_handle_exception(cpu, &ret)) { 780 TranslationBlock *last_tb = NULL; 781 int tb_exit = 0; 782 783 while (!cpu_handle_interrupt(cpu, &last_tb)) { 784 uint32_t cflags = cpu->cflags_next_tb; 785 TranslationBlock *tb; 786 787 /* When requested, use an exact setting for cflags for the next 788 execution. This is used for icount, precise smc, and stop- 789 after-access watchpoints. Since this request should never 790 have CF_INVALID set, -1 is a convenient invalid value that 791 does not require tcg headers for cpu_common_reset. */ 792 if (cflags == -1) { 793 cflags = curr_cflags(cpu); 794 } else { 795 cpu->cflags_next_tb = -1; 796 } 797 798 tb = tb_find(cpu, last_tb, tb_exit, cflags); 799 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); 800 /* Try to align the host and virtual clocks 801 if the guest is in advance */ 802 align_clocks(&sc, cpu); 803 } 804 } 805 806 cpu_exec_exit(cpu); 807 rcu_read_unlock(); 808 809 return ret; 810 } 811 812 void tcg_exec_realizefn(CPUState *cpu, Error **errp) 813 { 814 static bool tcg_target_initialized; 815 CPUClass *cc = CPU_GET_CLASS(cpu); 816 817 if (!tcg_target_initialized) { 818 cc->tcg_ops->initialize(); 819 tcg_target_initialized = true; 820 } 821 tlb_init(cpu); 822 qemu_plugin_vcpu_init_hook(cpu); 823 824 #ifndef CONFIG_USER_ONLY 825 tcg_iommu_init_notifier_list(cpu); 826 #endif /* !CONFIG_USER_ONLY */ 827 } 828 829 /* undo the initializations in reverse order */ 830 void tcg_exec_unrealizefn(CPUState *cpu) 831 { 832 #ifndef CONFIG_USER_ONLY 833 tcg_iommu_free_notifier_list(cpu); 834 #endif /* !CONFIG_USER_ONLY */ 835 836 qemu_plugin_vcpu_exit_hook(cpu); 837 tlb_destroy(cpu); 838 } 839 840 #ifndef CONFIG_USER_ONLY 841 842 void dump_drift_info(void) 843 { 844 if (!icount_enabled()) { 845 return; 846 } 847 848 qemu_printf("Host - Guest clock %"PRIi64" ms\n", 849 (cpu_get_clock() - icount_get()) / SCALE_MS); 850 if (icount_align_option) { 851 qemu_printf("Max guest delay %"PRIi64" ms\n", 852 -max_delay / SCALE_MS); 853 qemu_printf("Max guest advance %"PRIi64" ms\n", 854 max_advance / SCALE_MS); 855 } else { 856 qemu_printf("Max guest delay NA\n"); 857 qemu_printf("Max guest advance NA\n"); 858 } 859 } 860 861 #endif /* !CONFIG_USER_ONLY */ 862