1 /* 2 * emulator main execution loop 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include "qemu/osdep.h" 20 #include "cpu.h" 21 #include "trace.h" 22 #include "disas/disas.h" 23 #include "exec/exec-all.h" 24 #include "tcg.h" 25 #include "qemu/atomic.h" 26 #include "sysemu/qtest.h" 27 #include "qemu/timer.h" 28 #include "qemu/rcu.h" 29 #include "exec/tb-hash.h" 30 #include "exec/tb-lookup.h" 31 #include "exec/log.h" 32 #include "qemu/main-loop.h" 33 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 34 #include "hw/i386/apic.h" 35 #endif 36 #include "sysemu/cpus.h" 37 #include "sysemu/replay.h" 38 39 /* -icount align implementation. */ 40 41 typedef struct SyncClocks { 42 int64_t diff_clk; 43 int64_t last_cpu_icount; 44 int64_t realtime_clock; 45 } SyncClocks; 46 47 #if !defined(CONFIG_USER_ONLY) 48 /* Allow the guest to have a max 3ms advance. 49 * The difference between the 2 clocks could therefore 50 * oscillate around 0. 51 */ 52 #define VM_CLOCK_ADVANCE 3000000 53 #define THRESHOLD_REDUCE 1.5 54 #define MAX_DELAY_PRINT_RATE 2000000000LL 55 #define MAX_NB_PRINTS 100 56 57 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 58 { 59 int64_t cpu_icount; 60 61 if (!icount_align_option) { 62 return; 63 } 64 65 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; 66 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); 67 sc->last_cpu_icount = cpu_icount; 68 69 if (sc->diff_clk > VM_CLOCK_ADVANCE) { 70 #ifndef _WIN32 71 struct timespec sleep_delay, rem_delay; 72 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; 73 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; 74 if (nanosleep(&sleep_delay, &rem_delay) < 0) { 75 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; 76 } else { 77 sc->diff_clk = 0; 78 } 79 #else 80 Sleep(sc->diff_clk / SCALE_MS); 81 sc->diff_clk = 0; 82 #endif 83 } 84 } 85 86 static void print_delay(const SyncClocks *sc) 87 { 88 static float threshold_delay; 89 static int64_t last_realtime_clock; 90 static int nb_prints; 91 92 if (icount_align_option && 93 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && 94 nb_prints < MAX_NB_PRINTS) { 95 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || 96 (-sc->diff_clk / (float)1000000000LL < 97 (threshold_delay - THRESHOLD_REDUCE))) { 98 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; 99 printf("Warning: The guest is now late by %.1f to %.1f seconds\n", 100 threshold_delay - 1, 101 threshold_delay); 102 nb_prints++; 103 last_realtime_clock = sc->realtime_clock; 104 } 105 } 106 } 107 108 static void init_delay_params(SyncClocks *sc, 109 const CPUState *cpu) 110 { 111 if (!icount_align_option) { 112 return; 113 } 114 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); 115 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; 116 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; 117 if (sc->diff_clk < max_delay) { 118 max_delay = sc->diff_clk; 119 } 120 if (sc->diff_clk > max_advance) { 121 max_advance = sc->diff_clk; 122 } 123 124 /* Print every 2s max if the guest is late. We limit the number 125 of printed messages to NB_PRINT_MAX(currently 100) */ 126 print_delay(sc); 127 } 128 #else 129 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 130 { 131 } 132 133 static void init_delay_params(SyncClocks *sc, const CPUState *cpu) 134 { 135 } 136 #endif /* CONFIG USER ONLY */ 137 138 /* Execute a TB, and fix up the CPU state afterwards if necessary */ 139 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) 140 { 141 CPUArchState *env = cpu->env_ptr; 142 uintptr_t ret; 143 TranslationBlock *last_tb; 144 int tb_exit; 145 uint8_t *tb_ptr = itb->tc.ptr; 146 147 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, 148 "Trace %d: %p [" 149 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n", 150 cpu->cpu_index, itb->tc.ptr, 151 itb->cs_base, itb->pc, itb->flags, 152 lookup_symbol(itb->pc)); 153 154 #if defined(DEBUG_DISAS) 155 if (qemu_loglevel_mask(CPU_LOG_TB_CPU) 156 && qemu_log_in_addr_range(itb->pc)) { 157 qemu_log_lock(); 158 int flags = 0; 159 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { 160 flags |= CPU_DUMP_FPU; 161 } 162 #if defined(TARGET_I386) 163 flags |= CPU_DUMP_CCOP; 164 #endif 165 log_cpu_state(cpu, flags); 166 qemu_log_unlock(); 167 } 168 #endif /* DEBUG_DISAS */ 169 170 cpu->can_do_io = !use_icount; 171 ret = tcg_qemu_tb_exec(env, tb_ptr); 172 cpu->can_do_io = 1; 173 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); 174 tb_exit = ret & TB_EXIT_MASK; 175 trace_exec_tb_exit(last_tb, tb_exit); 176 177 if (tb_exit > TB_EXIT_IDX1) { 178 /* We didn't start executing this TB (eg because the instruction 179 * counter hit zero); we must restore the guest PC to the address 180 * of the start of the TB. 181 */ 182 CPUClass *cc = CPU_GET_CLASS(cpu); 183 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, 184 "Stopped execution of TB chain before %p [" 185 TARGET_FMT_lx "] %s\n", 186 last_tb->tc.ptr, last_tb->pc, 187 lookup_symbol(last_tb->pc)); 188 if (cc->synchronize_from_tb) { 189 cc->synchronize_from_tb(cpu, last_tb); 190 } else { 191 assert(cc->set_pc); 192 cc->set_pc(cpu, last_tb->pc); 193 } 194 } 195 return ret; 196 } 197 198 #ifndef CONFIG_USER_ONLY 199 /* Execute the code without caching the generated code. An interpreter 200 could be used if available. */ 201 static void cpu_exec_nocache(CPUState *cpu, int max_cycles, 202 TranslationBlock *orig_tb, bool ignore_icount) 203 { 204 TranslationBlock *tb; 205 uint32_t cflags = curr_cflags() | CF_NOCACHE; 206 207 if (ignore_icount) { 208 cflags &= ~CF_USE_ICOUNT; 209 } 210 211 /* Should never happen. 212 We only end up here when an existing TB is too long. */ 213 cflags |= MIN(max_cycles, CF_COUNT_MASK); 214 215 tb_lock(); 216 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, 217 orig_tb->flags, cflags); 218 tb->orig_tb = orig_tb; 219 tb_unlock(); 220 221 /* execute the generated code */ 222 trace_exec_tb_nocache(tb, tb->pc); 223 cpu_tb_exec(cpu, tb); 224 225 tb_lock(); 226 tb_phys_invalidate(tb, -1); 227 tcg_tb_remove(tb); 228 tb_unlock(); 229 } 230 #endif 231 232 void cpu_exec_step_atomic(CPUState *cpu) 233 { 234 CPUClass *cc = CPU_GET_CLASS(cpu); 235 TranslationBlock *tb; 236 target_ulong cs_base, pc; 237 uint32_t flags; 238 uint32_t cflags = 1; 239 uint32_t cf_mask = cflags & CF_HASH_MASK; 240 /* volatile because we modify it between setjmp and longjmp */ 241 volatile bool in_exclusive_region = false; 242 243 if (sigsetjmp(cpu->jmp_env, 0) == 0) { 244 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); 245 if (tb == NULL) { 246 mmap_lock(); 247 tb_lock(); 248 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 249 tb_unlock(); 250 mmap_unlock(); 251 } 252 253 start_exclusive(); 254 255 /* Since we got here, we know that parallel_cpus must be true. */ 256 parallel_cpus = false; 257 in_exclusive_region = true; 258 cc->cpu_exec_enter(cpu); 259 /* execute the generated code */ 260 trace_exec_tb(tb, pc); 261 cpu_tb_exec(cpu, tb); 262 cc->cpu_exec_exit(cpu); 263 } else { 264 /* We may have exited due to another problem here, so we need 265 * to reset any tb_locks we may have taken but didn't release. 266 * The mmap_lock is dropped by tb_gen_code if it runs out of 267 * memory. 268 */ 269 #ifndef CONFIG_SOFTMMU 270 tcg_debug_assert(!have_mmap_lock()); 271 #endif 272 tb_lock_reset(); 273 assert_no_pages_locked(); 274 } 275 276 if (in_exclusive_region) { 277 /* We might longjump out of either the codegen or the 278 * execution, so must make sure we only end the exclusive 279 * region if we started it. 280 */ 281 parallel_cpus = true; 282 end_exclusive(); 283 } 284 } 285 286 struct tb_desc { 287 target_ulong pc; 288 target_ulong cs_base; 289 CPUArchState *env; 290 tb_page_addr_t phys_page1; 291 uint32_t flags; 292 uint32_t cf_mask; 293 uint32_t trace_vcpu_dstate; 294 }; 295 296 static bool tb_lookup_cmp(const void *p, const void *d) 297 { 298 const TranslationBlock *tb = p; 299 const struct tb_desc *desc = d; 300 301 if (tb->pc == desc->pc && 302 tb->page_addr[0] == desc->phys_page1 && 303 tb->cs_base == desc->cs_base && 304 tb->flags == desc->flags && 305 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && 306 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) { 307 /* check next page if needed */ 308 if (tb->page_addr[1] == -1) { 309 return true; 310 } else { 311 tb_page_addr_t phys_page2; 312 target_ulong virt_page2; 313 314 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 315 phys_page2 = get_page_addr_code(desc->env, virt_page2); 316 if (tb->page_addr[1] == phys_page2) { 317 return true; 318 } 319 } 320 } 321 return false; 322 } 323 324 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, 325 target_ulong cs_base, uint32_t flags, 326 uint32_t cf_mask) 327 { 328 tb_page_addr_t phys_pc; 329 struct tb_desc desc; 330 uint32_t h; 331 332 desc.env = (CPUArchState *)cpu->env_ptr; 333 desc.cs_base = cs_base; 334 desc.flags = flags; 335 desc.cf_mask = cf_mask; 336 desc.trace_vcpu_dstate = *cpu->trace_dstate; 337 desc.pc = pc; 338 phys_pc = get_page_addr_code(desc.env, pc); 339 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; 340 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); 341 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); 342 } 343 344 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) 345 { 346 if (TCG_TARGET_HAS_direct_jump) { 347 uintptr_t offset = tb->jmp_target_arg[n]; 348 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; 349 tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr); 350 } else { 351 tb->jmp_target_arg[n] = addr; 352 } 353 } 354 355 static inline void tb_add_jump(TranslationBlock *tb, int n, 356 TranslationBlock *tb_next) 357 { 358 uintptr_t old; 359 360 assert(n < ARRAY_SIZE(tb->jmp_list_next)); 361 qemu_spin_lock(&tb_next->jmp_lock); 362 363 /* make sure the destination TB is valid */ 364 if (tb_next->cflags & CF_INVALID) { 365 goto out_unlock_next; 366 } 367 /* Atomically claim the jump destination slot only if it was NULL */ 368 old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next); 369 if (old) { 370 goto out_unlock_next; 371 } 372 373 /* patch the native jump address */ 374 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); 375 376 /* add in TB jmp list */ 377 tb->jmp_list_next[n] = tb_next->jmp_list_head; 378 tb_next->jmp_list_head = (uintptr_t)tb | n; 379 380 qemu_spin_unlock(&tb_next->jmp_lock); 381 382 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, 383 "Linking TBs %p [" TARGET_FMT_lx 384 "] index %d -> %p [" TARGET_FMT_lx "]\n", 385 tb->tc.ptr, tb->pc, n, 386 tb_next->tc.ptr, tb_next->pc); 387 return; 388 389 out_unlock_next: 390 qemu_spin_unlock(&tb_next->jmp_lock); 391 return; 392 } 393 394 static inline TranslationBlock *tb_find(CPUState *cpu, 395 TranslationBlock *last_tb, 396 int tb_exit, uint32_t cf_mask) 397 { 398 TranslationBlock *tb; 399 target_ulong cs_base, pc; 400 uint32_t flags; 401 bool acquired_tb_lock = false; 402 403 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); 404 if (tb == NULL) { 405 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be 406 * taken outside tb_lock. As system emulation is currently 407 * single threaded the locks are NOPs. 408 */ 409 mmap_lock(); 410 tb_lock(); 411 acquired_tb_lock = true; 412 413 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); 414 415 mmap_unlock(); 416 /* We add the TB in the virtual pc hash table for the fast lookup */ 417 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); 418 } 419 #ifndef CONFIG_USER_ONLY 420 /* We don't take care of direct jumps when address mapping changes in 421 * system emulation. So it's not safe to make a direct jump to a TB 422 * spanning two pages because the mapping for the second page can change. 423 */ 424 if (tb->page_addr[1] != -1) { 425 last_tb = NULL; 426 } 427 #endif 428 /* See if we can patch the calling TB. */ 429 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { 430 if (!acquired_tb_lock) { 431 tb_lock(); 432 acquired_tb_lock = true; 433 } 434 tb_add_jump(last_tb, tb_exit, tb); 435 } 436 if (acquired_tb_lock) { 437 tb_unlock(); 438 } 439 return tb; 440 } 441 442 static inline bool cpu_handle_halt(CPUState *cpu) 443 { 444 if (cpu->halted) { 445 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 446 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) 447 && replay_interrupt()) { 448 X86CPU *x86_cpu = X86_CPU(cpu); 449 qemu_mutex_lock_iothread(); 450 apic_poll_irq(x86_cpu->apic_state); 451 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); 452 qemu_mutex_unlock_iothread(); 453 } 454 #endif 455 if (!cpu_has_work(cpu)) { 456 return true; 457 } 458 459 cpu->halted = 0; 460 } 461 462 return false; 463 } 464 465 static inline void cpu_handle_debug_exception(CPUState *cpu) 466 { 467 CPUClass *cc = CPU_GET_CLASS(cpu); 468 CPUWatchpoint *wp; 469 470 if (!cpu->watchpoint_hit) { 471 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 472 wp->flags &= ~BP_WATCHPOINT_HIT; 473 } 474 } 475 476 cc->debug_excp_handler(cpu); 477 } 478 479 static inline bool cpu_handle_exception(CPUState *cpu, int *ret) 480 { 481 if (cpu->exception_index < 0) { 482 #ifndef CONFIG_USER_ONLY 483 if (replay_has_exception() 484 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { 485 /* try to cause an exception pending in the log */ 486 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true); 487 } 488 #endif 489 if (cpu->exception_index < 0) { 490 return false; 491 } 492 } 493 494 if (cpu->exception_index >= EXCP_INTERRUPT) { 495 /* exit request from the cpu execution loop */ 496 *ret = cpu->exception_index; 497 if (*ret == EXCP_DEBUG) { 498 cpu_handle_debug_exception(cpu); 499 } 500 cpu->exception_index = -1; 501 return true; 502 } else { 503 #if defined(CONFIG_USER_ONLY) 504 /* if user mode only, we simulate a fake exception 505 which will be handled outside the cpu execution 506 loop */ 507 #if defined(TARGET_I386) 508 CPUClass *cc = CPU_GET_CLASS(cpu); 509 cc->do_interrupt(cpu); 510 #endif 511 *ret = cpu->exception_index; 512 cpu->exception_index = -1; 513 return true; 514 #else 515 if (replay_exception()) { 516 CPUClass *cc = CPU_GET_CLASS(cpu); 517 qemu_mutex_lock_iothread(); 518 cc->do_interrupt(cpu); 519 qemu_mutex_unlock_iothread(); 520 cpu->exception_index = -1; 521 } else if (!replay_has_interrupt()) { 522 /* give a chance to iothread in replay mode */ 523 *ret = EXCP_INTERRUPT; 524 return true; 525 } 526 #endif 527 } 528 529 return false; 530 } 531 532 static inline bool cpu_handle_interrupt(CPUState *cpu, 533 TranslationBlock **last_tb) 534 { 535 CPUClass *cc = CPU_GET_CLASS(cpu); 536 537 /* Clear the interrupt flag now since we're processing 538 * cpu->interrupt_request and cpu->exit_request. 539 * Ensure zeroing happens before reading cpu->exit_request or 540 * cpu->interrupt_request (see also smp_wmb in cpu_exit()) 541 */ 542 atomic_mb_set(&cpu->icount_decr.u16.high, 0); 543 544 if (unlikely(atomic_read(&cpu->interrupt_request))) { 545 int interrupt_request; 546 qemu_mutex_lock_iothread(); 547 interrupt_request = cpu->interrupt_request; 548 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { 549 /* Mask out external interrupts for this step. */ 550 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; 551 } 552 if (interrupt_request & CPU_INTERRUPT_DEBUG) { 553 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; 554 cpu->exception_index = EXCP_DEBUG; 555 qemu_mutex_unlock_iothread(); 556 return true; 557 } 558 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { 559 /* Do nothing */ 560 } else if (interrupt_request & CPU_INTERRUPT_HALT) { 561 replay_interrupt(); 562 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; 563 cpu->halted = 1; 564 cpu->exception_index = EXCP_HLT; 565 qemu_mutex_unlock_iothread(); 566 return true; 567 } 568 #if defined(TARGET_I386) 569 else if (interrupt_request & CPU_INTERRUPT_INIT) { 570 X86CPU *x86_cpu = X86_CPU(cpu); 571 CPUArchState *env = &x86_cpu->env; 572 replay_interrupt(); 573 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); 574 do_cpu_init(x86_cpu); 575 cpu->exception_index = EXCP_HALTED; 576 qemu_mutex_unlock_iothread(); 577 return true; 578 } 579 #else 580 else if (interrupt_request & CPU_INTERRUPT_RESET) { 581 replay_interrupt(); 582 cpu_reset(cpu); 583 qemu_mutex_unlock_iothread(); 584 return true; 585 } 586 #endif 587 /* The target hook has 3 exit conditions: 588 False when the interrupt isn't processed, 589 True when it is, and we should restart on a new TB, 590 and via longjmp via cpu_loop_exit. */ 591 else { 592 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { 593 replay_interrupt(); 594 cpu->exception_index = -1; 595 *last_tb = NULL; 596 } 597 /* The target hook may have updated the 'cpu->interrupt_request'; 598 * reload the 'interrupt_request' value */ 599 interrupt_request = cpu->interrupt_request; 600 } 601 if (interrupt_request & CPU_INTERRUPT_EXITTB) { 602 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; 603 /* ensure that no TB jump will be modified as 604 the program flow was changed */ 605 *last_tb = NULL; 606 } 607 608 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ 609 qemu_mutex_unlock_iothread(); 610 } 611 612 /* Finally, check if we need to exit to the main loop. */ 613 if (unlikely(atomic_read(&cpu->exit_request) 614 || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) { 615 atomic_set(&cpu->exit_request, 0); 616 if (cpu->exception_index == -1) { 617 cpu->exception_index = EXCP_INTERRUPT; 618 } 619 return true; 620 } 621 622 return false; 623 } 624 625 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, 626 TranslationBlock **last_tb, int *tb_exit) 627 { 628 uintptr_t ret; 629 int32_t insns_left; 630 631 trace_exec_tb(tb, tb->pc); 632 ret = cpu_tb_exec(cpu, tb); 633 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); 634 *tb_exit = ret & TB_EXIT_MASK; 635 if (*tb_exit != TB_EXIT_REQUESTED) { 636 *last_tb = tb; 637 return; 638 } 639 640 *last_tb = NULL; 641 insns_left = atomic_read(&cpu->icount_decr.u32); 642 if (insns_left < 0) { 643 /* Something asked us to stop executing chained TBs; just 644 * continue round the main loop. Whatever requested the exit 645 * will also have set something else (eg exit_request or 646 * interrupt_request) which will be handled by 647 * cpu_handle_interrupt. cpu_handle_interrupt will also 648 * clear cpu->icount_decr.u16.high. 649 */ 650 return; 651 } 652 653 /* Instruction counter expired. */ 654 assert(use_icount); 655 #ifndef CONFIG_USER_ONLY 656 /* Ensure global icount has gone forward */ 657 cpu_update_icount(cpu); 658 /* Refill decrementer and continue execution. */ 659 insns_left = MIN(0xffff, cpu->icount_budget); 660 cpu->icount_decr.u16.low = insns_left; 661 cpu->icount_extra = cpu->icount_budget - insns_left; 662 if (!cpu->icount_extra) { 663 /* Execute any remaining instructions, then let the main loop 664 * handle the next event. 665 */ 666 if (insns_left > 0) { 667 cpu_exec_nocache(cpu, insns_left, tb, false); 668 } 669 } 670 #endif 671 } 672 673 /* main execution loop */ 674 675 int cpu_exec(CPUState *cpu) 676 { 677 CPUClass *cc = CPU_GET_CLASS(cpu); 678 int ret; 679 SyncClocks sc = { 0 }; 680 681 /* replay_interrupt may need current_cpu */ 682 current_cpu = cpu; 683 684 if (cpu_handle_halt(cpu)) { 685 return EXCP_HALTED; 686 } 687 688 rcu_read_lock(); 689 690 cc->cpu_exec_enter(cpu); 691 692 /* Calculate difference between guest clock and host clock. 693 * This delay includes the delay of the last cycle, so 694 * what we have to do is sleep until it is 0. As for the 695 * advance/delay we gain here, we try to fix it next time. 696 */ 697 init_delay_params(&sc, cpu); 698 699 /* prepare setjmp context for exception handling */ 700 if (sigsetjmp(cpu->jmp_env, 0) != 0) { 701 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) 702 /* Some compilers wrongly smash all local variables after 703 * siglongjmp. There were bug reports for gcc 4.5.0 and clang. 704 * Reload essential local variables here for those compilers. 705 * Newer versions of gcc would complain about this code (-Wclobbered). */ 706 cpu = current_cpu; 707 cc = CPU_GET_CLASS(cpu); 708 #else /* buggy compiler */ 709 /* Assert that the compiler does not smash local variables. */ 710 g_assert(cpu == current_cpu); 711 g_assert(cc == CPU_GET_CLASS(cpu)); 712 #endif /* buggy compiler */ 713 tb_lock_reset(); 714 if (qemu_mutex_iothread_locked()) { 715 qemu_mutex_unlock_iothread(); 716 } 717 } 718 719 /* if an exception is pending, we execute it here */ 720 while (!cpu_handle_exception(cpu, &ret)) { 721 TranslationBlock *last_tb = NULL; 722 int tb_exit = 0; 723 724 while (!cpu_handle_interrupt(cpu, &last_tb)) { 725 uint32_t cflags = cpu->cflags_next_tb; 726 TranslationBlock *tb; 727 728 /* When requested, use an exact setting for cflags for the next 729 execution. This is used for icount, precise smc, and stop- 730 after-access watchpoints. Since this request should never 731 have CF_INVALID set, -1 is a convenient invalid value that 732 does not require tcg headers for cpu_common_reset. */ 733 if (cflags == -1) { 734 cflags = curr_cflags(); 735 } else { 736 cpu->cflags_next_tb = -1; 737 } 738 739 tb = tb_find(cpu, last_tb, tb_exit, cflags); 740 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); 741 /* Try to align the host and virtual clocks 742 if the guest is in advance */ 743 align_clocks(&sc, cpu); 744 } 745 } 746 747 cc->cpu_exec_exit(cpu); 748 rcu_read_unlock(); 749 750 return ret; 751 } 752