1 /* 2 * emulator main execution loop 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #include "qemu/osdep.h" 20 #include "cpu.h" 21 #include "trace.h" 22 #include "disas/disas.h" 23 #include "exec/exec-all.h" 24 #include "tcg.h" 25 #include "qemu/atomic.h" 26 #include "sysemu/qtest.h" 27 #include "qemu/timer.h" 28 #include "qemu/rcu.h" 29 #include "exec/tb-hash.h" 30 #include "exec/tb-lookup.h" 31 #include "exec/log.h" 32 #include "qemu/main-loop.h" 33 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 34 #include "hw/i386/apic.h" 35 #endif 36 #include "sysemu/cpus.h" 37 #include "sysemu/replay.h" 38 39 /* -icount align implementation. */ 40 41 typedef struct SyncClocks { 42 int64_t diff_clk; 43 int64_t last_cpu_icount; 44 int64_t realtime_clock; 45 } SyncClocks; 46 47 #if !defined(CONFIG_USER_ONLY) 48 /* Allow the guest to have a max 3ms advance. 49 * The difference between the 2 clocks could therefore 50 * oscillate around 0. 51 */ 52 #define VM_CLOCK_ADVANCE 3000000 53 #define THRESHOLD_REDUCE 1.5 54 #define MAX_DELAY_PRINT_RATE 2000000000LL 55 #define MAX_NB_PRINTS 100 56 57 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 58 { 59 int64_t cpu_icount; 60 61 if (!icount_align_option) { 62 return; 63 } 64 65 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; 66 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); 67 sc->last_cpu_icount = cpu_icount; 68 69 if (sc->diff_clk > VM_CLOCK_ADVANCE) { 70 #ifndef _WIN32 71 struct timespec sleep_delay, rem_delay; 72 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; 73 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; 74 if (nanosleep(&sleep_delay, &rem_delay) < 0) { 75 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; 76 } else { 77 sc->diff_clk = 0; 78 } 79 #else 80 Sleep(sc->diff_clk / SCALE_MS); 81 sc->diff_clk = 0; 82 #endif 83 } 84 } 85 86 static void print_delay(const SyncClocks *sc) 87 { 88 static float threshold_delay; 89 static int64_t last_realtime_clock; 90 static int nb_prints; 91 92 if (icount_align_option && 93 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && 94 nb_prints < MAX_NB_PRINTS) { 95 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || 96 (-sc->diff_clk / (float)1000000000LL < 97 (threshold_delay - THRESHOLD_REDUCE))) { 98 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; 99 printf("Warning: The guest is now late by %.1f to %.1f seconds\n", 100 threshold_delay - 1, 101 threshold_delay); 102 nb_prints++; 103 last_realtime_clock = sc->realtime_clock; 104 } 105 } 106 } 107 108 static void init_delay_params(SyncClocks *sc, 109 const CPUState *cpu) 110 { 111 if (!icount_align_option) { 112 return; 113 } 114 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); 115 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; 116 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; 117 if (sc->diff_clk < max_delay) { 118 max_delay = sc->diff_clk; 119 } 120 if (sc->diff_clk > max_advance) { 121 max_advance = sc->diff_clk; 122 } 123 124 /* Print every 2s max if the guest is late. We limit the number 125 of printed messages to NB_PRINT_MAX(currently 100) */ 126 print_delay(sc); 127 } 128 #else 129 static void align_clocks(SyncClocks *sc, const CPUState *cpu) 130 { 131 } 132 133 static void init_delay_params(SyncClocks *sc, const CPUState *cpu) 134 { 135 } 136 #endif /* CONFIG USER ONLY */ 137 138 /* Execute a TB, and fix up the CPU state afterwards if necessary */ 139 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) 140 { 141 CPUArchState *env = cpu->env_ptr; 142 uintptr_t ret; 143 TranslationBlock *last_tb; 144 int tb_exit; 145 uint8_t *tb_ptr = itb->tc.ptr; 146 147 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, 148 "Trace %d: %p [" 149 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n", 150 cpu->cpu_index, itb->tc.ptr, 151 itb->cs_base, itb->pc, itb->flags, 152 lookup_symbol(itb->pc)); 153 154 #if defined(DEBUG_DISAS) 155 if (qemu_loglevel_mask(CPU_LOG_TB_CPU) 156 && qemu_log_in_addr_range(itb->pc)) { 157 qemu_log_lock(); 158 int flags = 0; 159 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { 160 flags |= CPU_DUMP_FPU; 161 } 162 #if defined(TARGET_I386) 163 flags |= CPU_DUMP_CCOP; 164 #endif 165 log_cpu_state(cpu, flags); 166 qemu_log_unlock(); 167 } 168 #endif /* DEBUG_DISAS */ 169 170 cpu->can_do_io = !use_icount; 171 ret = tcg_qemu_tb_exec(env, tb_ptr); 172 cpu->can_do_io = 1; 173 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); 174 tb_exit = ret & TB_EXIT_MASK; 175 trace_exec_tb_exit(last_tb, tb_exit); 176 177 if (tb_exit > TB_EXIT_IDX1) { 178 /* We didn't start executing this TB (eg because the instruction 179 * counter hit zero); we must restore the guest PC to the address 180 * of the start of the TB. 181 */ 182 CPUClass *cc = CPU_GET_CLASS(cpu); 183 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, 184 "Stopped execution of TB chain before %p [" 185 TARGET_FMT_lx "] %s\n", 186 last_tb->tc.ptr, last_tb->pc, 187 lookup_symbol(last_tb->pc)); 188 if (cc->synchronize_from_tb) { 189 cc->synchronize_from_tb(cpu, last_tb); 190 } else { 191 assert(cc->set_pc); 192 cc->set_pc(cpu, last_tb->pc); 193 } 194 } 195 return ret; 196 } 197 198 #ifndef CONFIG_USER_ONLY 199 /* Execute the code without caching the generated code. An interpreter 200 could be used if available. */ 201 static void cpu_exec_nocache(CPUState *cpu, int max_cycles, 202 TranslationBlock *orig_tb, bool ignore_icount) 203 { 204 TranslationBlock *tb; 205 uint32_t cflags = curr_cflags() | CF_NOCACHE; 206 207 if (ignore_icount) { 208 cflags &= ~CF_USE_ICOUNT; 209 } 210 211 /* Should never happen. 212 We only end up here when an existing TB is too long. */ 213 cflags |= MIN(max_cycles, CF_COUNT_MASK); 214 215 mmap_lock(); 216 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, 217 orig_tb->flags, cflags); 218 tb->orig_tb = orig_tb; 219 mmap_unlock(); 220 221 /* execute the generated code */ 222 trace_exec_tb_nocache(tb, tb->pc); 223 cpu_tb_exec(cpu, tb); 224 225 mmap_lock(); 226 tb_phys_invalidate(tb, -1); 227 mmap_unlock(); 228 tcg_tb_remove(tb); 229 } 230 #endif 231 232 void cpu_exec_step_atomic(CPUState *cpu) 233 { 234 CPUClass *cc = CPU_GET_CLASS(cpu); 235 TranslationBlock *tb; 236 target_ulong cs_base, pc; 237 uint32_t flags; 238 uint32_t cflags = 1; 239 uint32_t cf_mask = cflags & CF_HASH_MASK; 240 /* volatile because we modify it between setjmp and longjmp */ 241 volatile bool in_exclusive_region = false; 242 243 if (sigsetjmp(cpu->jmp_env, 0) == 0) { 244 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); 245 if (tb == NULL) { 246 mmap_lock(); 247 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); 248 mmap_unlock(); 249 } 250 251 start_exclusive(); 252 253 /* Since we got here, we know that parallel_cpus must be true. */ 254 parallel_cpus = false; 255 in_exclusive_region = true; 256 cc->cpu_exec_enter(cpu); 257 /* execute the generated code */ 258 trace_exec_tb(tb, pc); 259 cpu_tb_exec(cpu, tb); 260 cc->cpu_exec_exit(cpu); 261 } else { 262 /* 263 * The mmap_lock is dropped by tb_gen_code if it runs out of 264 * memory. 265 */ 266 #ifndef CONFIG_SOFTMMU 267 tcg_debug_assert(!have_mmap_lock()); 268 #endif 269 assert_no_pages_locked(); 270 } 271 272 if (in_exclusive_region) { 273 /* We might longjump out of either the codegen or the 274 * execution, so must make sure we only end the exclusive 275 * region if we started it. 276 */ 277 parallel_cpus = true; 278 end_exclusive(); 279 } 280 } 281 282 struct tb_desc { 283 target_ulong pc; 284 target_ulong cs_base; 285 CPUArchState *env; 286 tb_page_addr_t phys_page1; 287 uint32_t flags; 288 uint32_t cf_mask; 289 uint32_t trace_vcpu_dstate; 290 }; 291 292 static bool tb_lookup_cmp(const void *p, const void *d) 293 { 294 const TranslationBlock *tb = p; 295 const struct tb_desc *desc = d; 296 297 if (tb->pc == desc->pc && 298 tb->page_addr[0] == desc->phys_page1 && 299 tb->cs_base == desc->cs_base && 300 tb->flags == desc->flags && 301 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && 302 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) { 303 /* check next page if needed */ 304 if (tb->page_addr[1] == -1) { 305 return true; 306 } else { 307 tb_page_addr_t phys_page2; 308 target_ulong virt_page2; 309 310 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; 311 phys_page2 = get_page_addr_code(desc->env, virt_page2); 312 if (tb->page_addr[1] == phys_page2) { 313 return true; 314 } 315 } 316 } 317 return false; 318 } 319 320 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, 321 target_ulong cs_base, uint32_t flags, 322 uint32_t cf_mask) 323 { 324 tb_page_addr_t phys_pc; 325 struct tb_desc desc; 326 uint32_t h; 327 328 desc.env = (CPUArchState *)cpu->env_ptr; 329 desc.cs_base = cs_base; 330 desc.flags = flags; 331 desc.cf_mask = cf_mask; 332 desc.trace_vcpu_dstate = *cpu->trace_dstate; 333 desc.pc = pc; 334 phys_pc = get_page_addr_code(desc.env, pc); 335 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; 336 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); 337 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); 338 } 339 340 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) 341 { 342 if (TCG_TARGET_HAS_direct_jump) { 343 uintptr_t offset = tb->jmp_target_arg[n]; 344 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; 345 tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr); 346 } else { 347 tb->jmp_target_arg[n] = addr; 348 } 349 } 350 351 static inline void tb_add_jump(TranslationBlock *tb, int n, 352 TranslationBlock *tb_next) 353 { 354 uintptr_t old; 355 356 assert(n < ARRAY_SIZE(tb->jmp_list_next)); 357 qemu_spin_lock(&tb_next->jmp_lock); 358 359 /* make sure the destination TB is valid */ 360 if (tb_next->cflags & CF_INVALID) { 361 goto out_unlock_next; 362 } 363 /* Atomically claim the jump destination slot only if it was NULL */ 364 old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next); 365 if (old) { 366 goto out_unlock_next; 367 } 368 369 /* patch the native jump address */ 370 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); 371 372 /* add in TB jmp list */ 373 tb->jmp_list_next[n] = tb_next->jmp_list_head; 374 tb_next->jmp_list_head = (uintptr_t)tb | n; 375 376 qemu_spin_unlock(&tb_next->jmp_lock); 377 378 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, 379 "Linking TBs %p [" TARGET_FMT_lx 380 "] index %d -> %p [" TARGET_FMT_lx "]\n", 381 tb->tc.ptr, tb->pc, n, 382 tb_next->tc.ptr, tb_next->pc); 383 return; 384 385 out_unlock_next: 386 qemu_spin_unlock(&tb_next->jmp_lock); 387 return; 388 } 389 390 static inline TranslationBlock *tb_find(CPUState *cpu, 391 TranslationBlock *last_tb, 392 int tb_exit, uint32_t cf_mask) 393 { 394 TranslationBlock *tb; 395 target_ulong cs_base, pc; 396 uint32_t flags; 397 398 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); 399 if (tb == NULL) { 400 mmap_lock(); 401 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); 402 mmap_unlock(); 403 /* We add the TB in the virtual pc hash table for the fast lookup */ 404 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); 405 } 406 #ifndef CONFIG_USER_ONLY 407 /* We don't take care of direct jumps when address mapping changes in 408 * system emulation. So it's not safe to make a direct jump to a TB 409 * spanning two pages because the mapping for the second page can change. 410 */ 411 if (tb->page_addr[1] != -1) { 412 last_tb = NULL; 413 } 414 #endif 415 /* See if we can patch the calling TB. */ 416 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { 417 tb_add_jump(last_tb, tb_exit, tb); 418 } 419 return tb; 420 } 421 422 static inline bool cpu_handle_halt(CPUState *cpu) 423 { 424 if (cpu->halted) { 425 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) 426 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) 427 && replay_interrupt()) { 428 X86CPU *x86_cpu = X86_CPU(cpu); 429 qemu_mutex_lock_iothread(); 430 apic_poll_irq(x86_cpu->apic_state); 431 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); 432 qemu_mutex_unlock_iothread(); 433 } 434 #endif 435 if (!cpu_has_work(cpu)) { 436 return true; 437 } 438 439 cpu->halted = 0; 440 } 441 442 return false; 443 } 444 445 static inline void cpu_handle_debug_exception(CPUState *cpu) 446 { 447 CPUClass *cc = CPU_GET_CLASS(cpu); 448 CPUWatchpoint *wp; 449 450 if (!cpu->watchpoint_hit) { 451 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { 452 wp->flags &= ~BP_WATCHPOINT_HIT; 453 } 454 } 455 456 cc->debug_excp_handler(cpu); 457 } 458 459 static inline bool cpu_handle_exception(CPUState *cpu, int *ret) 460 { 461 if (cpu->exception_index < 0) { 462 #ifndef CONFIG_USER_ONLY 463 if (replay_has_exception() 464 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { 465 /* try to cause an exception pending in the log */ 466 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true); 467 } 468 #endif 469 if (cpu->exception_index < 0) { 470 return false; 471 } 472 } 473 474 if (cpu->exception_index >= EXCP_INTERRUPT) { 475 /* exit request from the cpu execution loop */ 476 *ret = cpu->exception_index; 477 if (*ret == EXCP_DEBUG) { 478 cpu_handle_debug_exception(cpu); 479 } 480 cpu->exception_index = -1; 481 return true; 482 } else { 483 #if defined(CONFIG_USER_ONLY) 484 /* if user mode only, we simulate a fake exception 485 which will be handled outside the cpu execution 486 loop */ 487 #if defined(TARGET_I386) 488 CPUClass *cc = CPU_GET_CLASS(cpu); 489 cc->do_interrupt(cpu); 490 #endif 491 *ret = cpu->exception_index; 492 cpu->exception_index = -1; 493 return true; 494 #else 495 if (replay_exception()) { 496 CPUClass *cc = CPU_GET_CLASS(cpu); 497 qemu_mutex_lock_iothread(); 498 cc->do_interrupt(cpu); 499 qemu_mutex_unlock_iothread(); 500 cpu->exception_index = -1; 501 } else if (!replay_has_interrupt()) { 502 /* give a chance to iothread in replay mode */ 503 *ret = EXCP_INTERRUPT; 504 return true; 505 } 506 #endif 507 } 508 509 return false; 510 } 511 512 static inline bool cpu_handle_interrupt(CPUState *cpu, 513 TranslationBlock **last_tb) 514 { 515 CPUClass *cc = CPU_GET_CLASS(cpu); 516 517 /* Clear the interrupt flag now since we're processing 518 * cpu->interrupt_request and cpu->exit_request. 519 * Ensure zeroing happens before reading cpu->exit_request or 520 * cpu->interrupt_request (see also smp_wmb in cpu_exit()) 521 */ 522 atomic_mb_set(&cpu->icount_decr.u16.high, 0); 523 524 if (unlikely(atomic_read(&cpu->interrupt_request))) { 525 int interrupt_request; 526 qemu_mutex_lock_iothread(); 527 interrupt_request = cpu->interrupt_request; 528 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { 529 /* Mask out external interrupts for this step. */ 530 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; 531 } 532 if (interrupt_request & CPU_INTERRUPT_DEBUG) { 533 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; 534 cpu->exception_index = EXCP_DEBUG; 535 qemu_mutex_unlock_iothread(); 536 return true; 537 } 538 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { 539 /* Do nothing */ 540 } else if (interrupt_request & CPU_INTERRUPT_HALT) { 541 replay_interrupt(); 542 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; 543 cpu->halted = 1; 544 cpu->exception_index = EXCP_HLT; 545 qemu_mutex_unlock_iothread(); 546 return true; 547 } 548 #if defined(TARGET_I386) 549 else if (interrupt_request & CPU_INTERRUPT_INIT) { 550 X86CPU *x86_cpu = X86_CPU(cpu); 551 CPUArchState *env = &x86_cpu->env; 552 replay_interrupt(); 553 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); 554 do_cpu_init(x86_cpu); 555 cpu->exception_index = EXCP_HALTED; 556 qemu_mutex_unlock_iothread(); 557 return true; 558 } 559 #else 560 else if (interrupt_request & CPU_INTERRUPT_RESET) { 561 replay_interrupt(); 562 cpu_reset(cpu); 563 qemu_mutex_unlock_iothread(); 564 return true; 565 } 566 #endif 567 /* The target hook has 3 exit conditions: 568 False when the interrupt isn't processed, 569 True when it is, and we should restart on a new TB, 570 and via longjmp via cpu_loop_exit. */ 571 else { 572 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { 573 replay_interrupt(); 574 cpu->exception_index = -1; 575 *last_tb = NULL; 576 } 577 /* The target hook may have updated the 'cpu->interrupt_request'; 578 * reload the 'interrupt_request' value */ 579 interrupt_request = cpu->interrupt_request; 580 } 581 if (interrupt_request & CPU_INTERRUPT_EXITTB) { 582 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; 583 /* ensure that no TB jump will be modified as 584 the program flow was changed */ 585 *last_tb = NULL; 586 } 587 588 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ 589 qemu_mutex_unlock_iothread(); 590 } 591 592 /* Finally, check if we need to exit to the main loop. */ 593 if (unlikely(atomic_read(&cpu->exit_request) 594 || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) { 595 atomic_set(&cpu->exit_request, 0); 596 if (cpu->exception_index == -1) { 597 cpu->exception_index = EXCP_INTERRUPT; 598 } 599 return true; 600 } 601 602 return false; 603 } 604 605 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, 606 TranslationBlock **last_tb, int *tb_exit) 607 { 608 uintptr_t ret; 609 int32_t insns_left; 610 611 trace_exec_tb(tb, tb->pc); 612 ret = cpu_tb_exec(cpu, tb); 613 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); 614 *tb_exit = ret & TB_EXIT_MASK; 615 if (*tb_exit != TB_EXIT_REQUESTED) { 616 *last_tb = tb; 617 return; 618 } 619 620 *last_tb = NULL; 621 insns_left = atomic_read(&cpu->icount_decr.u32); 622 if (insns_left < 0) { 623 /* Something asked us to stop executing chained TBs; just 624 * continue round the main loop. Whatever requested the exit 625 * will also have set something else (eg exit_request or 626 * interrupt_request) which will be handled by 627 * cpu_handle_interrupt. cpu_handle_interrupt will also 628 * clear cpu->icount_decr.u16.high. 629 */ 630 return; 631 } 632 633 /* Instruction counter expired. */ 634 assert(use_icount); 635 #ifndef CONFIG_USER_ONLY 636 /* Ensure global icount has gone forward */ 637 cpu_update_icount(cpu); 638 /* Refill decrementer and continue execution. */ 639 insns_left = MIN(0xffff, cpu->icount_budget); 640 cpu->icount_decr.u16.low = insns_left; 641 cpu->icount_extra = cpu->icount_budget - insns_left; 642 if (!cpu->icount_extra) { 643 /* Execute any remaining instructions, then let the main loop 644 * handle the next event. 645 */ 646 if (insns_left > 0) { 647 cpu_exec_nocache(cpu, insns_left, tb, false); 648 } 649 } 650 #endif 651 } 652 653 /* main execution loop */ 654 655 int cpu_exec(CPUState *cpu) 656 { 657 CPUClass *cc = CPU_GET_CLASS(cpu); 658 int ret; 659 SyncClocks sc = { 0 }; 660 661 /* replay_interrupt may need current_cpu */ 662 current_cpu = cpu; 663 664 if (cpu_handle_halt(cpu)) { 665 return EXCP_HALTED; 666 } 667 668 rcu_read_lock(); 669 670 cc->cpu_exec_enter(cpu); 671 672 /* Calculate difference between guest clock and host clock. 673 * This delay includes the delay of the last cycle, so 674 * what we have to do is sleep until it is 0. As for the 675 * advance/delay we gain here, we try to fix it next time. 676 */ 677 init_delay_params(&sc, cpu); 678 679 /* prepare setjmp context for exception handling */ 680 if (sigsetjmp(cpu->jmp_env, 0) != 0) { 681 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) 682 /* Some compilers wrongly smash all local variables after 683 * siglongjmp. There were bug reports for gcc 4.5.0 and clang. 684 * Reload essential local variables here for those compilers. 685 * Newer versions of gcc would complain about this code (-Wclobbered). */ 686 cpu = current_cpu; 687 cc = CPU_GET_CLASS(cpu); 688 #else /* buggy compiler */ 689 /* Assert that the compiler does not smash local variables. */ 690 g_assert(cpu == current_cpu); 691 g_assert(cc == CPU_GET_CLASS(cpu)); 692 #endif /* buggy compiler */ 693 #ifndef CONFIG_SOFTMMU 694 tcg_debug_assert(!have_mmap_lock()); 695 #endif 696 if (qemu_mutex_iothread_locked()) { 697 qemu_mutex_unlock_iothread(); 698 } 699 } 700 701 /* if an exception is pending, we execute it here */ 702 while (!cpu_handle_exception(cpu, &ret)) { 703 TranslationBlock *last_tb = NULL; 704 int tb_exit = 0; 705 706 while (!cpu_handle_interrupt(cpu, &last_tb)) { 707 uint32_t cflags = cpu->cflags_next_tb; 708 TranslationBlock *tb; 709 710 /* When requested, use an exact setting for cflags for the next 711 execution. This is used for icount, precise smc, and stop- 712 after-access watchpoints. Since this request should never 713 have CF_INVALID set, -1 is a convenient invalid value that 714 does not require tcg headers for cpu_common_reset. */ 715 if (cflags == -1) { 716 cflags = curr_cflags(); 717 } else { 718 cpu->cflags_next_tb = -1; 719 } 720 721 tb = tb_find(cpu, last_tb, tb_exit, cflags); 722 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); 723 /* Try to align the host and virtual clocks 724 if the guest is in advance */ 725 align_clocks(&sc, cpu); 726 } 727 } 728 729 cc->cpu_exec_exit(cpu); 730 rcu_read_unlock(); 731 732 return ret; 733 } 734