1*9e706622SShawn McCarney{ 2*9e706622SShawn McCarney "comments": [ 3*9e706622SShawn McCarney "phosphor-regulators configuration file for IBM BlueRidge systems" 4*9e706622SShawn McCarney ], 5*9e706622SShawn McCarney 6*9e706622SShawn McCarney "rules": [ 7*9e706622SShawn McCarney { 8*9e706622SShawn McCarney "comments": ["Rule to set PMBus PAGE to 0"], 9*9e706622SShawn McCarney "id": "set_page0_rule", 10*9e706622SShawn McCarney "actions": [ 11*9e706622SShawn McCarney { "i2c_write_byte": { "register": "0x00", "value": "0x00" } } 12*9e706622SShawn McCarney ] 13*9e706622SShawn McCarney }, 14*9e706622SShawn McCarney 15*9e706622SShawn McCarney { 16*9e706622SShawn McCarney "comments": ["Rule to set PMBus PAGE to 1"], 17*9e706622SShawn McCarney "id": "set_page1_rule", 18*9e706622SShawn McCarney "actions": [ 19*9e706622SShawn McCarney { "i2c_write_byte": { "register": "0x00", "value": "0x01" } } 20*9e706622SShawn McCarney ] 21*9e706622SShawn McCarney }, 22*9e706622SShawn McCarney 23*9e706622SShawn McCarney { 24*9e706622SShawn McCarney "comments": ["Rule to set output voltage of a PMBus regulator"], 25*9e706622SShawn McCarney "id": "set_voltage_rule", 26*9e706622SShawn McCarney "actions": [ 27*9e706622SShawn McCarney { 28*9e706622SShawn McCarney "comments": [ 29*9e706622SShawn McCarney "Write volts value to VOUT_COMMAND in linear format.", 30*9e706622SShawn McCarney "Get volts value from configuration. Get exponent", 31*9e706622SShawn McCarney "from VOUT_MODE. Verify write was successful." 32*9e706622SShawn McCarney ], 33*9e706622SShawn McCarney "pmbus_write_vout_command": { 34*9e706622SShawn McCarney "format": "linear", 35*9e706622SShawn McCarney "is_verified": true 36*9e706622SShawn McCarney } 37*9e706622SShawn McCarney } 38*9e706622SShawn McCarney ] 39*9e706622SShawn McCarney }, 40*9e706622SShawn McCarney 41*9e706622SShawn McCarney { 42*9e706622SShawn McCarney "comments": [ 43*9e706622SShawn McCarney "Rule to set output voltage of PAGE 0 of a PMBus regulator" 44*9e706622SShawn McCarney ], 45*9e706622SShawn McCarney "id": "set_voltage_page0_rule", 46*9e706622SShawn McCarney "actions": [ 47*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 48*9e706622SShawn McCarney { "run_rule": "set_voltage_rule" } 49*9e706622SShawn McCarney ] 50*9e706622SShawn McCarney }, 51*9e706622SShawn McCarney 52*9e706622SShawn McCarney { 53*9e706622SShawn McCarney "comments": [ 54*9e706622SShawn McCarney "Rule to set output voltage of PAGE 1 of a PMBus regulator" 55*9e706622SShawn McCarney ], 56*9e706622SShawn McCarney "id": "set_voltage_page1_rule", 57*9e706622SShawn McCarney "actions": [ 58*9e706622SShawn McCarney { "run_rule": "set_page1_rule" }, 59*9e706622SShawn McCarney { "run_rule": "set_voltage_rule" } 60*9e706622SShawn McCarney ] 61*9e706622SShawn McCarney }, 62*9e706622SShawn McCarney 63*9e706622SShawn McCarney { 64*9e706622SShawn McCarney "comments": [ 65*9e706622SShawn McCarney "Rule to set output voltage of a PMBus regulator using", 66*9e706622SShawn McCarney "PMBus OPERATION and VOUT_COMMAND" 67*9e706622SShawn McCarney ], 68*9e706622SShawn McCarney "id": "set_operation_and_voltage_rule", 69*9e706622SShawn McCarney "actions": [ 70*9e706622SShawn McCarney { 71*9e706622SShawn McCarney "comments": [ 72*9e706622SShawn McCarney "Set PMBus OPERATION to 0x80 indicating output voltage", 73*9e706622SShawn McCarney "is set by the PMBus VOUT_COMMAND" 74*9e706622SShawn McCarney ], 75*9e706622SShawn McCarney "i2c_write_byte": { "register": "0x01", "value": "0x80" } 76*9e706622SShawn McCarney }, 77*9e706622SShawn McCarney 78*9e706622SShawn McCarney { 79*9e706622SShawn McCarney "comments": [ 80*9e706622SShawn McCarney "Set the output voltage using the PMBus VOUT_COMMAND" 81*9e706622SShawn McCarney ], 82*9e706622SShawn McCarney "run_rule": "set_voltage_rule" 83*9e706622SShawn McCarney }, 84*9e706622SShawn McCarney 85*9e706622SShawn McCarney { 86*9e706622SShawn McCarney "comments": [ 87*9e706622SShawn McCarney "Set PMBus OPERATION to 0xB0 indicating output voltage", 88*9e706622SShawn McCarney "will now be set by AVSBus (AVS_VOUT_COMMAND).", 89*9e706622SShawn McCarney "Hardware settings cause the VOUT_COMMAND value to be", 90*9e706622SShawn McCarney "the initial voltage value for AVSBus." 91*9e706622SShawn McCarney ], 92*9e706622SShawn McCarney "i2c_write_byte": { "register": "0x01", "value": "0xB0" } 93*9e706622SShawn McCarney } 94*9e706622SShawn McCarney ] 95*9e706622SShawn McCarney }, 96*9e706622SShawn McCarney 97*9e706622SShawn McCarney { 98*9e706622SShawn McCarney "comments": [ 99*9e706622SShawn McCarney "Rule to set IOUT_OC_WARN_LIMIT for a PMBus regulator" 100*9e706622SShawn McCarney ], 101*9e706622SShawn McCarney "id": "set_iout_oc_warn_limit_rule", 102*9e706622SShawn McCarney "actions": [ 103*9e706622SShawn McCarney { 104*9e706622SShawn McCarney "comments": [ 105*9e706622SShawn McCarney "Set PMBus IOUT_OC_WARN_LIMIT to 326A to ensure OCW", 106*9e706622SShawn McCarney "asserts at the roll-over bug identified in the", 107*9e706622SShawn McCarney "silicon. 326A = 0x08A3. PMBus requires", 108*9e706622SShawn McCarney "the low order byte to be written first." 109*9e706622SShawn McCarney ], 110*9e706622SShawn McCarney "i2c_write_bytes": { 111*9e706622SShawn McCarney "register": "0x4A", 112*9e706622SShawn McCarney "values": ["0xA3", "0x08"] 113*9e706622SShawn McCarney } 114*9e706622SShawn McCarney } 115*9e706622SShawn McCarney ] 116*9e706622SShawn McCarney }, 117*9e706622SShawn McCarney 118*9e706622SShawn McCarney { 119*9e706622SShawn McCarney "comments": [ 120*9e706622SShawn McCarney "Rule to configure a VDD rail using the PMBus interface" 121*9e706622SShawn McCarney ], 122*9e706622SShawn McCarney "id": "configure_vdd_rule", 123*9e706622SShawn McCarney "actions": [ 124*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 125*9e706622SShawn McCarney { "run_rule": "set_iout_oc_warn_limit_rule" }, 126*9e706622SShawn McCarney { 127*9e706622SShawn McCarney "comments": [ 128*9e706622SShawn McCarney "Set VOUT_MODE to exponent of -9 for VDD regulator", 129*9e706622SShawn McCarney "to support older and newer hardware." 130*9e706622SShawn McCarney ], 131*9e706622SShawn McCarney "i2c_write_byte": { "register": "0x20", "value": "0x17" } 132*9e706622SShawn McCarney }, 133*9e706622SShawn McCarney { "run_rule": "set_operation_and_voltage_rule" }, 134*9e706622SShawn McCarney { 135*9e706622SShawn McCarney "comments": [ 136*9e706622SShawn McCarney "Set VOUT_MIN to 0V since for VDD the voltage", 137*9e706622SShawn McCarney "can go down to 0.5V so we want to lower this", 138*9e706622SShawn McCarney "limit below 0.5V so the regulator does not trip." 139*9e706622SShawn McCarney ], 140*9e706622SShawn McCarney "i2c_write_bytes": { 141*9e706622SShawn McCarney "register": "0x2B", 142*9e706622SShawn McCarney "values": ["0x00", "0x00"] 143*9e706622SShawn McCarney } 144*9e706622SShawn McCarney }, 145*9e706622SShawn McCarney { 146*9e706622SShawn McCarney "comments": [ 147*9e706622SShawn McCarney "Set VOUT_MAX to 1.255V since for VDD the voltage", 148*9e706622SShawn McCarney "can go up to 1.1V so we want to raise this", 149*9e706622SShawn McCarney "limit above 1.1V so the regulator does not trip." 150*9e706622SShawn McCarney ], 151*9e706622SShawn McCarney "i2c_write_bytes": { 152*9e706622SShawn McCarney "register": "0x24", 153*9e706622SShawn McCarney "values": ["0x83", "0x02"] 154*9e706622SShawn McCarney } 155*9e706622SShawn McCarney }, 156*9e706622SShawn McCarney { 157*9e706622SShawn McCarney "comments": [ 158*9e706622SShawn McCarney "Set POWER_GOOD_ON for VDD to a value of 0.5V." 159*9e706622SShawn McCarney ], 160*9e706622SShawn McCarney "i2c_write_bytes": { 161*9e706622SShawn McCarney "register": "0x5E", 162*9e706622SShawn McCarney "values": ["0x00", "0x01"] 163*9e706622SShawn McCarney } 164*9e706622SShawn McCarney }, 165*9e706622SShawn McCarney { 166*9e706622SShawn McCarney "comments": [ 167*9e706622SShawn McCarney "Set POWER_GOOD_OFF for VDD to a value of 0.4V." 168*9e706622SShawn McCarney ], 169*9e706622SShawn McCarney "i2c_write_bytes": { 170*9e706622SShawn McCarney "register": "0x5F", 171*9e706622SShawn McCarney "values": ["0xCD", "0x00"] 172*9e706622SShawn McCarney } 173*9e706622SShawn McCarney }, 174*9e706622SShawn McCarney { 175*9e706622SShawn McCarney "comments": [ 176*9e706622SShawn McCarney "Set VOUT_OV_WARN_LIMIT for VDD to a value of 1.30V." 177*9e706622SShawn McCarney ], 178*9e706622SShawn McCarney "i2c_write_bytes": { 179*9e706622SShawn McCarney "register": "0x42", 180*9e706622SShawn McCarney "values": ["0x9A", "0x02"] 181*9e706622SShawn McCarney } 182*9e706622SShawn McCarney }, 183*9e706622SShawn McCarney { 184*9e706622SShawn McCarney "comments": [ 185*9e706622SShawn McCarney "Set VOUT_UV_WARN_LIMIT for VDD to a value of 0.45V." 186*9e706622SShawn McCarney ], 187*9e706622SShawn McCarney "i2c_write_bytes": { 188*9e706622SShawn McCarney "register": "0x43", 189*9e706622SShawn McCarney "values": ["0xE6", "0x00"] 190*9e706622SShawn McCarney } 191*9e706622SShawn McCarney }, 192*9e706622SShawn McCarney { 193*9e706622SShawn McCarney "comments": [ 194*9e706622SShawn McCarney "Set TOFF_FALL time for VDD to a value of 10ms." 195*9e706622SShawn McCarney ], 196*9e706622SShawn McCarney "i2c_write_bytes": { 197*9e706622SShawn McCarney "register": "0x65", 198*9e706622SShawn McCarney "values": ["0x28", "0xF0"] 199*9e706622SShawn McCarney } 200*9e706622SShawn McCarney }, 201*9e706622SShawn McCarney { 202*9e706622SShawn McCarney "comments": [ 203*9e706622SShawn McCarney "Set IOUT_OC_FAULT_RESPONSE for VDD to shutdown." 204*9e706622SShawn McCarney ], 205*9e706622SShawn McCarney "i2c_write_byte": { "register": "0x47", "value": "0xC0" } 206*9e706622SShawn McCarney } 207*9e706622SShawn McCarney ] 208*9e706622SShawn McCarney }, 209*9e706622SShawn McCarney 210*9e706622SShawn McCarney { 211*9e706622SShawn McCarney "comments": [ 212*9e706622SShawn McCarney "Rule to configure a VDN rail using the PMBus interface" 213*9e706622SShawn McCarney ], 214*9e706622SShawn McCarney "id": "configure_vdn_rule", 215*9e706622SShawn McCarney "actions": [ 216*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 217*9e706622SShawn McCarney { "run_rule": "set_operation_and_voltage_rule" }, 218*9e706622SShawn McCarney { 219*9e706622SShawn McCarney "comments": [ 220*9e706622SShawn McCarney "Set VOUT_MIN to 0V since for VDN the voltage", 221*9e706622SShawn McCarney "can go down to 0.6V so we want to lower this", 222*9e706622SShawn McCarney "limit below 0.6V so the regulator does not trip." 223*9e706622SShawn McCarney ], 224*9e706622SShawn McCarney "i2c_write_bytes": { 225*9e706622SShawn McCarney "register": "0x2B", 226*9e706622SShawn McCarney "values": ["0x00", "0x00"] 227*9e706622SShawn McCarney } 228*9e706622SShawn McCarney }, 229*9e706622SShawn McCarney { 230*9e706622SShawn McCarney "comments": [ 231*9e706622SShawn McCarney "Set VOUT_MAX to 1.1V since for VDN the voltage", 232*9e706622SShawn McCarney "can go up to 1.0V so we want to raise this", 233*9e706622SShawn McCarney "limit above 1.0V so the regulator does not trip." 234*9e706622SShawn McCarney ], 235*9e706622SShawn McCarney "i2c_write_bytes": { 236*9e706622SShawn McCarney "register": "0x24", 237*9e706622SShawn McCarney "values": ["0x33", "0x02"] 238*9e706622SShawn McCarney } 239*9e706622SShawn McCarney }, 240*9e706622SShawn McCarney { 241*9e706622SShawn McCarney "comments": [ 242*9e706622SShawn McCarney "Set POWER_GOOD_ON for VDN to a value of 0.45V." 243*9e706622SShawn McCarney ], 244*9e706622SShawn McCarney "i2c_write_bytes": { 245*9e706622SShawn McCarney "register": "0x5E", 246*9e706622SShawn McCarney "values": ["0xE6", "0x00"] 247*9e706622SShawn McCarney } 248*9e706622SShawn McCarney }, 249*9e706622SShawn McCarney { 250*9e706622SShawn McCarney "comments": [ 251*9e706622SShawn McCarney "Set POWER_GOOD_OFF for VDN to a value of 0.40V." 252*9e706622SShawn McCarney ], 253*9e706622SShawn McCarney "i2c_write_bytes": { 254*9e706622SShawn McCarney "register": "0x5F", 255*9e706622SShawn McCarney "values": ["0xCC", "0x00"] 256*9e706622SShawn McCarney } 257*9e706622SShawn McCarney } 258*9e706622SShawn McCarney ] 259*9e706622SShawn McCarney }, 260*9e706622SShawn McCarney 261*9e706622SShawn McCarney { 262*9e706622SShawn McCarney "comments": [ 263*9e706622SShawn McCarney "Rule to configure a VCS rail using the PMBus interface" 264*9e706622SShawn McCarney ], 265*9e706622SShawn McCarney "id": "configure_vcs_rule", 266*9e706622SShawn McCarney "actions": [ 267*9e706622SShawn McCarney { "run_rule": "set_page1_rule" }, 268*9e706622SShawn McCarney { "run_rule": "set_operation_and_voltage_rule" }, 269*9e706622SShawn McCarney { 270*9e706622SShawn McCarney "comments": [ 271*9e706622SShawn McCarney "Set VOUT_MIN to 0V since for VCS the voltage", 272*9e706622SShawn McCarney "can go down to 0.7V so we want to lower this", 273*9e706622SShawn McCarney "limit below 0.7V so the regulator does not trip." 274*9e706622SShawn McCarney ], 275*9e706622SShawn McCarney "i2c_write_bytes": { 276*9e706622SShawn McCarney "register": "0x2B", 277*9e706622SShawn McCarney "values": ["0x00", "0x00"] 278*9e706622SShawn McCarney } 279*9e706622SShawn McCarney }, 280*9e706622SShawn McCarney { 281*9e706622SShawn McCarney "comments": [ 282*9e706622SShawn McCarney "Set VOUT_MAX to 1.2V since for VCS the voltage", 283*9e706622SShawn McCarney "can go up to 1.1V so we want to raise this", 284*9e706622SShawn McCarney "limit above 1.1V so the regulator does not trip." 285*9e706622SShawn McCarney ], 286*9e706622SShawn McCarney "i2c_write_bytes": { 287*9e706622SShawn McCarney "register": "0x24", 288*9e706622SShawn McCarney "values": ["0x66", "0x02"] 289*9e706622SShawn McCarney } 290*9e706622SShawn McCarney }, 291*9e706622SShawn McCarney { 292*9e706622SShawn McCarney "comments": [ 293*9e706622SShawn McCarney "Set POWER_GOOD_ON for VCS to a value of 0.55V." 294*9e706622SShawn McCarney ], 295*9e706622SShawn McCarney "i2c_write_bytes": { 296*9e706622SShawn McCarney "register": "0x5E", 297*9e706622SShawn McCarney "values": ["0x19", "0x01"] 298*9e706622SShawn McCarney } 299*9e706622SShawn McCarney }, 300*9e706622SShawn McCarney { 301*9e706622SShawn McCarney "comments": [ 302*9e706622SShawn McCarney "Set POWER_GOOD_OFF for VCS to a value of 0.50V." 303*9e706622SShawn McCarney ], 304*9e706622SShawn McCarney "i2c_write_bytes": { 305*9e706622SShawn McCarney "register": "0x5F", 306*9e706622SShawn McCarney "values": ["0x00", "0x01"] 307*9e706622SShawn McCarney } 308*9e706622SShawn McCarney } 309*9e706622SShawn McCarney ] 310*9e706622SShawn McCarney }, 311*9e706622SShawn McCarney 312*9e706622SShawn McCarney { 313*9e706622SShawn McCarney "comments": [ 314*9e706622SShawn McCarney "Rule to configure a VIO rail using the PMBus interface" 315*9e706622SShawn McCarney ], 316*9e706622SShawn McCarney "id": "configure_vio_rule", 317*9e706622SShawn McCarney "actions": [ 318*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 319*9e706622SShawn McCarney { "run_rule": "set_operation_and_voltage_rule" }, 320*9e706622SShawn McCarney { 321*9e706622SShawn McCarney "comments": [ 322*9e706622SShawn McCarney "Set VOUT_MIN to 0V since for VIO the voltage", 323*9e706622SShawn McCarney "can go down to 0.8V so we want to lower this", 324*9e706622SShawn McCarney "limit below 0.8V so the regulator does not trip." 325*9e706622SShawn McCarney ], 326*9e706622SShawn McCarney "i2c_write_bytes": { 327*9e706622SShawn McCarney "register": "0x2B", 328*9e706622SShawn McCarney "values": ["0x00", "0x00"] 329*9e706622SShawn McCarney } 330*9e706622SShawn McCarney }, 331*9e706622SShawn McCarney { 332*9e706622SShawn McCarney "comments": [ 333*9e706622SShawn McCarney "Set VOUT_MAX to 1.1V since for VIO the voltage", 334*9e706622SShawn McCarney "can go up to 1.0V so we want to raise this", 335*9e706622SShawn McCarney "limit above 1.0V so the regulator does not trip." 336*9e706622SShawn McCarney ], 337*9e706622SShawn McCarney "i2c_write_bytes": { 338*9e706622SShawn McCarney "register": "0x24", 339*9e706622SShawn McCarney "values": ["0x33", "0x02"] 340*9e706622SShawn McCarney } 341*9e706622SShawn McCarney }, 342*9e706622SShawn McCarney { 343*9e706622SShawn McCarney "comments": [ 344*9e706622SShawn McCarney "Set POWER_GOOD_ON for VIO to a value of 0.55V." 345*9e706622SShawn McCarney ], 346*9e706622SShawn McCarney "i2c_write_bytes": { 347*9e706622SShawn McCarney "register": "0x5E", 348*9e706622SShawn McCarney "values": ["0x19", "0x01"] 349*9e706622SShawn McCarney } 350*9e706622SShawn McCarney }, 351*9e706622SShawn McCarney { 352*9e706622SShawn McCarney "comments": [ 353*9e706622SShawn McCarney "Set POWER_GOOD_OFF for VIO to a value of 0.50V." 354*9e706622SShawn McCarney ], 355*9e706622SShawn McCarney "i2c_write_bytes": { 356*9e706622SShawn McCarney "register": "0x5F", 357*9e706622SShawn McCarney "values": ["0x00", "0x01"] 358*9e706622SShawn McCarney } 359*9e706622SShawn McCarney } 360*9e706622SShawn McCarney ] 361*9e706622SShawn McCarney }, 362*9e706622SShawn McCarney 363*9e706622SShawn McCarney { 364*9e706622SShawn McCarney "comments": [ 365*9e706622SShawn McCarney "Rule to configure a VPCIE rail using the PMBus interface" 366*9e706622SShawn McCarney ], 367*9e706622SShawn McCarney "id": "configure_vpcie_rule", 368*9e706622SShawn McCarney "actions": [ 369*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 370*9e706622SShawn McCarney { "run_rule": "set_voltage_rule" }, 371*9e706622SShawn McCarney { 372*9e706622SShawn McCarney "comments": [ 373*9e706622SShawn McCarney "Set VOUT_MIN to 0V since for VPCIE the voltage", 374*9e706622SShawn McCarney "can go down to 0.81V so we want to lower this", 375*9e706622SShawn McCarney "limit below 0.81V so the regulator does not trip." 376*9e706622SShawn McCarney ], 377*9e706622SShawn McCarney "i2c_write_bytes": { 378*9e706622SShawn McCarney "register": "0x2B", 379*9e706622SShawn McCarney "values": ["0x00", "0x00"] 380*9e706622SShawn McCarney } 381*9e706622SShawn McCarney }, 382*9e706622SShawn McCarney { 383*9e706622SShawn McCarney "comments": [ 384*9e706622SShawn McCarney "Set VOUT_MAX to 1.0V since for VPCIE the voltage", 385*9e706622SShawn McCarney "can go up to 0.91V so we want to raise this", 386*9e706622SShawn McCarney "limit above 0.91V so the regulator does not trip." 387*9e706622SShawn McCarney ], 388*9e706622SShawn McCarney "i2c_write_bytes": { 389*9e706622SShawn McCarney "register": "0x24", 390*9e706622SShawn McCarney "values": ["0x00", "0x02"] 391*9e706622SShawn McCarney } 392*9e706622SShawn McCarney }, 393*9e706622SShawn McCarney { 394*9e706622SShawn McCarney "comments": [ 395*9e706622SShawn McCarney "Set POWER_GOOD_ON for VPCIE to a value of 0.65V." 396*9e706622SShawn McCarney ], 397*9e706622SShawn McCarney "i2c_write_bytes": { 398*9e706622SShawn McCarney "register": "0x5E", 399*9e706622SShawn McCarney "values": ["0x4C", "0x01"] 400*9e706622SShawn McCarney } 401*9e706622SShawn McCarney }, 402*9e706622SShawn McCarney { 403*9e706622SShawn McCarney "comments": [ 404*9e706622SShawn McCarney "Set POWER_GOOD_OFF for VPCIE to a value of 0.60V." 405*9e706622SShawn McCarney ], 406*9e706622SShawn McCarney "i2c_write_bytes": { 407*9e706622SShawn McCarney "register": "0x5F", 408*9e706622SShawn McCarney "values": ["0x33", "0x01"] 409*9e706622SShawn McCarney } 410*9e706622SShawn McCarney } 411*9e706622SShawn McCarney ] 412*9e706622SShawn McCarney }, 413*9e706622SShawn McCarney 414*9e706622SShawn McCarney { 415*9e706622SShawn McCarney "comments": [ 416*9e706622SShawn McCarney "Rule to read sensors on IR38064 regulators using the", 417*9e706622SShawn McCarney "PMBus interface" 418*9e706622SShawn McCarney ], 419*9e706622SShawn McCarney "id": "read_sensors_ir38064_rule", 420*9e706622SShawn McCarney "actions": [ 421*9e706622SShawn McCarney { 422*9e706622SShawn McCarney "comments": ["Read output current from READ_IOUT"], 423*9e706622SShawn McCarney "pmbus_read_sensor": { 424*9e706622SShawn McCarney "type": "iout", 425*9e706622SShawn McCarney "command": "0x8C", 426*9e706622SShawn McCarney "format": "linear_11" 427*9e706622SShawn McCarney } 428*9e706622SShawn McCarney }, 429*9e706622SShawn McCarney { 430*9e706622SShawn McCarney "comments": [ 431*9e706622SShawn McCarney "Read highest output current from MFR_IOUT_PEAK" 432*9e706622SShawn McCarney ], 433*9e706622SShawn McCarney "pmbus_read_sensor": { 434*9e706622SShawn McCarney "type": "iout_peak", 435*9e706622SShawn McCarney "command": "0xDC", 436*9e706622SShawn McCarney "format": "linear_11" 437*9e706622SShawn McCarney } 438*9e706622SShawn McCarney }, 439*9e706622SShawn McCarney { 440*9e706622SShawn McCarney "comments": ["Read output power from READ_POUT"], 441*9e706622SShawn McCarney "pmbus_read_sensor": { 442*9e706622SShawn McCarney "type": "pout", 443*9e706622SShawn McCarney "command": "0x96", 444*9e706622SShawn McCarney "format": "linear_11" 445*9e706622SShawn McCarney } 446*9e706622SShawn McCarney }, 447*9e706622SShawn McCarney { 448*9e706622SShawn McCarney "comments": ["Read temperature from READ_TEMPERATURE"], 449*9e706622SShawn McCarney "pmbus_read_sensor": { 450*9e706622SShawn McCarney "type": "temperature", 451*9e706622SShawn McCarney "command": "0x8D", 452*9e706622SShawn McCarney "format": "linear_11" 453*9e706622SShawn McCarney } 454*9e706622SShawn McCarney }, 455*9e706622SShawn McCarney { 456*9e706622SShawn McCarney "comments": [ 457*9e706622SShawn McCarney "Read highest temperature from MFR_TEMPERATURE_PEAK" 458*9e706622SShawn McCarney ], 459*9e706622SShawn McCarney "pmbus_read_sensor": { 460*9e706622SShawn McCarney "type": "temperature_peak", 461*9e706622SShawn McCarney "command": "0xDD", 462*9e706622SShawn McCarney "format": "linear_11" 463*9e706622SShawn McCarney } 464*9e706622SShawn McCarney }, 465*9e706622SShawn McCarney { 466*9e706622SShawn McCarney "comments": [ 467*9e706622SShawn McCarney "Read output voltage from READ_VOUT.", 468*9e706622SShawn McCarney "Note: regulator does not support VOUT_MODE, so the", 469*9e706622SShawn McCarney "exponent must be specified." 470*9e706622SShawn McCarney ], 471*9e706622SShawn McCarney "pmbus_read_sensor": { 472*9e706622SShawn McCarney "type": "vout", 473*9e706622SShawn McCarney "command": "0x8B", 474*9e706622SShawn McCarney "format": "linear_16", 475*9e706622SShawn McCarney "exponent": -8 476*9e706622SShawn McCarney } 477*9e706622SShawn McCarney }, 478*9e706622SShawn McCarney { 479*9e706622SShawn McCarney "comments": [ 480*9e706622SShawn McCarney "Read highest output voltage from MFR_VOUT_PEAK.", 481*9e706622SShawn McCarney "Note: regulator does not support VOUT_MODE, so the", 482*9e706622SShawn McCarney "exponent must be specified." 483*9e706622SShawn McCarney ], 484*9e706622SShawn McCarney "pmbus_read_sensor": { 485*9e706622SShawn McCarney "type": "vout_peak", 486*9e706622SShawn McCarney "command": "0xDB", 487*9e706622SShawn McCarney "format": "linear_16", 488*9e706622SShawn McCarney "exponent": -8 489*9e706622SShawn McCarney } 490*9e706622SShawn McCarney } 491*9e706622SShawn McCarney ] 492*9e706622SShawn McCarney }, 493*9e706622SShawn McCarney 494*9e706622SShawn McCarney { 495*9e706622SShawn McCarney "comments": [ 496*9e706622SShawn McCarney "Rule to read sensors on IR35221 regulators using the", 497*9e706622SShawn McCarney "PMBus interface" 498*9e706622SShawn McCarney ], 499*9e706622SShawn McCarney "id": "read_sensors_ir35221_rule", 500*9e706622SShawn McCarney "actions": [ 501*9e706622SShawn McCarney { 502*9e706622SShawn McCarney "comments": ["Read output current from READ_IOUT"], 503*9e706622SShawn McCarney "pmbus_read_sensor": { 504*9e706622SShawn McCarney "type": "iout", 505*9e706622SShawn McCarney "command": "0x8C", 506*9e706622SShawn McCarney "format": "linear_11" 507*9e706622SShawn McCarney } 508*9e706622SShawn McCarney }, 509*9e706622SShawn McCarney { 510*9e706622SShawn McCarney "comments": [ 511*9e706622SShawn McCarney "Read highest output current from MFR_IOUT_PEAK" 512*9e706622SShawn McCarney ], 513*9e706622SShawn McCarney "pmbus_read_sensor": { 514*9e706622SShawn McCarney "type": "iout_peak", 515*9e706622SShawn McCarney "command": "0xC7", 516*9e706622SShawn McCarney "format": "linear_11" 517*9e706622SShawn McCarney } 518*9e706622SShawn McCarney }, 519*9e706622SShawn McCarney { 520*9e706622SShawn McCarney "comments": [ 521*9e706622SShawn McCarney "Read lowest output current from MFR_IOUT_VALLEY" 522*9e706622SShawn McCarney ], 523*9e706622SShawn McCarney "pmbus_read_sensor": { 524*9e706622SShawn McCarney "type": "iout_valley", 525*9e706622SShawn McCarney "command": "0xCB", 526*9e706622SShawn McCarney "format": "linear_11" 527*9e706622SShawn McCarney } 528*9e706622SShawn McCarney }, 529*9e706622SShawn McCarney { 530*9e706622SShawn McCarney "comments": ["Read output power from READ_POUT"], 531*9e706622SShawn McCarney "pmbus_read_sensor": { 532*9e706622SShawn McCarney "type": "pout", 533*9e706622SShawn McCarney "command": "0x96", 534*9e706622SShawn McCarney "format": "linear_11" 535*9e706622SShawn McCarney } 536*9e706622SShawn McCarney }, 537*9e706622SShawn McCarney { 538*9e706622SShawn McCarney "comments": ["Read temperature from READ_TEMPERATURE_1"], 539*9e706622SShawn McCarney "pmbus_read_sensor": { 540*9e706622SShawn McCarney "type": "temperature", 541*9e706622SShawn McCarney "command": "0x8D", 542*9e706622SShawn McCarney "format": "linear_11" 543*9e706622SShawn McCarney } 544*9e706622SShawn McCarney }, 545*9e706622SShawn McCarney { 546*9e706622SShawn McCarney "comments": ["Read highest temperature from MFR_TEMP_PEAK"], 547*9e706622SShawn McCarney "pmbus_read_sensor": { 548*9e706622SShawn McCarney "type": "temperature_peak", 549*9e706622SShawn McCarney "command": "0xC8", 550*9e706622SShawn McCarney "format": "linear_11" 551*9e706622SShawn McCarney } 552*9e706622SShawn McCarney }, 553*9e706622SShawn McCarney { 554*9e706622SShawn McCarney "comments": ["Read output voltage from READ_VOUT"], 555*9e706622SShawn McCarney "pmbus_read_sensor": { 556*9e706622SShawn McCarney "type": "vout", 557*9e706622SShawn McCarney "command": "0x8B", 558*9e706622SShawn McCarney "format": "linear_16" 559*9e706622SShawn McCarney } 560*9e706622SShawn McCarney }, 561*9e706622SShawn McCarney { 562*9e706622SShawn McCarney "comments": [ 563*9e706622SShawn McCarney "Read highest output voltage from MFR_VOUT_PEAK" 564*9e706622SShawn McCarney ], 565*9e706622SShawn McCarney "pmbus_read_sensor": { 566*9e706622SShawn McCarney "type": "vout_peak", 567*9e706622SShawn McCarney "command": "0xC6", 568*9e706622SShawn McCarney "format": "linear_16" 569*9e706622SShawn McCarney } 570*9e706622SShawn McCarney }, 571*9e706622SShawn McCarney { 572*9e706622SShawn McCarney "comments": [ 573*9e706622SShawn McCarney "Read lowest output voltage from MFR_VOUT_VALLEY" 574*9e706622SShawn McCarney ], 575*9e706622SShawn McCarney "pmbus_read_sensor": { 576*9e706622SShawn McCarney "type": "vout_valley", 577*9e706622SShawn McCarney "command": "0xCA", 578*9e706622SShawn McCarney "format": "linear_16" 579*9e706622SShawn McCarney } 580*9e706622SShawn McCarney } 581*9e706622SShawn McCarney ] 582*9e706622SShawn McCarney }, 583*9e706622SShawn McCarney 584*9e706622SShawn McCarney { 585*9e706622SShawn McCarney "comments": [ 586*9e706622SShawn McCarney "Rule to read sensors on PAGE 0 of IR35221 regulators", 587*9e706622SShawn McCarney "using the PMBus interface" 588*9e706622SShawn McCarney ], 589*9e706622SShawn McCarney "id": "read_sensors_ir35221_page0_rule", 590*9e706622SShawn McCarney "actions": [ 591*9e706622SShawn McCarney { "run_rule": "set_page0_rule" }, 592*9e706622SShawn McCarney { "run_rule": "read_sensors_ir35221_rule" } 593*9e706622SShawn McCarney ] 594*9e706622SShawn McCarney }, 595*9e706622SShawn McCarney 596*9e706622SShawn McCarney { 597*9e706622SShawn McCarney "comments": [ 598*9e706622SShawn McCarney "Rule to read sensors on PAGE 1 of IR35221 regulators", 599*9e706622SShawn McCarney "using the PMBus interface" 600*9e706622SShawn McCarney ], 601*9e706622SShawn McCarney "id": "read_sensors_ir35221_page1_rule", 602*9e706622SShawn McCarney "actions": [ 603*9e706622SShawn McCarney { "run_rule": "set_page1_rule" }, 604*9e706622SShawn McCarney { "run_rule": "read_sensors_ir35221_rule" } 605*9e706622SShawn McCarney ] 606*9e706622SShawn McCarney }, 607*9e706622SShawn McCarney 608*9e706622SShawn McCarney { 609*9e706622SShawn McCarney "comments": [ 610*9e706622SShawn McCarney "Rule to read sensors on PAGE 0 of XDPE132G5C regulators", 611*9e706622SShawn McCarney "using the PMBus interface" 612*9e706622SShawn McCarney ], 613*9e706622SShawn McCarney "id": "read_sensors_xdpe132g5c_page0_rule", 614*9e706622SShawn McCarney "actions": [ 615*9e706622SShawn McCarney { 616*9e706622SShawn McCarney "comments": ["Can use same rule as for IR35221 regulators"], 617*9e706622SShawn McCarney "run_rule": "read_sensors_ir35221_page0_rule" 618*9e706622SShawn McCarney } 619*9e706622SShawn McCarney ] 620*9e706622SShawn McCarney }, 621*9e706622SShawn McCarney 622*9e706622SShawn McCarney { 623*9e706622SShawn McCarney "comments": [ 624*9e706622SShawn McCarney "Rule to determine if the current system is a 2S4U/2S2U.", 625*9e706622SShawn McCarney "2S systems have more regulators on the Nisqually system", 626*9e706622SShawn McCarney "planar than 1S systems. Must return true if system is a", 627*9e706622SShawn McCarney "2S4U/2S2U and false if system is a 1S4U." 628*9e706622SShawn McCarney ], 629*9e706622SShawn McCarney "id": "is_2s_system_rule", 630*9e706622SShawn McCarney "actions": [ 631*9e706622SShawn McCarney { 632*9e706622SShawn McCarney "comments": [ 633*9e706622SShawn McCarney "Check whether the CCIN VPD keyword on the Nisqually", 634*9e706622SShawn McCarney "system planar has the value for 2S4U or 2S2U" 635*9e706622SShawn McCarney ], 636*9e706622SShawn McCarney "or": [ 637*9e706622SShawn McCarney { 638*9e706622SShawn McCarney "compare_vpd": { 639*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 640*9e706622SShawn McCarney "keyword": "CCIN", 641*9e706622SShawn McCarney "value": "2E2F" 642*9e706622SShawn McCarney } 643*9e706622SShawn McCarney }, 644*9e706622SShawn McCarney { 645*9e706622SShawn McCarney "compare_vpd": { 646*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 647*9e706622SShawn McCarney "keyword": "CCIN", 648*9e706622SShawn McCarney "value": "2E2D" 649*9e706622SShawn McCarney } 650*9e706622SShawn McCarney } 651*9e706622SShawn McCarney ] 652*9e706622SShawn McCarney } 653*9e706622SShawn McCarney ] 654*9e706622SShawn McCarney }, 655*9e706622SShawn McCarney 656*9e706622SShawn McCarney { 657*9e706622SShawn McCarney "comments": [ 658*9e706622SShawn McCarney "Rule to determine if pass 2 or higher Nisqually", 659*9e706622SShawn McCarney "backplane is present. Must return true if present and", 660*9e706622SShawn McCarney "false otherwise." 661*9e706622SShawn McCarney ], 662*9e706622SShawn McCarney "id": "is_pass2_nisqually_rule", 663*9e706622SShawn McCarney "actions": [ 664*9e706622SShawn McCarney { 665*9e706622SShawn McCarney "comments": [ 666*9e706622SShawn McCarney "Check that the PartNumber VPD keyword on the", 667*9e706622SShawn McCarney "Nisqually system planar is not the value for", 668*9e706622SShawn McCarney "the pass 1 2U or 4U." 669*9e706622SShawn McCarney ], 670*9e706622SShawn McCarney "not": { 671*9e706622SShawn McCarney "or": [ 672*9e706622SShawn McCarney { 673*9e706622SShawn McCarney "compare_vpd": { 674*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 675*9e706622SShawn McCarney "keyword": "PartNumber", 676*9e706622SShawn McCarney "value": "02WG656" 677*9e706622SShawn McCarney } 678*9e706622SShawn McCarney }, 679*9e706622SShawn McCarney { 680*9e706622SShawn McCarney "compare_vpd": { 681*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 682*9e706622SShawn McCarney "keyword": "PartNumber", 683*9e706622SShawn McCarney "value": "02WG678" 684*9e706622SShawn McCarney } 685*9e706622SShawn McCarney } 686*9e706622SShawn McCarney ] 687*9e706622SShawn McCarney } 688*9e706622SShawn McCarney } 689*9e706622SShawn McCarney ] 690*9e706622SShawn McCarney }, 691*9e706622SShawn McCarney 692*9e706622SShawn McCarney { 693*9e706622SShawn McCarney "comments": [ 694*9e706622SShawn McCarney "Rule to determine if the VRM FRU for DCM-1 is present.", 695*9e706622SShawn McCarney "Must return true if VRM is present and false if VRM is", 696*9e706622SShawn McCarney "missing." 697*9e706622SShawn McCarney ], 698*9e706622SShawn McCarney "id": "is_dcm1_vrm_present_rule", 699*9e706622SShawn McCarney "actions": [ 700*9e706622SShawn McCarney { 701*9e706622SShawn McCarney "comments": [ 702*9e706622SShawn McCarney "Check whether the VRM FRU is present OR the DCM-1", 703*9e706622SShawn McCarney "FRU is present. This provides a double check in", 704*9e706622SShawn McCarney "case the VRM presence line is not working. If DCM-1", 705*9e706622SShawn McCarney "is present, the associated VRM should be too." 706*9e706622SShawn McCarney ], 707*9e706622SShawn McCarney "or": [ 708*9e706622SShawn McCarney { 709*9e706622SShawn McCarney "compare_presence": { 710*9e706622SShawn McCarney "fru": "system/chassis/motherboard/vdd_vrm1", 711*9e706622SShawn McCarney "value": true 712*9e706622SShawn McCarney } 713*9e706622SShawn McCarney }, 714*9e706622SShawn McCarney { 715*9e706622SShawn McCarney "compare_presence": { 716*9e706622SShawn McCarney "fru": "system/chassis/motherboard/dcm1/cpu0", 717*9e706622SShawn McCarney "value": true 718*9e706622SShawn McCarney } 719*9e706622SShawn McCarney } 720*9e706622SShawn McCarney ] 721*9e706622SShawn McCarney } 722*9e706622SShawn McCarney ] 723*9e706622SShawn McCarney }, 724*9e706622SShawn McCarney 725*9e706622SShawn McCarney { 726*9e706622SShawn McCarney "comments": [ 727*9e706622SShawn McCarney "Rule to determine if a Flett card is present in slot C8.", 728*9e706622SShawn McCarney "This requires a Nisqually pass2+ due to I2C bus number", 729*9e706622SShawn McCarney "differences between pass 1 and pass 2.", 730*9e706622SShawn McCarney "Pass 1 and pass 2 Fletts are both supported.", 731*9e706622SShawn McCarney "Must return true if present and false otherwise." 732*9e706622SShawn McCarney ], 733*9e706622SShawn McCarney "id": "is_flett_c8_present_rule", 734*9e706622SShawn McCarney "actions": [ 735*9e706622SShawn McCarney { 736*9e706622SShawn McCarney "if": { 737*9e706622SShawn McCarney "condition": { 738*9e706622SShawn McCarney "comments": ["Check if the Nisqually is pass 2"], 739*9e706622SShawn McCarney "run_rule": "is_pass2_nisqually_rule" 740*9e706622SShawn McCarney }, 741*9e706622SShawn McCarney "then": [ 742*9e706622SShawn McCarney { 743*9e706622SShawn McCarney "comments": [ 744*9e706622SShawn McCarney "Check if a card is present in slot C8" 745*9e706622SShawn McCarney ], 746*9e706622SShawn McCarney "if": { 747*9e706622SShawn McCarney "condition": { 748*9e706622SShawn McCarney "compare_presence": { 749*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot8/pcie_card8", 750*9e706622SShawn McCarney "value": true 751*9e706622SShawn McCarney } 752*9e706622SShawn McCarney }, 753*9e706622SShawn McCarney "then": [ 754*9e706622SShawn McCarney { 755*9e706622SShawn McCarney "comments": [ 756*9e706622SShawn McCarney "Check if card has Flett CCIN keyword" 757*9e706622SShawn McCarney ], 758*9e706622SShawn McCarney "compare_vpd": { 759*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot8/pcie_card8", 760*9e706622SShawn McCarney "keyword": "CCIN", 761*9e706622SShawn McCarney "value": "6B87" 762*9e706622SShawn McCarney } 763*9e706622SShawn McCarney } 764*9e706622SShawn McCarney ] 765*9e706622SShawn McCarney } 766*9e706622SShawn McCarney } 767*9e706622SShawn McCarney ] 768*9e706622SShawn McCarney } 769*9e706622SShawn McCarney } 770*9e706622SShawn McCarney ] 771*9e706622SShawn McCarney }, 772*9e706622SShawn McCarney 773*9e706622SShawn McCarney { 774*9e706622SShawn McCarney "comments": [ 775*9e706622SShawn McCarney "Rule to determine if a Flett card is present in slot C9.", 776*9e706622SShawn McCarney "This requires a Nisqually pass2+ due to I2C bus number", 777*9e706622SShawn McCarney "differences between pass 1 and pass 2.", 778*9e706622SShawn McCarney "This also requires the Flett to be pass 2 because the", 779*9e706622SShawn McCarney "pass 1 regulator has a different I2C address.", 780*9e706622SShawn McCarney "Must return true if present and false otherwise." 781*9e706622SShawn McCarney ], 782*9e706622SShawn McCarney "id": "is_flett_c9_present_rule", 783*9e706622SShawn McCarney "actions": [ 784*9e706622SShawn McCarney { 785*9e706622SShawn McCarney "if": { 786*9e706622SShawn McCarney "condition": { 787*9e706622SShawn McCarney "comments": ["Check if the Nisqually is pass 2"], 788*9e706622SShawn McCarney "run_rule": "is_pass2_nisqually_rule" 789*9e706622SShawn McCarney }, 790*9e706622SShawn McCarney "then": [ 791*9e706622SShawn McCarney { 792*9e706622SShawn McCarney "comments": [ 793*9e706622SShawn McCarney "Check if a card is present in slot C9" 794*9e706622SShawn McCarney ], 795*9e706622SShawn McCarney "if": { 796*9e706622SShawn McCarney "condition": { 797*9e706622SShawn McCarney "compare_presence": { 798*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot9/pcie_card9", 799*9e706622SShawn McCarney "value": true 800*9e706622SShawn McCarney } 801*9e706622SShawn McCarney }, 802*9e706622SShawn McCarney "then": [ 803*9e706622SShawn McCarney { 804*9e706622SShawn McCarney "comments": [ 805*9e706622SShawn McCarney "Check if card has Flett CCIN keyword" 806*9e706622SShawn McCarney ], 807*9e706622SShawn McCarney "if": { 808*9e706622SShawn McCarney "condition": { 809*9e706622SShawn McCarney "compare_vpd": { 810*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot9/pcie_card9", 811*9e706622SShawn McCarney "keyword": "CCIN", 812*9e706622SShawn McCarney "value": "6B87" 813*9e706622SShawn McCarney } 814*9e706622SShawn McCarney }, 815*9e706622SShawn McCarney "then": [ 816*9e706622SShawn McCarney { 817*9e706622SShawn McCarney "comments": [ 818*9e706622SShawn McCarney "Check that card does not have a pass 1", 819*9e706622SShawn McCarney "part number" 820*9e706622SShawn McCarney ], 821*9e706622SShawn McCarney "not": { 822*9e706622SShawn McCarney "or": [ 823*9e706622SShawn McCarney { 824*9e706622SShawn McCarney "compare_vpd": { 825*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot9/pcie_card9", 826*9e706622SShawn McCarney "keyword": "PartNumber", 827*9e706622SShawn McCarney "value": "03FL194" 828*9e706622SShawn McCarney } 829*9e706622SShawn McCarney }, 830*9e706622SShawn McCarney { 831*9e706622SShawn McCarney "compare_vpd": { 832*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot9/pcie_card9", 833*9e706622SShawn McCarney "keyword": "PartNumber", 834*9e706622SShawn McCarney "value": "03FL204" 835*9e706622SShawn McCarney } 836*9e706622SShawn McCarney } 837*9e706622SShawn McCarney ] 838*9e706622SShawn McCarney } 839*9e706622SShawn McCarney } 840*9e706622SShawn McCarney ] 841*9e706622SShawn McCarney } 842*9e706622SShawn McCarney } 843*9e706622SShawn McCarney ] 844*9e706622SShawn McCarney } 845*9e706622SShawn McCarney } 846*9e706622SShawn McCarney ] 847*9e706622SShawn McCarney } 848*9e706622SShawn McCarney } 849*9e706622SShawn McCarney ] 850*9e706622SShawn McCarney }, 851*9e706622SShawn McCarney 852*9e706622SShawn McCarney { 853*9e706622SShawn McCarney "comments": [ 854*9e706622SShawn McCarney "Rule to determine if a Flett card is present in slot C10.", 855*9e706622SShawn McCarney "This requires a Nisqually pass2+ due to I2C bus number", 856*9e706622SShawn McCarney "differences between pass 1 and pass 2.", 857*9e706622SShawn McCarney "This also requires the Flett to be pass 2 because the", 858*9e706622SShawn McCarney "pass 1 regulator has a different I2C address.", 859*9e706622SShawn McCarney "Must return true if present and false otherwise." 860*9e706622SShawn McCarney ], 861*9e706622SShawn McCarney "id": "is_flett_c10_present_rule", 862*9e706622SShawn McCarney "actions": [ 863*9e706622SShawn McCarney { 864*9e706622SShawn McCarney "if": { 865*9e706622SShawn McCarney "condition": { 866*9e706622SShawn McCarney "comments": ["Check if the Nisqually is pass 2"], 867*9e706622SShawn McCarney "run_rule": "is_pass2_nisqually_rule" 868*9e706622SShawn McCarney }, 869*9e706622SShawn McCarney "then": [ 870*9e706622SShawn McCarney { 871*9e706622SShawn McCarney "comments": [ 872*9e706622SShawn McCarney "Check if a card is present in slot C10" 873*9e706622SShawn McCarney ], 874*9e706622SShawn McCarney "if": { 875*9e706622SShawn McCarney "condition": { 876*9e706622SShawn McCarney "compare_presence": { 877*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot10/pcie_card10", 878*9e706622SShawn McCarney "value": true 879*9e706622SShawn McCarney } 880*9e706622SShawn McCarney }, 881*9e706622SShawn McCarney "then": [ 882*9e706622SShawn McCarney { 883*9e706622SShawn McCarney "comments": [ 884*9e706622SShawn McCarney "Check if card has Flett CCIN keyword" 885*9e706622SShawn McCarney ], 886*9e706622SShawn McCarney "if": { 887*9e706622SShawn McCarney "condition": { 888*9e706622SShawn McCarney "compare_vpd": { 889*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot10/pcie_card10", 890*9e706622SShawn McCarney "keyword": "CCIN", 891*9e706622SShawn McCarney "value": "6B87" 892*9e706622SShawn McCarney } 893*9e706622SShawn McCarney }, 894*9e706622SShawn McCarney "then": [ 895*9e706622SShawn McCarney { 896*9e706622SShawn McCarney "comments": [ 897*9e706622SShawn McCarney "Check that card does not have a pass 1", 898*9e706622SShawn McCarney "part number" 899*9e706622SShawn McCarney ], 900*9e706622SShawn McCarney "not": { 901*9e706622SShawn McCarney "or": [ 902*9e706622SShawn McCarney { 903*9e706622SShawn McCarney "compare_vpd": { 904*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot10/pcie_card10", 905*9e706622SShawn McCarney "keyword": "PartNumber", 906*9e706622SShawn McCarney "value": "03FL194" 907*9e706622SShawn McCarney } 908*9e706622SShawn McCarney }, 909*9e706622SShawn McCarney { 910*9e706622SShawn McCarney "compare_vpd": { 911*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot10/pcie_card10", 912*9e706622SShawn McCarney "keyword": "PartNumber", 913*9e706622SShawn McCarney "value": "03FL204" 914*9e706622SShawn McCarney } 915*9e706622SShawn McCarney } 916*9e706622SShawn McCarney ] 917*9e706622SShawn McCarney } 918*9e706622SShawn McCarney } 919*9e706622SShawn McCarney ] 920*9e706622SShawn McCarney } 921*9e706622SShawn McCarney } 922*9e706622SShawn McCarney ] 923*9e706622SShawn McCarney } 924*9e706622SShawn McCarney } 925*9e706622SShawn McCarney ] 926*9e706622SShawn McCarney } 927*9e706622SShawn McCarney } 928*9e706622SShawn McCarney ] 929*9e706622SShawn McCarney }, 930*9e706622SShawn McCarney 931*9e706622SShawn McCarney { 932*9e706622SShawn McCarney "comments": [ 933*9e706622SShawn McCarney "Rule to determine if a Flett card is present in slot C11.", 934*9e706622SShawn McCarney "This requires a Nisqually pass2+ due to I2C bus number", 935*9e706622SShawn McCarney "differences between pass 1 and pass 2.", 936*9e706622SShawn McCarney "Pass 1 and pass 2 Fletts are both supported.", 937*9e706622SShawn McCarney "Must return true if present and false otherwise." 938*9e706622SShawn McCarney ], 939*9e706622SShawn McCarney "id": "is_flett_c11_present_rule", 940*9e706622SShawn McCarney "actions": [ 941*9e706622SShawn McCarney { 942*9e706622SShawn McCarney "if": { 943*9e706622SShawn McCarney "condition": { 944*9e706622SShawn McCarney "comments": ["Check if the Nisqually is pass 2"], 945*9e706622SShawn McCarney "run_rule": "is_pass2_nisqually_rule" 946*9e706622SShawn McCarney }, 947*9e706622SShawn McCarney "then": [ 948*9e706622SShawn McCarney { 949*9e706622SShawn McCarney "comments": [ 950*9e706622SShawn McCarney "Check if a card is present in slot C11" 951*9e706622SShawn McCarney ], 952*9e706622SShawn McCarney "if": { 953*9e706622SShawn McCarney "condition": { 954*9e706622SShawn McCarney "compare_presence": { 955*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot11/pcie_card11", 956*9e706622SShawn McCarney "value": true 957*9e706622SShawn McCarney } 958*9e706622SShawn McCarney }, 959*9e706622SShawn McCarney "then": [ 960*9e706622SShawn McCarney { 961*9e706622SShawn McCarney "comments": [ 962*9e706622SShawn McCarney "Check if card has Flett CCIN keyword" 963*9e706622SShawn McCarney ], 964*9e706622SShawn McCarney "compare_vpd": { 965*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot11/pcie_card11", 966*9e706622SShawn McCarney "keyword": "CCIN", 967*9e706622SShawn McCarney "value": "6B87" 968*9e706622SShawn McCarney } 969*9e706622SShawn McCarney } 970*9e706622SShawn McCarney ] 971*9e706622SShawn McCarney } 972*9e706622SShawn McCarney } 973*9e706622SShawn McCarney ] 974*9e706622SShawn McCarney } 975*9e706622SShawn McCarney } 976*9e706622SShawn McCarney ] 977*9e706622SShawn McCarney } 978*9e706622SShawn McCarney ], 979*9e706622SShawn McCarney 980*9e706622SShawn McCarney "chassis": [ 981*9e706622SShawn McCarney { 982*9e706622SShawn McCarney "comments": ["Chassis (drawer) 1"], 983*9e706622SShawn McCarney "number": 1, 984*9e706622SShawn McCarney "inventory_path": "system/chassis", 985*9e706622SShawn McCarney "devices": [ 986*9e706622SShawn McCarney { 987*9e706622SShawn McCarney "comments": [ 988*9e706622SShawn McCarney "AVDD / IR38064: Primary PMBus Interface", 989*9e706622SShawn McCarney "In schematic: bus 4 (1-based), address 0xE2 (8-bit)" 990*9e706622SShawn McCarney ], 991*9e706622SShawn McCarney "id": "avdd_regulator", 992*9e706622SShawn McCarney "is_regulator": true, 993*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 994*9e706622SShawn McCarney "i2c_interface": { "bus": 3, "address": "0x71" }, 995*9e706622SShawn McCarney "presence_detection": { 996*9e706622SShawn McCarney "rule_id": "is_pass2_nisqually_rule" 997*9e706622SShawn McCarney }, 998*9e706622SShawn McCarney "rails": [ 999*9e706622SShawn McCarney { 1000*9e706622SShawn McCarney "id": "avdd_rail", 1001*9e706622SShawn McCarney "sensor_monitoring": { 1002*9e706622SShawn McCarney "rule_id": "read_sensors_ir38064_rule" 1003*9e706622SShawn McCarney } 1004*9e706622SShawn McCarney } 1005*9e706622SShawn McCarney ] 1006*9e706622SShawn McCarney }, 1007*9e706622SShawn McCarney 1008*9e706622SShawn McCarney { 1009*9e706622SShawn McCarney "comments": [ 1010*9e706622SShawn McCarney "3.3VA / TPS549D22", 1011*9e706622SShawn McCarney "In schematic: bus 9 (1-based), address 0x36 (8-bit)", 1012*9e706622SShawn McCarney "Does not have power at standby; cannot be configured", 1013*9e706622SShawn McCarney "Does not support the PMBus PAGE command" 1014*9e706622SShawn McCarney ], 1015*9e706622SShawn McCarney "id": "3_3va_regulator", 1016*9e706622SShawn McCarney "is_regulator": true, 1017*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1018*9e706622SShawn McCarney "i2c_interface": { "bus": 8, "address": "0x1B" }, 1019*9e706622SShawn McCarney "rails": [ 1020*9e706622SShawn McCarney { 1021*9e706622SShawn McCarney "id": "3_3va_rail" 1022*9e706622SShawn McCarney } 1023*9e706622SShawn McCarney ] 1024*9e706622SShawn McCarney }, 1025*9e706622SShawn McCarney 1026*9e706622SShawn McCarney { 1027*9e706622SShawn McCarney "comments": [ 1028*9e706622SShawn McCarney "3.3VB / TPS549D22", 1029*9e706622SShawn McCarney "In schematic: bus 4 (1-based), address 0x38 (8-bit)", 1030*9e706622SShawn McCarney "Does not have power at standby; cannot be configured", 1031*9e706622SShawn McCarney "Does not support the PMBus PAGE command" 1032*9e706622SShawn McCarney ], 1033*9e706622SShawn McCarney "id": "3_3vb_regulator", 1034*9e706622SShawn McCarney "is_regulator": true, 1035*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1036*9e706622SShawn McCarney "i2c_interface": { "bus": 3, "address": "0x1C" }, 1037*9e706622SShawn McCarney "rails": [ 1038*9e706622SShawn McCarney { 1039*9e706622SShawn McCarney "id": "3_3vb_rail" 1040*9e706622SShawn McCarney } 1041*9e706622SShawn McCarney ] 1042*9e706622SShawn McCarney }, 1043*9e706622SShawn McCarney 1044*9e706622SShawn McCarney { 1045*9e706622SShawn McCarney "comments": [ 1046*9e706622SShawn McCarney "VDDp0 DCM 0 / XDPE132G5C: Primary PMBus Interface", 1047*9e706622SShawn McCarney "In schematic: bus 10 (1-based), address 0xE2 (8-bit)" 1048*9e706622SShawn McCarney ], 1049*9e706622SShawn McCarney "id": "vdd_p0_dcm0_regulator", 1050*9e706622SShawn McCarney "is_regulator": true, 1051*9e706622SShawn McCarney "fru": "system/chassis/motherboard/vdd_vrm0", 1052*9e706622SShawn McCarney "i2c_interface": { "bus": 9, "address": "0x71" }, 1053*9e706622SShawn McCarney "rails": [ 1054*9e706622SShawn McCarney { 1055*9e706622SShawn McCarney "id": "vdd_p0_dcm0_rail", 1056*9e706622SShawn McCarney "configuration": { 1057*9e706622SShawn McCarney "volts": 0.9, 1058*9e706622SShawn McCarney "rule_id": "configure_vdd_rule" 1059*9e706622SShawn McCarney }, 1060*9e706622SShawn McCarney "sensor_monitoring": { 1061*9e706622SShawn McCarney "rule_id": "read_sensors_xdpe132g5c_page0_rule" 1062*9e706622SShawn McCarney } 1063*9e706622SShawn McCarney } 1064*9e706622SShawn McCarney ] 1065*9e706622SShawn McCarney }, 1066*9e706622SShawn McCarney 1067*9e706622SShawn McCarney { 1068*9e706622SShawn McCarney "comments": [ 1069*9e706622SShawn McCarney "VDDp1 DCM 0 / XDPE132G5C: Primary PMBus Interface", 1070*9e706622SShawn McCarney "In schematic: bus 10 (1-based), address 0xE0 (8-bit)" 1071*9e706622SShawn McCarney ], 1072*9e706622SShawn McCarney "id": "vdd_p1_dcm0_regulator", 1073*9e706622SShawn McCarney "is_regulator": true, 1074*9e706622SShawn McCarney "fru": "system/chassis/motherboard/vdd_vrm0", 1075*9e706622SShawn McCarney "i2c_interface": { "bus": 9, "address": "0x70" }, 1076*9e706622SShawn McCarney "rails": [ 1077*9e706622SShawn McCarney { 1078*9e706622SShawn McCarney "id": "vdd_p1_dcm0_rail", 1079*9e706622SShawn McCarney "configuration": { 1080*9e706622SShawn McCarney "volts": 0.9, 1081*9e706622SShawn McCarney "rule_id": "configure_vdd_rule" 1082*9e706622SShawn McCarney }, 1083*9e706622SShawn McCarney "sensor_monitoring": { 1084*9e706622SShawn McCarney "rule_id": "read_sensors_xdpe132g5c_page0_rule" 1085*9e706622SShawn McCarney } 1086*9e706622SShawn McCarney } 1087*9e706622SShawn McCarney ] 1088*9e706622SShawn McCarney }, 1089*9e706622SShawn McCarney 1090*9e706622SShawn McCarney { 1091*9e706622SShawn McCarney "comments": [ 1092*9e706622SShawn McCarney "VDDp0 DCM 1 / XDPE132G5C: Primary PMBus Interface", 1093*9e706622SShawn McCarney "In schematic: bus 11 (1-based), address 0xE2 (8-bit)" 1094*9e706622SShawn McCarney ], 1095*9e706622SShawn McCarney "id": "vdd_p0_dcm1_regulator", 1096*9e706622SShawn McCarney "is_regulator": true, 1097*9e706622SShawn McCarney "fru": "system/chassis/motherboard/vdd_vrm1", 1098*9e706622SShawn McCarney "i2c_interface": { "bus": 10, "address": "0x71" }, 1099*9e706622SShawn McCarney "presence_detection": { 1100*9e706622SShawn McCarney "rule_id": "is_dcm1_vrm_present_rule" 1101*9e706622SShawn McCarney }, 1102*9e706622SShawn McCarney "rails": [ 1103*9e706622SShawn McCarney { 1104*9e706622SShawn McCarney "id": "vdd_p0_dcm1_rail", 1105*9e706622SShawn McCarney "configuration": { 1106*9e706622SShawn McCarney "volts": 0.9, 1107*9e706622SShawn McCarney "rule_id": "configure_vdd_rule" 1108*9e706622SShawn McCarney }, 1109*9e706622SShawn McCarney "sensor_monitoring": { 1110*9e706622SShawn McCarney "rule_id": "read_sensors_xdpe132g5c_page0_rule" 1111*9e706622SShawn McCarney } 1112*9e706622SShawn McCarney } 1113*9e706622SShawn McCarney ] 1114*9e706622SShawn McCarney }, 1115*9e706622SShawn McCarney 1116*9e706622SShawn McCarney { 1117*9e706622SShawn McCarney "comments": [ 1118*9e706622SShawn McCarney "VDDp1 DCM 1 / XDPE132G5C: Primary PMBus Interface", 1119*9e706622SShawn McCarney "In schematic: bus 11 (1-based), address 0xE0 (8-bit)" 1120*9e706622SShawn McCarney ], 1121*9e706622SShawn McCarney "id": "vdd_p1_dcm1_regulator", 1122*9e706622SShawn McCarney "is_regulator": true, 1123*9e706622SShawn McCarney "fru": "system/chassis/motherboard/vdd_vrm1", 1124*9e706622SShawn McCarney "i2c_interface": { "bus": 10, "address": "0x70" }, 1125*9e706622SShawn McCarney "presence_detection": { 1126*9e706622SShawn McCarney "rule_id": "is_dcm1_vrm_present_rule" 1127*9e706622SShawn McCarney }, 1128*9e706622SShawn McCarney "rails": [ 1129*9e706622SShawn McCarney { 1130*9e706622SShawn McCarney "id": "vdd_p1_dcm1_rail", 1131*9e706622SShawn McCarney "configuration": { 1132*9e706622SShawn McCarney "volts": 0.9, 1133*9e706622SShawn McCarney "rule_id": "configure_vdd_rule" 1134*9e706622SShawn McCarney }, 1135*9e706622SShawn McCarney "sensor_monitoring": { 1136*9e706622SShawn McCarney "rule_id": "read_sensors_xdpe132g5c_page0_rule" 1137*9e706622SShawn McCarney } 1138*9e706622SShawn McCarney } 1139*9e706622SShawn McCarney ] 1140*9e706622SShawn McCarney }, 1141*9e706622SShawn McCarney 1142*9e706622SShawn McCarney { 1143*9e706622SShawn McCarney "comments": [ 1144*9e706622SShawn McCarney "VDN & VCSp0 DCM 0 / IR35221: Primary PMBus Interface", 1145*9e706622SShawn McCarney "In schematic: bus 10 (1-based), address 0xE4 (8-bit)" 1146*9e706622SShawn McCarney ], 1147*9e706622SShawn McCarney "id": "vdn_vcs_p0_dcm0_regulator", 1148*9e706622SShawn McCarney "is_regulator": true, 1149*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1150*9e706622SShawn McCarney "i2c_interface": { "bus": 9, "address": "0x72" }, 1151*9e706622SShawn McCarney "rails": [ 1152*9e706622SShawn McCarney { 1153*9e706622SShawn McCarney "comments": ["PMBus PAGE 0 rail"], 1154*9e706622SShawn McCarney "id": "vdn_dcm0_rail", 1155*9e706622SShawn McCarney "configuration": { 1156*9e706622SShawn McCarney "volts": 0.9, 1157*9e706622SShawn McCarney "rule_id": "configure_vdn_rule" 1158*9e706622SShawn McCarney }, 1159*9e706622SShawn McCarney "sensor_monitoring": { 1160*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1161*9e706622SShawn McCarney } 1162*9e706622SShawn McCarney }, 1163*9e706622SShawn McCarney { 1164*9e706622SShawn McCarney "comments": ["PMBus PAGE 1 rail"], 1165*9e706622SShawn McCarney "id": "vcs_p0_dcm0_rail", 1166*9e706622SShawn McCarney "configuration": { 1167*9e706622SShawn McCarney "volts": 1.0, 1168*9e706622SShawn McCarney "rule_id": "configure_vcs_rule" 1169*9e706622SShawn McCarney }, 1170*9e706622SShawn McCarney "sensor_monitoring": { 1171*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page1_rule" 1172*9e706622SShawn McCarney } 1173*9e706622SShawn McCarney } 1174*9e706622SShawn McCarney ] 1175*9e706622SShawn McCarney }, 1176*9e706622SShawn McCarney 1177*9e706622SShawn McCarney { 1178*9e706622SShawn McCarney "comments": [ 1179*9e706622SShawn McCarney "VIO & VCSp1 DCM 0 / IR35221: Primary PMBus Interface", 1180*9e706622SShawn McCarney "In schematic: bus 10 (1-based), address 0xE6 (8-bit)" 1181*9e706622SShawn McCarney ], 1182*9e706622SShawn McCarney "id": "vio_vcs_p1_dcm0_regulator", 1183*9e706622SShawn McCarney "is_regulator": true, 1184*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1185*9e706622SShawn McCarney "i2c_interface": { "bus": 9, "address": "0x73" }, 1186*9e706622SShawn McCarney "rails": [ 1187*9e706622SShawn McCarney { 1188*9e706622SShawn McCarney "comments": ["PMBus PAGE 0 rail"], 1189*9e706622SShawn McCarney "id": "vio_dcm0_rail", 1190*9e706622SShawn McCarney "configuration": { 1191*9e706622SShawn McCarney "volts": 0.94, 1192*9e706622SShawn McCarney "rule_id": "configure_vio_rule" 1193*9e706622SShawn McCarney }, 1194*9e706622SShawn McCarney "sensor_monitoring": { 1195*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1196*9e706622SShawn McCarney } 1197*9e706622SShawn McCarney }, 1198*9e706622SShawn McCarney { 1199*9e706622SShawn McCarney "comments": ["PMBus PAGE 1 rail"], 1200*9e706622SShawn McCarney "id": "vcs_p1_dcm0_rail", 1201*9e706622SShawn McCarney "configuration": { 1202*9e706622SShawn McCarney "volts": 1.0, 1203*9e706622SShawn McCarney "rule_id": "configure_vcs_rule" 1204*9e706622SShawn McCarney }, 1205*9e706622SShawn McCarney "sensor_monitoring": { 1206*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page1_rule" 1207*9e706622SShawn McCarney } 1208*9e706622SShawn McCarney } 1209*9e706622SShawn McCarney ] 1210*9e706622SShawn McCarney }, 1211*9e706622SShawn McCarney 1212*9e706622SShawn McCarney { 1213*9e706622SShawn McCarney "comments": [ 1214*9e706622SShawn McCarney "VDN & VCSp0 DCM 1 / IR35221: Primary PMBus Interface", 1215*9e706622SShawn McCarney "In schematic: bus 11 (1-based), address 0xE4 (8-bit)" 1216*9e706622SShawn McCarney ], 1217*9e706622SShawn McCarney "id": "vdn_vcs_p0_dcm1_regulator", 1218*9e706622SShawn McCarney "is_regulator": true, 1219*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1220*9e706622SShawn McCarney "i2c_interface": { "bus": 10, "address": "0x72" }, 1221*9e706622SShawn McCarney "presence_detection": { "rule_id": "is_2s_system_rule" }, 1222*9e706622SShawn McCarney "rails": [ 1223*9e706622SShawn McCarney { 1224*9e706622SShawn McCarney "comments": ["PMBus PAGE 0 rail"], 1225*9e706622SShawn McCarney "id": "vdn_dcm1_rail", 1226*9e706622SShawn McCarney "configuration": { 1227*9e706622SShawn McCarney "volts": 0.9, 1228*9e706622SShawn McCarney "rule_id": "configure_vdn_rule" 1229*9e706622SShawn McCarney }, 1230*9e706622SShawn McCarney "sensor_monitoring": { 1231*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1232*9e706622SShawn McCarney } 1233*9e706622SShawn McCarney }, 1234*9e706622SShawn McCarney { 1235*9e706622SShawn McCarney "comments": ["PMBus PAGE 1 rail"], 1236*9e706622SShawn McCarney "id": "vcs_p0_dcm1_rail", 1237*9e706622SShawn McCarney "configuration": { 1238*9e706622SShawn McCarney "volts": 1.0, 1239*9e706622SShawn McCarney "rule_id": "configure_vcs_rule" 1240*9e706622SShawn McCarney }, 1241*9e706622SShawn McCarney "sensor_monitoring": { 1242*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page1_rule" 1243*9e706622SShawn McCarney } 1244*9e706622SShawn McCarney } 1245*9e706622SShawn McCarney ] 1246*9e706622SShawn McCarney }, 1247*9e706622SShawn McCarney 1248*9e706622SShawn McCarney { 1249*9e706622SShawn McCarney "comments": [ 1250*9e706622SShawn McCarney "VIO & VCSp1 DCM 1 / IR35221: Primary PMBus Interface", 1251*9e706622SShawn McCarney "In schematic: bus 11 (1-based), address 0xE6 (8-bit)" 1252*9e706622SShawn McCarney ], 1253*9e706622SShawn McCarney "id": "vio_vcs_p1_dcm1_regulator", 1254*9e706622SShawn McCarney "is_regulator": true, 1255*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1256*9e706622SShawn McCarney "i2c_interface": { "bus": 10, "address": "0x73" }, 1257*9e706622SShawn McCarney "presence_detection": { "rule_id": "is_2s_system_rule" }, 1258*9e706622SShawn McCarney "rails": [ 1259*9e706622SShawn McCarney { 1260*9e706622SShawn McCarney "comments": ["PMBus PAGE 0 rail"], 1261*9e706622SShawn McCarney "id": "vio_dcm1_rail", 1262*9e706622SShawn McCarney "configuration": { 1263*9e706622SShawn McCarney "volts": 0.94, 1264*9e706622SShawn McCarney "rule_id": "configure_vio_rule" 1265*9e706622SShawn McCarney }, 1266*9e706622SShawn McCarney "sensor_monitoring": { 1267*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1268*9e706622SShawn McCarney } 1269*9e706622SShawn McCarney }, 1270*9e706622SShawn McCarney { 1271*9e706622SShawn McCarney "comments": ["PMBus PAGE 1 rail"], 1272*9e706622SShawn McCarney "id": "vcs_p1_dcm1_rail", 1273*9e706622SShawn McCarney "configuration": { 1274*9e706622SShawn McCarney "volts": 1.0, 1275*9e706622SShawn McCarney "rule_id": "configure_vcs_rule" 1276*9e706622SShawn McCarney }, 1277*9e706622SShawn McCarney "sensor_monitoring": { 1278*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page1_rule" 1279*9e706622SShawn McCarney } 1280*9e706622SShawn McCarney } 1281*9e706622SShawn McCarney ] 1282*9e706622SShawn McCarney }, 1283*9e706622SShawn McCarney 1284*9e706622SShawn McCarney { 1285*9e706622SShawn McCarney "comments": [ 1286*9e706622SShawn McCarney "VPCIe DCM 0 / IR35221: Primary PMBus Interface", 1287*9e706622SShawn McCarney "In schematic: bus 10 (1-based), address 0xE8 (8-bit)" 1288*9e706622SShawn McCarney ], 1289*9e706622SShawn McCarney "id": "vpcie_dcm0_regulator", 1290*9e706622SShawn McCarney "is_regulator": true, 1291*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1292*9e706622SShawn McCarney "i2c_interface": { "bus": 9, "address": "0x74" }, 1293*9e706622SShawn McCarney "rails": [ 1294*9e706622SShawn McCarney { 1295*9e706622SShawn McCarney "id": "vpcie_dcm0_rail", 1296*9e706622SShawn McCarney "configuration": { 1297*9e706622SShawn McCarney "volts": 0.86, 1298*9e706622SShawn McCarney "rule_id": "configure_vpcie_rule" 1299*9e706622SShawn McCarney }, 1300*9e706622SShawn McCarney "sensor_monitoring": { 1301*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1302*9e706622SShawn McCarney } 1303*9e706622SShawn McCarney } 1304*9e706622SShawn McCarney ] 1305*9e706622SShawn McCarney }, 1306*9e706622SShawn McCarney 1307*9e706622SShawn McCarney { 1308*9e706622SShawn McCarney "comments": [ 1309*9e706622SShawn McCarney "VPCIe DCM 1 / IR35221: Primary PMBus Interface", 1310*9e706622SShawn McCarney "In schematic: bus 11 (1-based), address 0xE8 (8-bit)" 1311*9e706622SShawn McCarney ], 1312*9e706622SShawn McCarney "id": "vpcie_dcm1_regulator", 1313*9e706622SShawn McCarney "is_regulator": true, 1314*9e706622SShawn McCarney "fru": "system/chassis/motherboard", 1315*9e706622SShawn McCarney "i2c_interface": { "bus": 10, "address": "0x74" }, 1316*9e706622SShawn McCarney "presence_detection": { "rule_id": "is_2s_system_rule" }, 1317*9e706622SShawn McCarney "rails": [ 1318*9e706622SShawn McCarney { 1319*9e706622SShawn McCarney "id": "vpcie_dcm1_rail", 1320*9e706622SShawn McCarney "configuration": { 1321*9e706622SShawn McCarney "volts": 0.86, 1322*9e706622SShawn McCarney "rule_id": "configure_vpcie_rule" 1323*9e706622SShawn McCarney }, 1324*9e706622SShawn McCarney "sensor_monitoring": { 1325*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1326*9e706622SShawn McCarney } 1327*9e706622SShawn McCarney } 1328*9e706622SShawn McCarney ] 1329*9e706622SShawn McCarney }, 1330*9e706622SShawn McCarney 1331*9e706622SShawn McCarney { 1332*9e706622SShawn McCarney "comments": [ 1333*9e706622SShawn McCarney "Flett Slot C8 / IR35221: Primary PMBus Interface", 1334*9e706622SShawn McCarney "In schematic: bus 7 (1-based) mux channel 3,", 1335*9e706622SShawn McCarney "address 0xEC (8-bit).", 1336*9e706622SShawn McCarney "BMC I2C bus alias 28" 1337*9e706622SShawn McCarney ], 1338*9e706622SShawn McCarney "id": "flett_slot_c8_regulator", 1339*9e706622SShawn McCarney "is_regulator": true, 1340*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot8/pcie_card8", 1341*9e706622SShawn McCarney "i2c_interface": { "bus": 28, "address": "0x76" }, 1342*9e706622SShawn McCarney "presence_detection": { 1343*9e706622SShawn McCarney "rule_id": "is_flett_c8_present_rule" 1344*9e706622SShawn McCarney }, 1345*9e706622SShawn McCarney "rails": [ 1346*9e706622SShawn McCarney { 1347*9e706622SShawn McCarney "id": "flett_slot_c8_rail", 1348*9e706622SShawn McCarney "sensor_monitoring": { 1349*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1350*9e706622SShawn McCarney } 1351*9e706622SShawn McCarney } 1352*9e706622SShawn McCarney ] 1353*9e706622SShawn McCarney }, 1354*9e706622SShawn McCarney 1355*9e706622SShawn McCarney { 1356*9e706622SShawn McCarney "comments": [ 1357*9e706622SShawn McCarney "Flett Slot C9 / IR35221: Primary PMBus Interface", 1358*9e706622SShawn McCarney "In schematic: bus 7 (1-based) mux channel 2,", 1359*9e706622SShawn McCarney "address 0xEC (8-bit).", 1360*9e706622SShawn McCarney "BMC I2C bus alias 27" 1361*9e706622SShawn McCarney ], 1362*9e706622SShawn McCarney "id": "flett_slot_c9_regulator", 1363*9e706622SShawn McCarney "is_regulator": true, 1364*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot9/pcie_card9", 1365*9e706622SShawn McCarney "i2c_interface": { "bus": 27, "address": "0x76" }, 1366*9e706622SShawn McCarney "presence_detection": { 1367*9e706622SShawn McCarney "rule_id": "is_flett_c9_present_rule" 1368*9e706622SShawn McCarney }, 1369*9e706622SShawn McCarney "rails": [ 1370*9e706622SShawn McCarney { 1371*9e706622SShawn McCarney "id": "flett_slot_c9_rail", 1372*9e706622SShawn McCarney "sensor_monitoring": { 1373*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1374*9e706622SShawn McCarney } 1375*9e706622SShawn McCarney } 1376*9e706622SShawn McCarney ] 1377*9e706622SShawn McCarney }, 1378*9e706622SShawn McCarney 1379*9e706622SShawn McCarney { 1380*9e706622SShawn McCarney "comments": [ 1381*9e706622SShawn McCarney "Flett Slot C11 / IR35221: Primary PMBus Interface", 1382*9e706622SShawn McCarney "In schematic: bus 12 (1-based) mux channel 1,", 1383*9e706622SShawn McCarney "address 0xEC (8-bit).", 1384*9e706622SShawn McCarney "BMC I2C bus alias 30" 1385*9e706622SShawn McCarney ], 1386*9e706622SShawn McCarney "id": "flett_slot_c11_regulator", 1387*9e706622SShawn McCarney "is_regulator": true, 1388*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot11/pcie_card11", 1389*9e706622SShawn McCarney "i2c_interface": { "bus": 30, "address": "0x76" }, 1390*9e706622SShawn McCarney "presence_detection": { 1391*9e706622SShawn McCarney "rule_id": "is_flett_c11_present_rule" 1392*9e706622SShawn McCarney }, 1393*9e706622SShawn McCarney "rails": [ 1394*9e706622SShawn McCarney { 1395*9e706622SShawn McCarney "id": "flett_slot_c11_rail", 1396*9e706622SShawn McCarney "sensor_monitoring": { 1397*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1398*9e706622SShawn McCarney } 1399*9e706622SShawn McCarney } 1400*9e706622SShawn McCarney ] 1401*9e706622SShawn McCarney }, 1402*9e706622SShawn McCarney 1403*9e706622SShawn McCarney { 1404*9e706622SShawn McCarney "comments": [ 1405*9e706622SShawn McCarney "Flett Slot C10 / IR35221: Primary PMBus Interface", 1406*9e706622SShawn McCarney "In schematic: bus 12 (1-based) mux channel 0,", 1407*9e706622SShawn McCarney "address 0xEC (8-bit).", 1408*9e706622SShawn McCarney "BMC I2C bus alias 29" 1409*9e706622SShawn McCarney ], 1410*9e706622SShawn McCarney "id": "flett_slot_c10_regulator", 1411*9e706622SShawn McCarney "is_regulator": true, 1412*9e706622SShawn McCarney "fru": "system/chassis/motherboard/pcieslot10/pcie_card10", 1413*9e706622SShawn McCarney "i2c_interface": { "bus": 29, "address": "0x76" }, 1414*9e706622SShawn McCarney "presence_detection": { 1415*9e706622SShawn McCarney "rule_id": "is_flett_c10_present_rule" 1416*9e706622SShawn McCarney }, 1417*9e706622SShawn McCarney "rails": [ 1418*9e706622SShawn McCarney { 1419*9e706622SShawn McCarney "id": "flett_slot_c10_rail", 1420*9e706622SShawn McCarney "sensor_monitoring": { 1421*9e706622SShawn McCarney "rule_id": "read_sensors_ir35221_page0_rule" 1422*9e706622SShawn McCarney } 1423*9e706622SShawn McCarney } 1424*9e706622SShawn McCarney ] 1425*9e706622SShawn McCarney } 1426*9e706622SShawn McCarney ] 1427*9e706622SShawn McCarney } 1428*9e706622SShawn McCarney ] 1429*9e706622SShawn McCarney} 1430