1*cee2e20aSShawn McCarney{
2*cee2e20aSShawn McCarney    "comments": [
3*cee2e20aSShawn McCarney        "phosphor-regulators configuration file for IBM Rainier systems"
4*cee2e20aSShawn McCarney    ],
5*cee2e20aSShawn McCarney
6*cee2e20aSShawn McCarney    "rules": [
7*cee2e20aSShawn McCarney        {
8*cee2e20aSShawn McCarney            "comments": ["Rule to set PMBus PAGE to 0"],
9*cee2e20aSShawn McCarney            "id": "set_page0_rule",
10*cee2e20aSShawn McCarney            "actions": [
11*cee2e20aSShawn McCarney                { "i2c_write_byte": { "register": "0x00", "value": "0x00" } }
12*cee2e20aSShawn McCarney            ]
13*cee2e20aSShawn McCarney        },
14*cee2e20aSShawn McCarney
15*cee2e20aSShawn McCarney        {
16*cee2e20aSShawn McCarney            "comments": ["Rule to set PMBus PAGE to 1"],
17*cee2e20aSShawn McCarney            "id": "set_page1_rule",
18*cee2e20aSShawn McCarney            "actions": [
19*cee2e20aSShawn McCarney                { "i2c_write_byte": { "register": "0x00", "value": "0x01" } }
20*cee2e20aSShawn McCarney            ]
21*cee2e20aSShawn McCarney        },
22*cee2e20aSShawn McCarney
23*cee2e20aSShawn McCarney        {
24*cee2e20aSShawn McCarney            "comments": ["Rule to set output voltage of a PMBus regulator"],
25*cee2e20aSShawn McCarney            "id": "set_voltage_rule",
26*cee2e20aSShawn McCarney            "actions": [
27*cee2e20aSShawn McCarney                {
28*cee2e20aSShawn McCarney                    "comments": [
29*cee2e20aSShawn McCarney                        "Write volts value to VOUT_COMMAND in linear format.",
30*cee2e20aSShawn McCarney                        "Get volts value from configuration.  Get exponent",
31*cee2e20aSShawn McCarney                        "from VOUT_MODE.  Verify write was successful."
32*cee2e20aSShawn McCarney                    ],
33*cee2e20aSShawn McCarney                    "pmbus_write_vout_command": {
34*cee2e20aSShawn McCarney                        "format": "linear",
35*cee2e20aSShawn McCarney                        "is_verified": true
36*cee2e20aSShawn McCarney                    }
37*cee2e20aSShawn McCarney                }
38*cee2e20aSShawn McCarney            ]
39*cee2e20aSShawn McCarney        },
40*cee2e20aSShawn McCarney
41*cee2e20aSShawn McCarney        {
42*cee2e20aSShawn McCarney            "comments": [
43*cee2e20aSShawn McCarney                "Rule to set output voltage of PAGE 0 of a PMBus regulator"
44*cee2e20aSShawn McCarney            ],
45*cee2e20aSShawn McCarney            "id": "set_voltage_page0_rule",
46*cee2e20aSShawn McCarney            "actions": [
47*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
48*cee2e20aSShawn McCarney                { "run_rule": "set_voltage_rule" }
49*cee2e20aSShawn McCarney            ]
50*cee2e20aSShawn McCarney        },
51*cee2e20aSShawn McCarney
52*cee2e20aSShawn McCarney        {
53*cee2e20aSShawn McCarney            "comments": [
54*cee2e20aSShawn McCarney                "Rule to set output voltage of PAGE 1 of a PMBus regulator"
55*cee2e20aSShawn McCarney            ],
56*cee2e20aSShawn McCarney            "id": "set_voltage_page1_rule",
57*cee2e20aSShawn McCarney            "actions": [
58*cee2e20aSShawn McCarney                { "run_rule": "set_page1_rule" },
59*cee2e20aSShawn McCarney                { "run_rule": "set_voltage_rule" }
60*cee2e20aSShawn McCarney            ]
61*cee2e20aSShawn McCarney        },
62*cee2e20aSShawn McCarney
63*cee2e20aSShawn McCarney        {
64*cee2e20aSShawn McCarney            "comments": [
65*cee2e20aSShawn McCarney                "Rule to set output voltage of a PMBus regulator using",
66*cee2e20aSShawn McCarney                "PMBus OPERATION and VOUT_COMMAND"
67*cee2e20aSShawn McCarney            ],
68*cee2e20aSShawn McCarney            "id": "set_operation_and_voltage_rule",
69*cee2e20aSShawn McCarney            "actions": [
70*cee2e20aSShawn McCarney                {
71*cee2e20aSShawn McCarney                    "comments": [
72*cee2e20aSShawn McCarney                        "Set PMBus OPERATION to 0x80 indicating output voltage",
73*cee2e20aSShawn McCarney                        "is set by the PMBus VOUT_COMMAND"
74*cee2e20aSShawn McCarney                    ],
75*cee2e20aSShawn McCarney                    "i2c_write_byte": { "register": "0x01", "value": "0x80" }
76*cee2e20aSShawn McCarney                },
77*cee2e20aSShawn McCarney
78*cee2e20aSShawn McCarney                {
79*cee2e20aSShawn McCarney                    "comments": [
80*cee2e20aSShawn McCarney                        "Set the output voltage using the PMBus VOUT_COMMAND"
81*cee2e20aSShawn McCarney                    ],
82*cee2e20aSShawn McCarney                    "run_rule": "set_voltage_rule"
83*cee2e20aSShawn McCarney                },
84*cee2e20aSShawn McCarney
85*cee2e20aSShawn McCarney                {
86*cee2e20aSShawn McCarney                    "comments": [
87*cee2e20aSShawn McCarney                        "Set PMBus OPERATION to 0xB0 indicating output voltage",
88*cee2e20aSShawn McCarney                        "will now be set by AVSBus (AVS_VOUT_COMMAND).",
89*cee2e20aSShawn McCarney                        "Hardware settings cause the VOUT_COMMAND value to be",
90*cee2e20aSShawn McCarney                        "the initial voltage value for AVSBus."
91*cee2e20aSShawn McCarney                    ],
92*cee2e20aSShawn McCarney                    "i2c_write_byte": { "register": "0x01", "value": "0xB0" }
93*cee2e20aSShawn McCarney                }
94*cee2e20aSShawn McCarney            ]
95*cee2e20aSShawn McCarney        },
96*cee2e20aSShawn McCarney
97*cee2e20aSShawn McCarney        {
98*cee2e20aSShawn McCarney            "comments": [
99*cee2e20aSShawn McCarney                "Rule to set IOUT_OC_WARN_LIMIT for a PMBus regulator"
100*cee2e20aSShawn McCarney            ],
101*cee2e20aSShawn McCarney            "id": "set_iout_oc_warn_limit_rule",
102*cee2e20aSShawn McCarney            "actions": [
103*cee2e20aSShawn McCarney                {
104*cee2e20aSShawn McCarney                    "comments": [
105*cee2e20aSShawn McCarney                        "Set PMBus IOUT_OC_WARN_LIMIT to 326A to ensure OCW",
106*cee2e20aSShawn McCarney                        "asserts at the roll-over bug identified in the",
107*cee2e20aSShawn McCarney                        "silicon.  326A = 0x08A3.  PMBus requires",
108*cee2e20aSShawn McCarney                        "the low order byte to be written first."
109*cee2e20aSShawn McCarney                    ],
110*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
111*cee2e20aSShawn McCarney                        "register": "0x4A",
112*cee2e20aSShawn McCarney                        "values": ["0xA3", "0x08"]
113*cee2e20aSShawn McCarney                    }
114*cee2e20aSShawn McCarney                }
115*cee2e20aSShawn McCarney            ]
116*cee2e20aSShawn McCarney        },
117*cee2e20aSShawn McCarney
118*cee2e20aSShawn McCarney        {
119*cee2e20aSShawn McCarney            "comments": [
120*cee2e20aSShawn McCarney                "Rule to configure a VDD rail using the PMBus interface"
121*cee2e20aSShawn McCarney            ],
122*cee2e20aSShawn McCarney            "id": "configure_vdd_rule",
123*cee2e20aSShawn McCarney            "actions": [
124*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
125*cee2e20aSShawn McCarney                { "run_rule": "set_iout_oc_warn_limit_rule" },
126*cee2e20aSShawn McCarney                {
127*cee2e20aSShawn McCarney                    "comments": [
128*cee2e20aSShawn McCarney                        "Set VOUT_MODE to exponent of -9 for VDD regulator",
129*cee2e20aSShawn McCarney                        "to support older and newer hardware."
130*cee2e20aSShawn McCarney                    ],
131*cee2e20aSShawn McCarney                    "i2c_write_byte": { "register": "0x20", "value": "0x17" }
132*cee2e20aSShawn McCarney                },
133*cee2e20aSShawn McCarney                { "run_rule": "set_operation_and_voltage_rule" },
134*cee2e20aSShawn McCarney                {
135*cee2e20aSShawn McCarney                    "comments": [
136*cee2e20aSShawn McCarney                        "Set VOUT_MIN to 0V since for VDD the voltage",
137*cee2e20aSShawn McCarney                        "can go down to 0.5V so we want to lower this",
138*cee2e20aSShawn McCarney                        "limit below 0.5V so the regulator does not trip."
139*cee2e20aSShawn McCarney                    ],
140*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
141*cee2e20aSShawn McCarney                        "register": "0x2B",
142*cee2e20aSShawn McCarney                        "values": ["0x00", "0x00"]
143*cee2e20aSShawn McCarney                    }
144*cee2e20aSShawn McCarney                },
145*cee2e20aSShawn McCarney                {
146*cee2e20aSShawn McCarney                    "comments": [
147*cee2e20aSShawn McCarney                        "Set VOUT_MAX to 1.255V since for VDD the voltage",
148*cee2e20aSShawn McCarney                        "can go up to 1.1V so we want to raise this",
149*cee2e20aSShawn McCarney                        "limit above 1.1V so the regulator does not trip."
150*cee2e20aSShawn McCarney                    ],
151*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
152*cee2e20aSShawn McCarney                        "register": "0x24",
153*cee2e20aSShawn McCarney                        "values": ["0x83", "0x02"]
154*cee2e20aSShawn McCarney                    }
155*cee2e20aSShawn McCarney                },
156*cee2e20aSShawn McCarney                {
157*cee2e20aSShawn McCarney                    "comments": [
158*cee2e20aSShawn McCarney                        "Set POWER_GOOD_ON for VDD to a value of 0.5V."
159*cee2e20aSShawn McCarney                    ],
160*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
161*cee2e20aSShawn McCarney                        "register": "0x5E",
162*cee2e20aSShawn McCarney                        "values": ["0x00", "0x01"]
163*cee2e20aSShawn McCarney                    }
164*cee2e20aSShawn McCarney                },
165*cee2e20aSShawn McCarney                {
166*cee2e20aSShawn McCarney                    "comments": [
167*cee2e20aSShawn McCarney                        "Set POWER_GOOD_OFF for VDD to a value of 0.4V."
168*cee2e20aSShawn McCarney                    ],
169*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
170*cee2e20aSShawn McCarney                        "register": "0x5F",
171*cee2e20aSShawn McCarney                        "values": ["0xCD", "0x00"]
172*cee2e20aSShawn McCarney                    }
173*cee2e20aSShawn McCarney                },
174*cee2e20aSShawn McCarney                {
175*cee2e20aSShawn McCarney                    "comments": [
176*cee2e20aSShawn McCarney                        "Set VOUT_OV_WARN_LIMIT for VDD to a value of 1.30V."
177*cee2e20aSShawn McCarney                    ],
178*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
179*cee2e20aSShawn McCarney                        "register": "0x42",
180*cee2e20aSShawn McCarney                        "values": ["0x9A", "0x02"]
181*cee2e20aSShawn McCarney                    }
182*cee2e20aSShawn McCarney                },
183*cee2e20aSShawn McCarney                {
184*cee2e20aSShawn McCarney                    "comments": [
185*cee2e20aSShawn McCarney                        "Set VOUT_UV_WARN_LIMIT for VDD to a value of 0.45V."
186*cee2e20aSShawn McCarney                    ],
187*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
188*cee2e20aSShawn McCarney                        "register": "0x43",
189*cee2e20aSShawn McCarney                        "values": ["0xE6", "0x00"]
190*cee2e20aSShawn McCarney                    }
191*cee2e20aSShawn McCarney                },
192*cee2e20aSShawn McCarney                {
193*cee2e20aSShawn McCarney                    "comments": [
194*cee2e20aSShawn McCarney                        "Set TOFF_FALL time for VDD to a value of 10ms."
195*cee2e20aSShawn McCarney                    ],
196*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
197*cee2e20aSShawn McCarney                        "register": "0x65",
198*cee2e20aSShawn McCarney                        "values": ["0x28", "0xF0"]
199*cee2e20aSShawn McCarney                    }
200*cee2e20aSShawn McCarney                },
201*cee2e20aSShawn McCarney                {
202*cee2e20aSShawn McCarney                    "comments": [
203*cee2e20aSShawn McCarney                        "Set IOUT_OC_FAULT_RESPONSE for VDD to shutdown."
204*cee2e20aSShawn McCarney                    ],
205*cee2e20aSShawn McCarney                    "i2c_write_byte": { "register": "0x47", "value": "0xC0" }
206*cee2e20aSShawn McCarney                }
207*cee2e20aSShawn McCarney            ]
208*cee2e20aSShawn McCarney        },
209*cee2e20aSShawn McCarney
210*cee2e20aSShawn McCarney        {
211*cee2e20aSShawn McCarney            "comments": [
212*cee2e20aSShawn McCarney                "Rule to configure a VDN rail using the PMBus interface"
213*cee2e20aSShawn McCarney            ],
214*cee2e20aSShawn McCarney            "id": "configure_vdn_rule",
215*cee2e20aSShawn McCarney            "actions": [
216*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
217*cee2e20aSShawn McCarney                { "run_rule": "set_operation_and_voltage_rule" },
218*cee2e20aSShawn McCarney                {
219*cee2e20aSShawn McCarney                    "comments": [
220*cee2e20aSShawn McCarney                        "Set VOUT_MIN to 0V since for VDN the voltage",
221*cee2e20aSShawn McCarney                        "can go down to 0.6V so we want to lower this",
222*cee2e20aSShawn McCarney                        "limit below 0.6V so the regulator does not trip."
223*cee2e20aSShawn McCarney                    ],
224*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
225*cee2e20aSShawn McCarney                        "register": "0x2B",
226*cee2e20aSShawn McCarney                        "values": ["0x00", "0x00"]
227*cee2e20aSShawn McCarney                    }
228*cee2e20aSShawn McCarney                },
229*cee2e20aSShawn McCarney                {
230*cee2e20aSShawn McCarney                    "comments": [
231*cee2e20aSShawn McCarney                        "Set VOUT_MAX to 1.1V since for VDN the voltage",
232*cee2e20aSShawn McCarney                        "can go up to 1.0V so we want to raise this",
233*cee2e20aSShawn McCarney                        "limit above 1.0V so the regulator does not trip."
234*cee2e20aSShawn McCarney                    ],
235*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
236*cee2e20aSShawn McCarney                        "register": "0x24",
237*cee2e20aSShawn McCarney                        "values": ["0x33", "0x02"]
238*cee2e20aSShawn McCarney                    }
239*cee2e20aSShawn McCarney                },
240*cee2e20aSShawn McCarney                {
241*cee2e20aSShawn McCarney                    "comments": [
242*cee2e20aSShawn McCarney                        "Set POWER_GOOD_ON for VDN to a value of 0.45V."
243*cee2e20aSShawn McCarney                    ],
244*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
245*cee2e20aSShawn McCarney                        "register": "0x5E",
246*cee2e20aSShawn McCarney                        "values": ["0xE6", "0x00"]
247*cee2e20aSShawn McCarney                    }
248*cee2e20aSShawn McCarney                },
249*cee2e20aSShawn McCarney                {
250*cee2e20aSShawn McCarney                    "comments": [
251*cee2e20aSShawn McCarney                        "Set POWER_GOOD_OFF for VDN to a value of 0.40V."
252*cee2e20aSShawn McCarney                    ],
253*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
254*cee2e20aSShawn McCarney                        "register": "0x5F",
255*cee2e20aSShawn McCarney                        "values": ["0xCC", "0x00"]
256*cee2e20aSShawn McCarney                    }
257*cee2e20aSShawn McCarney                }
258*cee2e20aSShawn McCarney            ]
259*cee2e20aSShawn McCarney        },
260*cee2e20aSShawn McCarney
261*cee2e20aSShawn McCarney        {
262*cee2e20aSShawn McCarney            "comments": [
263*cee2e20aSShawn McCarney                "Rule to configure a VCS rail using the PMBus interface"
264*cee2e20aSShawn McCarney            ],
265*cee2e20aSShawn McCarney            "id": "configure_vcs_rule",
266*cee2e20aSShawn McCarney            "actions": [
267*cee2e20aSShawn McCarney                { "run_rule": "set_page1_rule" },
268*cee2e20aSShawn McCarney                { "run_rule": "set_operation_and_voltage_rule" },
269*cee2e20aSShawn McCarney                {
270*cee2e20aSShawn McCarney                    "comments": [
271*cee2e20aSShawn McCarney                        "Set VOUT_MIN to 0V since for VCS the voltage",
272*cee2e20aSShawn McCarney                        "can go down to 0.7V so we want to lower this",
273*cee2e20aSShawn McCarney                        "limit below 0.7V so the regulator does not trip."
274*cee2e20aSShawn McCarney                    ],
275*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
276*cee2e20aSShawn McCarney                        "register": "0x2B",
277*cee2e20aSShawn McCarney                        "values": ["0x00", "0x00"]
278*cee2e20aSShawn McCarney                    }
279*cee2e20aSShawn McCarney                },
280*cee2e20aSShawn McCarney                {
281*cee2e20aSShawn McCarney                    "comments": [
282*cee2e20aSShawn McCarney                        "Set VOUT_MAX to 1.2V since for VCS the voltage",
283*cee2e20aSShawn McCarney                        "can go up to 1.1V so we want to raise this",
284*cee2e20aSShawn McCarney                        "limit above 1.1V so the regulator does not trip."
285*cee2e20aSShawn McCarney                    ],
286*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
287*cee2e20aSShawn McCarney                        "register": "0x24",
288*cee2e20aSShawn McCarney                        "values": ["0x66", "0x02"]
289*cee2e20aSShawn McCarney                    }
290*cee2e20aSShawn McCarney                },
291*cee2e20aSShawn McCarney                {
292*cee2e20aSShawn McCarney                    "comments": [
293*cee2e20aSShawn McCarney                        "Set POWER_GOOD_ON for VCS to a value of 0.55V."
294*cee2e20aSShawn McCarney                    ],
295*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
296*cee2e20aSShawn McCarney                        "register": "0x5E",
297*cee2e20aSShawn McCarney                        "values": ["0x19", "0x01"]
298*cee2e20aSShawn McCarney                    }
299*cee2e20aSShawn McCarney                },
300*cee2e20aSShawn McCarney                {
301*cee2e20aSShawn McCarney                    "comments": [
302*cee2e20aSShawn McCarney                        "Set POWER_GOOD_OFF for VCS to a value of 0.50V."
303*cee2e20aSShawn McCarney                    ],
304*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
305*cee2e20aSShawn McCarney                        "register": "0x5F",
306*cee2e20aSShawn McCarney                        "values": ["0x00", "0x01"]
307*cee2e20aSShawn McCarney                    }
308*cee2e20aSShawn McCarney                }
309*cee2e20aSShawn McCarney            ]
310*cee2e20aSShawn McCarney        },
311*cee2e20aSShawn McCarney
312*cee2e20aSShawn McCarney        {
313*cee2e20aSShawn McCarney            "comments": [
314*cee2e20aSShawn McCarney                "Rule to configure a VIO rail using the PMBus interface"
315*cee2e20aSShawn McCarney            ],
316*cee2e20aSShawn McCarney            "id": "configure_vio_rule",
317*cee2e20aSShawn McCarney            "actions": [
318*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
319*cee2e20aSShawn McCarney                { "run_rule": "set_operation_and_voltage_rule" },
320*cee2e20aSShawn McCarney                {
321*cee2e20aSShawn McCarney                    "comments": [
322*cee2e20aSShawn McCarney                        "Set VOUT_MIN to 0V since for VIO the voltage",
323*cee2e20aSShawn McCarney                        "can go down to 0.8V so we want to lower this",
324*cee2e20aSShawn McCarney                        "limit below 0.8V so the regulator does not trip."
325*cee2e20aSShawn McCarney                    ],
326*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
327*cee2e20aSShawn McCarney                        "register": "0x2B",
328*cee2e20aSShawn McCarney                        "values": ["0x00", "0x00"]
329*cee2e20aSShawn McCarney                    }
330*cee2e20aSShawn McCarney                },
331*cee2e20aSShawn McCarney                {
332*cee2e20aSShawn McCarney                    "comments": [
333*cee2e20aSShawn McCarney                        "Set VOUT_MAX to 1.1V since for VIO the voltage",
334*cee2e20aSShawn McCarney                        "can go up to 1.0V so we want to raise this",
335*cee2e20aSShawn McCarney                        "limit above 1.0V so the regulator does not trip."
336*cee2e20aSShawn McCarney                    ],
337*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
338*cee2e20aSShawn McCarney                        "register": "0x24",
339*cee2e20aSShawn McCarney                        "values": ["0x33", "0x02"]
340*cee2e20aSShawn McCarney                    }
341*cee2e20aSShawn McCarney                },
342*cee2e20aSShawn McCarney                {
343*cee2e20aSShawn McCarney                    "comments": [
344*cee2e20aSShawn McCarney                        "Set POWER_GOOD_ON for VIO to a value of 0.55V."
345*cee2e20aSShawn McCarney                    ],
346*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
347*cee2e20aSShawn McCarney                        "register": "0x5E",
348*cee2e20aSShawn McCarney                        "values": ["0x19", "0x01"]
349*cee2e20aSShawn McCarney                    }
350*cee2e20aSShawn McCarney                },
351*cee2e20aSShawn McCarney                {
352*cee2e20aSShawn McCarney                    "comments": [
353*cee2e20aSShawn McCarney                        "Set POWER_GOOD_OFF for VIO to a value of 0.50V."
354*cee2e20aSShawn McCarney                    ],
355*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
356*cee2e20aSShawn McCarney                        "register": "0x5F",
357*cee2e20aSShawn McCarney                        "values": ["0x00", "0x01"]
358*cee2e20aSShawn McCarney                    }
359*cee2e20aSShawn McCarney                }
360*cee2e20aSShawn McCarney            ]
361*cee2e20aSShawn McCarney        },
362*cee2e20aSShawn McCarney
363*cee2e20aSShawn McCarney        {
364*cee2e20aSShawn McCarney            "comments": [
365*cee2e20aSShawn McCarney                "Rule to configure a VPCIE rail using the PMBus interface"
366*cee2e20aSShawn McCarney            ],
367*cee2e20aSShawn McCarney            "id": "configure_vpcie_rule",
368*cee2e20aSShawn McCarney            "actions": [
369*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
370*cee2e20aSShawn McCarney                { "run_rule": "set_voltage_rule" },
371*cee2e20aSShawn McCarney                {
372*cee2e20aSShawn McCarney                    "comments": [
373*cee2e20aSShawn McCarney                        "Set VOUT_MIN to 0V since for VPCIE the voltage",
374*cee2e20aSShawn McCarney                        "can go down to 0.81V so we want to lower this",
375*cee2e20aSShawn McCarney                        "limit below 0.81V so the regulator does not trip."
376*cee2e20aSShawn McCarney                    ],
377*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
378*cee2e20aSShawn McCarney                        "register": "0x2B",
379*cee2e20aSShawn McCarney                        "values": ["0x00", "0x00"]
380*cee2e20aSShawn McCarney                    }
381*cee2e20aSShawn McCarney                },
382*cee2e20aSShawn McCarney                {
383*cee2e20aSShawn McCarney                    "comments": [
384*cee2e20aSShawn McCarney                        "Set VOUT_MAX to 1.0V since for VPCIE the voltage",
385*cee2e20aSShawn McCarney                        "can go up to 0.91V so we want to raise this",
386*cee2e20aSShawn McCarney                        "limit above 0.91V so the regulator does not trip."
387*cee2e20aSShawn McCarney                    ],
388*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
389*cee2e20aSShawn McCarney                        "register": "0x24",
390*cee2e20aSShawn McCarney                        "values": ["0x00", "0x02"]
391*cee2e20aSShawn McCarney                    }
392*cee2e20aSShawn McCarney                },
393*cee2e20aSShawn McCarney                {
394*cee2e20aSShawn McCarney                    "comments": [
395*cee2e20aSShawn McCarney                        "Set POWER_GOOD_ON for VPCIE to a value of 0.65V."
396*cee2e20aSShawn McCarney                    ],
397*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
398*cee2e20aSShawn McCarney                        "register": "0x5E",
399*cee2e20aSShawn McCarney                        "values": ["0x4C", "0x01"]
400*cee2e20aSShawn McCarney                    }
401*cee2e20aSShawn McCarney                },
402*cee2e20aSShawn McCarney                {
403*cee2e20aSShawn McCarney                    "comments": [
404*cee2e20aSShawn McCarney                        "Set POWER_GOOD_OFF for VPCIE to a value of 0.60V."
405*cee2e20aSShawn McCarney                    ],
406*cee2e20aSShawn McCarney                    "i2c_write_bytes": {
407*cee2e20aSShawn McCarney                        "register": "0x5F",
408*cee2e20aSShawn McCarney                        "values": ["0x33", "0x01"]
409*cee2e20aSShawn McCarney                    }
410*cee2e20aSShawn McCarney                }
411*cee2e20aSShawn McCarney            ]
412*cee2e20aSShawn McCarney        },
413*cee2e20aSShawn McCarney
414*cee2e20aSShawn McCarney        {
415*cee2e20aSShawn McCarney            "comments": [
416*cee2e20aSShawn McCarney                "Rule to read sensors on IR38064 regulators using the",
417*cee2e20aSShawn McCarney                "PMBus interface"
418*cee2e20aSShawn McCarney            ],
419*cee2e20aSShawn McCarney            "id": "read_sensors_ir38064_rule",
420*cee2e20aSShawn McCarney            "actions": [
421*cee2e20aSShawn McCarney                {
422*cee2e20aSShawn McCarney                    "comments": ["Read output current from READ_IOUT"],
423*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
424*cee2e20aSShawn McCarney                        "type": "iout",
425*cee2e20aSShawn McCarney                        "command": "0x8C",
426*cee2e20aSShawn McCarney                        "format": "linear_11"
427*cee2e20aSShawn McCarney                    }
428*cee2e20aSShawn McCarney                },
429*cee2e20aSShawn McCarney                {
430*cee2e20aSShawn McCarney                    "comments": [
431*cee2e20aSShawn McCarney                        "Read highest output current from MFR_IOUT_PEAK"
432*cee2e20aSShawn McCarney                    ],
433*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
434*cee2e20aSShawn McCarney                        "type": "iout_peak",
435*cee2e20aSShawn McCarney                        "command": "0xDC",
436*cee2e20aSShawn McCarney                        "format": "linear_11"
437*cee2e20aSShawn McCarney                    }
438*cee2e20aSShawn McCarney                },
439*cee2e20aSShawn McCarney                {
440*cee2e20aSShawn McCarney                    "comments": ["Read output power from READ_POUT"],
441*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
442*cee2e20aSShawn McCarney                        "type": "pout",
443*cee2e20aSShawn McCarney                        "command": "0x96",
444*cee2e20aSShawn McCarney                        "format": "linear_11"
445*cee2e20aSShawn McCarney                    }
446*cee2e20aSShawn McCarney                },
447*cee2e20aSShawn McCarney                {
448*cee2e20aSShawn McCarney                    "comments": ["Read temperature from READ_TEMPERATURE"],
449*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
450*cee2e20aSShawn McCarney                        "type": "temperature",
451*cee2e20aSShawn McCarney                        "command": "0x8D",
452*cee2e20aSShawn McCarney                        "format": "linear_11"
453*cee2e20aSShawn McCarney                    }
454*cee2e20aSShawn McCarney                },
455*cee2e20aSShawn McCarney                {
456*cee2e20aSShawn McCarney                    "comments": [
457*cee2e20aSShawn McCarney                        "Read highest temperature from MFR_TEMPERATURE_PEAK"
458*cee2e20aSShawn McCarney                    ],
459*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
460*cee2e20aSShawn McCarney                        "type": "temperature_peak",
461*cee2e20aSShawn McCarney                        "command": "0xDD",
462*cee2e20aSShawn McCarney                        "format": "linear_11"
463*cee2e20aSShawn McCarney                    }
464*cee2e20aSShawn McCarney                },
465*cee2e20aSShawn McCarney                {
466*cee2e20aSShawn McCarney                    "comments": [
467*cee2e20aSShawn McCarney                        "Read output voltage from READ_VOUT.",
468*cee2e20aSShawn McCarney                        "Note: regulator does not support VOUT_MODE, so the",
469*cee2e20aSShawn McCarney                        "exponent must be specified."
470*cee2e20aSShawn McCarney                    ],
471*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
472*cee2e20aSShawn McCarney                        "type": "vout",
473*cee2e20aSShawn McCarney                        "command": "0x8B",
474*cee2e20aSShawn McCarney                        "format": "linear_16",
475*cee2e20aSShawn McCarney                        "exponent": -8
476*cee2e20aSShawn McCarney                    }
477*cee2e20aSShawn McCarney                },
478*cee2e20aSShawn McCarney                {
479*cee2e20aSShawn McCarney                    "comments": [
480*cee2e20aSShawn McCarney                        "Read highest output voltage from MFR_VOUT_PEAK.",
481*cee2e20aSShawn McCarney                        "Note: regulator does not support VOUT_MODE, so the",
482*cee2e20aSShawn McCarney                        "exponent must be specified."
483*cee2e20aSShawn McCarney                    ],
484*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
485*cee2e20aSShawn McCarney                        "type": "vout_peak",
486*cee2e20aSShawn McCarney                        "command": "0xDB",
487*cee2e20aSShawn McCarney                        "format": "linear_16",
488*cee2e20aSShawn McCarney                        "exponent": -8
489*cee2e20aSShawn McCarney                    }
490*cee2e20aSShawn McCarney                }
491*cee2e20aSShawn McCarney            ]
492*cee2e20aSShawn McCarney        },
493*cee2e20aSShawn McCarney
494*cee2e20aSShawn McCarney        {
495*cee2e20aSShawn McCarney            "comments": [
496*cee2e20aSShawn McCarney                "Rule to read sensors on IR35221 regulators using the",
497*cee2e20aSShawn McCarney                "PMBus interface"
498*cee2e20aSShawn McCarney            ],
499*cee2e20aSShawn McCarney            "id": "read_sensors_ir35221_rule",
500*cee2e20aSShawn McCarney            "actions": [
501*cee2e20aSShawn McCarney                {
502*cee2e20aSShawn McCarney                    "comments": ["Read output current from READ_IOUT"],
503*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
504*cee2e20aSShawn McCarney                        "type": "iout",
505*cee2e20aSShawn McCarney                        "command": "0x8C",
506*cee2e20aSShawn McCarney                        "format": "linear_11"
507*cee2e20aSShawn McCarney                    }
508*cee2e20aSShawn McCarney                },
509*cee2e20aSShawn McCarney                {
510*cee2e20aSShawn McCarney                    "comments": [
511*cee2e20aSShawn McCarney                        "Read highest output current from MFR_IOUT_PEAK"
512*cee2e20aSShawn McCarney                    ],
513*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
514*cee2e20aSShawn McCarney                        "type": "iout_peak",
515*cee2e20aSShawn McCarney                        "command": "0xC7",
516*cee2e20aSShawn McCarney                        "format": "linear_11"
517*cee2e20aSShawn McCarney                    }
518*cee2e20aSShawn McCarney                },
519*cee2e20aSShawn McCarney                {
520*cee2e20aSShawn McCarney                    "comments": [
521*cee2e20aSShawn McCarney                        "Read lowest output current from MFR_IOUT_VALLEY"
522*cee2e20aSShawn McCarney                    ],
523*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
524*cee2e20aSShawn McCarney                        "type": "iout_valley",
525*cee2e20aSShawn McCarney                        "command": "0xCB",
526*cee2e20aSShawn McCarney                        "format": "linear_11"
527*cee2e20aSShawn McCarney                    }
528*cee2e20aSShawn McCarney                },
529*cee2e20aSShawn McCarney                {
530*cee2e20aSShawn McCarney                    "comments": ["Read output power from READ_POUT"],
531*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
532*cee2e20aSShawn McCarney                        "type": "pout",
533*cee2e20aSShawn McCarney                        "command": "0x96",
534*cee2e20aSShawn McCarney                        "format": "linear_11"
535*cee2e20aSShawn McCarney                    }
536*cee2e20aSShawn McCarney                },
537*cee2e20aSShawn McCarney                {
538*cee2e20aSShawn McCarney                    "comments": ["Read temperature from READ_TEMPERATURE_1"],
539*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
540*cee2e20aSShawn McCarney                        "type": "temperature",
541*cee2e20aSShawn McCarney                        "command": "0x8D",
542*cee2e20aSShawn McCarney                        "format": "linear_11"
543*cee2e20aSShawn McCarney                    }
544*cee2e20aSShawn McCarney                },
545*cee2e20aSShawn McCarney                {
546*cee2e20aSShawn McCarney                    "comments": ["Read highest temperature from MFR_TEMP_PEAK"],
547*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
548*cee2e20aSShawn McCarney                        "type": "temperature_peak",
549*cee2e20aSShawn McCarney                        "command": "0xC8",
550*cee2e20aSShawn McCarney                        "format": "linear_11"
551*cee2e20aSShawn McCarney                    }
552*cee2e20aSShawn McCarney                },
553*cee2e20aSShawn McCarney                {
554*cee2e20aSShawn McCarney                    "comments": ["Read output voltage from READ_VOUT"],
555*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
556*cee2e20aSShawn McCarney                        "type": "vout",
557*cee2e20aSShawn McCarney                        "command": "0x8B",
558*cee2e20aSShawn McCarney                        "format": "linear_16"
559*cee2e20aSShawn McCarney                    }
560*cee2e20aSShawn McCarney                },
561*cee2e20aSShawn McCarney                {
562*cee2e20aSShawn McCarney                    "comments": [
563*cee2e20aSShawn McCarney                        "Read highest output voltage from MFR_VOUT_PEAK"
564*cee2e20aSShawn McCarney                    ],
565*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
566*cee2e20aSShawn McCarney                        "type": "vout_peak",
567*cee2e20aSShawn McCarney                        "command": "0xC6",
568*cee2e20aSShawn McCarney                        "format": "linear_16"
569*cee2e20aSShawn McCarney                    }
570*cee2e20aSShawn McCarney                },
571*cee2e20aSShawn McCarney                {
572*cee2e20aSShawn McCarney                    "comments": [
573*cee2e20aSShawn McCarney                        "Read lowest output voltage from MFR_VOUT_VALLEY"
574*cee2e20aSShawn McCarney                    ],
575*cee2e20aSShawn McCarney                    "pmbus_read_sensor": {
576*cee2e20aSShawn McCarney                        "type": "vout_valley",
577*cee2e20aSShawn McCarney                        "command": "0xCA",
578*cee2e20aSShawn McCarney                        "format": "linear_16"
579*cee2e20aSShawn McCarney                    }
580*cee2e20aSShawn McCarney                }
581*cee2e20aSShawn McCarney            ]
582*cee2e20aSShawn McCarney        },
583*cee2e20aSShawn McCarney
584*cee2e20aSShawn McCarney        {
585*cee2e20aSShawn McCarney            "comments": [
586*cee2e20aSShawn McCarney                "Rule to read sensors on PAGE 0 of IR35221 regulators",
587*cee2e20aSShawn McCarney                "using the PMBus interface"
588*cee2e20aSShawn McCarney            ],
589*cee2e20aSShawn McCarney            "id": "read_sensors_ir35221_page0_rule",
590*cee2e20aSShawn McCarney            "actions": [
591*cee2e20aSShawn McCarney                { "run_rule": "set_page0_rule" },
592*cee2e20aSShawn McCarney                { "run_rule": "read_sensors_ir35221_rule" }
593*cee2e20aSShawn McCarney            ]
594*cee2e20aSShawn McCarney        },
595*cee2e20aSShawn McCarney
596*cee2e20aSShawn McCarney        {
597*cee2e20aSShawn McCarney            "comments": [
598*cee2e20aSShawn McCarney                "Rule to read sensors on PAGE 1 of IR35221 regulators",
599*cee2e20aSShawn McCarney                "using the PMBus interface"
600*cee2e20aSShawn McCarney            ],
601*cee2e20aSShawn McCarney            "id": "read_sensors_ir35221_page1_rule",
602*cee2e20aSShawn McCarney            "actions": [
603*cee2e20aSShawn McCarney                { "run_rule": "set_page1_rule" },
604*cee2e20aSShawn McCarney                { "run_rule": "read_sensors_ir35221_rule" }
605*cee2e20aSShawn McCarney            ]
606*cee2e20aSShawn McCarney        },
607*cee2e20aSShawn McCarney
608*cee2e20aSShawn McCarney        {
609*cee2e20aSShawn McCarney            "comments": [
610*cee2e20aSShawn McCarney                "Rule to read sensors on PAGE 0 of XDPE132G5C regulators",
611*cee2e20aSShawn McCarney                "using the PMBus interface"
612*cee2e20aSShawn McCarney            ],
613*cee2e20aSShawn McCarney            "id": "read_sensors_xdpe132g5c_page0_rule",
614*cee2e20aSShawn McCarney            "actions": [
615*cee2e20aSShawn McCarney                {
616*cee2e20aSShawn McCarney                    "comments": ["Can use same rule as for IR35221 regulators"],
617*cee2e20aSShawn McCarney                    "run_rule": "read_sensors_ir35221_page0_rule"
618*cee2e20aSShawn McCarney                }
619*cee2e20aSShawn McCarney            ]
620*cee2e20aSShawn McCarney        },
621*cee2e20aSShawn McCarney
622*cee2e20aSShawn McCarney        {
623*cee2e20aSShawn McCarney            "comments": [
624*cee2e20aSShawn McCarney                "Rule to determine if the current system is a 2S4U/2S2U.",
625*cee2e20aSShawn McCarney                "2S systems have more regulators on the Nisqually system",
626*cee2e20aSShawn McCarney                "planar than 1S systems.  Must return true if system is a",
627*cee2e20aSShawn McCarney                "2S4U/2S2U and false if system is a 1S4U."
628*cee2e20aSShawn McCarney            ],
629*cee2e20aSShawn McCarney            "id": "is_2s_system_rule",
630*cee2e20aSShawn McCarney            "actions": [
631*cee2e20aSShawn McCarney                {
632*cee2e20aSShawn McCarney                    "comments": [
633*cee2e20aSShawn McCarney                        "Check whether the CCIN VPD keyword on the Nisqually",
634*cee2e20aSShawn McCarney                        "system planar has the value for 2S4U or 2S2U"
635*cee2e20aSShawn McCarney                    ],
636*cee2e20aSShawn McCarney                    "or": [
637*cee2e20aSShawn McCarney                        {
638*cee2e20aSShawn McCarney                            "compare_vpd": {
639*cee2e20aSShawn McCarney                                "fru": "system/chassis/motherboard",
640*cee2e20aSShawn McCarney                                "keyword": "CCIN",
641*cee2e20aSShawn McCarney                                "value": "2E2F"
642*cee2e20aSShawn McCarney                            }
643*cee2e20aSShawn McCarney                        },
644*cee2e20aSShawn McCarney                        {
645*cee2e20aSShawn McCarney                            "compare_vpd": {
646*cee2e20aSShawn McCarney                                "fru": "system/chassis/motherboard",
647*cee2e20aSShawn McCarney                                "keyword": "CCIN",
648*cee2e20aSShawn McCarney                                "value": "2E2D"
649*cee2e20aSShawn McCarney                            }
650*cee2e20aSShawn McCarney                        }
651*cee2e20aSShawn McCarney                    ]
652*cee2e20aSShawn McCarney                }
653*cee2e20aSShawn McCarney            ]
654*cee2e20aSShawn McCarney        },
655*cee2e20aSShawn McCarney
656*cee2e20aSShawn McCarney        {
657*cee2e20aSShawn McCarney            "comments": [
658*cee2e20aSShawn McCarney                "Rule to determine if pass 2 or higher Nisqually",
659*cee2e20aSShawn McCarney                "backplane is present.  Must return true if present and",
660*cee2e20aSShawn McCarney                "false otherwise."
661*cee2e20aSShawn McCarney            ],
662*cee2e20aSShawn McCarney            "id": "is_pass2_nisqually_rule",
663*cee2e20aSShawn McCarney            "actions": [
664*cee2e20aSShawn McCarney                {
665*cee2e20aSShawn McCarney                    "comments": [
666*cee2e20aSShawn McCarney                        "Check that the PartNumber VPD keyword on the",
667*cee2e20aSShawn McCarney                        "Nisqually system planar is not the value for",
668*cee2e20aSShawn McCarney                        "the pass 1 2U or 4U."
669*cee2e20aSShawn McCarney                    ],
670*cee2e20aSShawn McCarney                    "not": {
671*cee2e20aSShawn McCarney                        "or": [
672*cee2e20aSShawn McCarney                            {
673*cee2e20aSShawn McCarney                                "compare_vpd": {
674*cee2e20aSShawn McCarney                                    "fru": "system/chassis/motherboard",
675*cee2e20aSShawn McCarney                                    "keyword": "PartNumber",
676*cee2e20aSShawn McCarney                                    "value": "02WG656"
677*cee2e20aSShawn McCarney                                }
678*cee2e20aSShawn McCarney                            },
679*cee2e20aSShawn McCarney                            {
680*cee2e20aSShawn McCarney                                "compare_vpd": {
681*cee2e20aSShawn McCarney                                    "fru": "system/chassis/motherboard",
682*cee2e20aSShawn McCarney                                    "keyword": "PartNumber",
683*cee2e20aSShawn McCarney                                    "value": "02WG678"
684*cee2e20aSShawn McCarney                                }
685*cee2e20aSShawn McCarney                            }
686*cee2e20aSShawn McCarney                        ]
687*cee2e20aSShawn McCarney                    }
688*cee2e20aSShawn McCarney                }
689*cee2e20aSShawn McCarney            ]
690*cee2e20aSShawn McCarney        },
691*cee2e20aSShawn McCarney
692*cee2e20aSShawn McCarney        {
693*cee2e20aSShawn McCarney            "comments": [
694*cee2e20aSShawn McCarney                "Rule to determine if the VRM FRU for DCM-1 is present.",
695*cee2e20aSShawn McCarney                "Must return true if VRM is present and false if VRM is",
696*cee2e20aSShawn McCarney                "missing."
697*cee2e20aSShawn McCarney            ],
698*cee2e20aSShawn McCarney            "id": "is_dcm1_vrm_present_rule",
699*cee2e20aSShawn McCarney            "actions": [
700*cee2e20aSShawn McCarney                {
701*cee2e20aSShawn McCarney                    "comments": [
702*cee2e20aSShawn McCarney                        "Check whether the VRM FRU is present OR the DCM-1",
703*cee2e20aSShawn McCarney                        "FRU is present.  This provides a double check in",
704*cee2e20aSShawn McCarney                        "case the VRM presence line is not working.  If DCM-1",
705*cee2e20aSShawn McCarney                        "is present, the associated VRM should be too."
706*cee2e20aSShawn McCarney                    ],
707*cee2e20aSShawn McCarney                    "or": [
708*cee2e20aSShawn McCarney                        {
709*cee2e20aSShawn McCarney                            "compare_presence": {
710*cee2e20aSShawn McCarney                                "fru": "system/chassis/motherboard/vdd_vrm1",
711*cee2e20aSShawn McCarney                                "value": true
712*cee2e20aSShawn McCarney                            }
713*cee2e20aSShawn McCarney                        },
714*cee2e20aSShawn McCarney                        {
715*cee2e20aSShawn McCarney                            "compare_presence": {
716*cee2e20aSShawn McCarney                                "fru": "system/chassis/motherboard/dcm1/cpu0",
717*cee2e20aSShawn McCarney                                "value": true
718*cee2e20aSShawn McCarney                            }
719*cee2e20aSShawn McCarney                        }
720*cee2e20aSShawn McCarney                    ]
721*cee2e20aSShawn McCarney                }
722*cee2e20aSShawn McCarney            ]
723*cee2e20aSShawn McCarney        },
724*cee2e20aSShawn McCarney
725*cee2e20aSShawn McCarney        {
726*cee2e20aSShawn McCarney            "comments": [
727*cee2e20aSShawn McCarney                "Rule to determine if a Flett card is present in slot C8.",
728*cee2e20aSShawn McCarney                "This requires a Nisqually pass2+ due to I2C bus number",
729*cee2e20aSShawn McCarney                "differences between pass 1 and pass 2.",
730*cee2e20aSShawn McCarney                "Pass 1 and pass 2 Fletts are both supported.",
731*cee2e20aSShawn McCarney                "Must return true if present and false otherwise."
732*cee2e20aSShawn McCarney            ],
733*cee2e20aSShawn McCarney            "id": "is_flett_c8_present_rule",
734*cee2e20aSShawn McCarney            "actions": [
735*cee2e20aSShawn McCarney                {
736*cee2e20aSShawn McCarney                    "if": {
737*cee2e20aSShawn McCarney                        "condition": {
738*cee2e20aSShawn McCarney                            "comments": ["Check if the Nisqually is pass 2"],
739*cee2e20aSShawn McCarney                            "run_rule": "is_pass2_nisqually_rule"
740*cee2e20aSShawn McCarney                        },
741*cee2e20aSShawn McCarney                        "then": [
742*cee2e20aSShawn McCarney                            {
743*cee2e20aSShawn McCarney                                "comments": [
744*cee2e20aSShawn McCarney                                    "Check if a card is present in slot C8"
745*cee2e20aSShawn McCarney                                ],
746*cee2e20aSShawn McCarney                                "if": {
747*cee2e20aSShawn McCarney                                    "condition": {
748*cee2e20aSShawn McCarney                                        "compare_presence": {
749*cee2e20aSShawn McCarney                                            "fru": "system/chassis/motherboard/pcieslot8/pcie_card8",
750*cee2e20aSShawn McCarney                                            "value": true
751*cee2e20aSShawn McCarney                                        }
752*cee2e20aSShawn McCarney                                    },
753*cee2e20aSShawn McCarney                                    "then": [
754*cee2e20aSShawn McCarney                                        {
755*cee2e20aSShawn McCarney                                            "comments": [
756*cee2e20aSShawn McCarney                                                "Check if card has Flett CCIN keyword"
757*cee2e20aSShawn McCarney                                            ],
758*cee2e20aSShawn McCarney                                            "compare_vpd": {
759*cee2e20aSShawn McCarney                                                "fru": "system/chassis/motherboard/pcieslot8/pcie_card8",
760*cee2e20aSShawn McCarney                                                "keyword": "CCIN",
761*cee2e20aSShawn McCarney                                                "value": "6B87"
762*cee2e20aSShawn McCarney                                            }
763*cee2e20aSShawn McCarney                                        }
764*cee2e20aSShawn McCarney                                    ]
765*cee2e20aSShawn McCarney                                }
766*cee2e20aSShawn McCarney                            }
767*cee2e20aSShawn McCarney                        ]
768*cee2e20aSShawn McCarney                    }
769*cee2e20aSShawn McCarney                }
770*cee2e20aSShawn McCarney            ]
771*cee2e20aSShawn McCarney        },
772*cee2e20aSShawn McCarney
773*cee2e20aSShawn McCarney        {
774*cee2e20aSShawn McCarney            "comments": [
775*cee2e20aSShawn McCarney                "Rule to determine if a Flett card is present in slot C9.",
776*cee2e20aSShawn McCarney                "This requires a Nisqually pass2+ due to I2C bus number",
777*cee2e20aSShawn McCarney                "differences between pass 1 and pass 2.",
778*cee2e20aSShawn McCarney                "This also requires the Flett to be pass 2 because the",
779*cee2e20aSShawn McCarney                "pass 1 regulator has a different I2C address.",
780*cee2e20aSShawn McCarney                "Must return true if present and false otherwise."
781*cee2e20aSShawn McCarney            ],
782*cee2e20aSShawn McCarney            "id": "is_flett_c9_present_rule",
783*cee2e20aSShawn McCarney            "actions": [
784*cee2e20aSShawn McCarney                {
785*cee2e20aSShawn McCarney                    "if": {
786*cee2e20aSShawn McCarney                        "condition": {
787*cee2e20aSShawn McCarney                            "comments": ["Check if the Nisqually is pass 2"],
788*cee2e20aSShawn McCarney                            "run_rule": "is_pass2_nisqually_rule"
789*cee2e20aSShawn McCarney                        },
790*cee2e20aSShawn McCarney                        "then": [
791*cee2e20aSShawn McCarney                            {
792*cee2e20aSShawn McCarney                                "comments": [
793*cee2e20aSShawn McCarney                                    "Check if a card is present in slot C9"
794*cee2e20aSShawn McCarney                                ],
795*cee2e20aSShawn McCarney                                "if": {
796*cee2e20aSShawn McCarney                                    "condition": {
797*cee2e20aSShawn McCarney                                        "compare_presence": {
798*cee2e20aSShawn McCarney                                            "fru": "system/chassis/motherboard/pcieslot9/pcie_card9",
799*cee2e20aSShawn McCarney                                            "value": true
800*cee2e20aSShawn McCarney                                        }
801*cee2e20aSShawn McCarney                                    },
802*cee2e20aSShawn McCarney                                    "then": [
803*cee2e20aSShawn McCarney                                        {
804*cee2e20aSShawn McCarney                                            "comments": [
805*cee2e20aSShawn McCarney                                                "Check if card has Flett CCIN keyword"
806*cee2e20aSShawn McCarney                                            ],
807*cee2e20aSShawn McCarney                                            "if": {
808*cee2e20aSShawn McCarney                                                "condition": {
809*cee2e20aSShawn McCarney                                                    "compare_vpd": {
810*cee2e20aSShawn McCarney                                                        "fru": "system/chassis/motherboard/pcieslot9/pcie_card9",
811*cee2e20aSShawn McCarney                                                        "keyword": "CCIN",
812*cee2e20aSShawn McCarney                                                        "value": "6B87"
813*cee2e20aSShawn McCarney                                                    }
814*cee2e20aSShawn McCarney                                                },
815*cee2e20aSShawn McCarney                                                "then": [
816*cee2e20aSShawn McCarney                                                    {
817*cee2e20aSShawn McCarney                                                        "comments": [
818*cee2e20aSShawn McCarney                                                            "Check that card does not have a pass 1",
819*cee2e20aSShawn McCarney                                                            "part number"
820*cee2e20aSShawn McCarney                                                        ],
821*cee2e20aSShawn McCarney                                                        "not": {
822*cee2e20aSShawn McCarney                                                            "or": [
823*cee2e20aSShawn McCarney                                                                {
824*cee2e20aSShawn McCarney                                                                    "compare_vpd": {
825*cee2e20aSShawn McCarney                                                                        "fru": "system/chassis/motherboard/pcieslot9/pcie_card9",
826*cee2e20aSShawn McCarney                                                                        "keyword": "PartNumber",
827*cee2e20aSShawn McCarney                                                                        "value": "03FL194"
828*cee2e20aSShawn McCarney                                                                    }
829*cee2e20aSShawn McCarney                                                                },
830*cee2e20aSShawn McCarney                                                                {
831*cee2e20aSShawn McCarney                                                                    "compare_vpd": {
832*cee2e20aSShawn McCarney                                                                        "fru": "system/chassis/motherboard/pcieslot9/pcie_card9",
833*cee2e20aSShawn McCarney                                                                        "keyword": "PartNumber",
834*cee2e20aSShawn McCarney                                                                        "value": "03FL204"
835*cee2e20aSShawn McCarney                                                                    }
836*cee2e20aSShawn McCarney                                                                }
837*cee2e20aSShawn McCarney                                                            ]
838*cee2e20aSShawn McCarney                                                        }
839*cee2e20aSShawn McCarney                                                    }
840*cee2e20aSShawn McCarney                                                ]
841*cee2e20aSShawn McCarney                                            }
842*cee2e20aSShawn McCarney                                        }
843*cee2e20aSShawn McCarney                                    ]
844*cee2e20aSShawn McCarney                                }
845*cee2e20aSShawn McCarney                            }
846*cee2e20aSShawn McCarney                        ]
847*cee2e20aSShawn McCarney                    }
848*cee2e20aSShawn McCarney                }
849*cee2e20aSShawn McCarney            ]
850*cee2e20aSShawn McCarney        },
851*cee2e20aSShawn McCarney
852*cee2e20aSShawn McCarney        {
853*cee2e20aSShawn McCarney            "comments": [
854*cee2e20aSShawn McCarney                "Rule to determine if a Flett card is present in slot C10.",
855*cee2e20aSShawn McCarney                "This requires a Nisqually pass2+ due to I2C bus number",
856*cee2e20aSShawn McCarney                "differences between pass 1 and pass 2.",
857*cee2e20aSShawn McCarney                "This also requires the Flett to be pass 2 because the",
858*cee2e20aSShawn McCarney                "pass 1 regulator has a different I2C address.",
859*cee2e20aSShawn McCarney                "Must return true if present and false otherwise."
860*cee2e20aSShawn McCarney            ],
861*cee2e20aSShawn McCarney            "id": "is_flett_c10_present_rule",
862*cee2e20aSShawn McCarney            "actions": [
863*cee2e20aSShawn McCarney                {
864*cee2e20aSShawn McCarney                    "if": {
865*cee2e20aSShawn McCarney                        "condition": {
866*cee2e20aSShawn McCarney                            "comments": ["Check if the Nisqually is pass 2"],
867*cee2e20aSShawn McCarney                            "run_rule": "is_pass2_nisqually_rule"
868*cee2e20aSShawn McCarney                        },
869*cee2e20aSShawn McCarney                        "then": [
870*cee2e20aSShawn McCarney                            {
871*cee2e20aSShawn McCarney                                "comments": [
872*cee2e20aSShawn McCarney                                    "Check if a card is present in slot C10"
873*cee2e20aSShawn McCarney                                ],
874*cee2e20aSShawn McCarney                                "if": {
875*cee2e20aSShawn McCarney                                    "condition": {
876*cee2e20aSShawn McCarney                                        "compare_presence": {
877*cee2e20aSShawn McCarney                                            "fru": "system/chassis/motherboard/pcieslot10/pcie_card10",
878*cee2e20aSShawn McCarney                                            "value": true
879*cee2e20aSShawn McCarney                                        }
880*cee2e20aSShawn McCarney                                    },
881*cee2e20aSShawn McCarney                                    "then": [
882*cee2e20aSShawn McCarney                                        {
883*cee2e20aSShawn McCarney                                            "comments": [
884*cee2e20aSShawn McCarney                                                "Check if card has Flett CCIN keyword"
885*cee2e20aSShawn McCarney                                            ],
886*cee2e20aSShawn McCarney                                            "if": {
887*cee2e20aSShawn McCarney                                                "condition": {
888*cee2e20aSShawn McCarney                                                    "compare_vpd": {
889*cee2e20aSShawn McCarney                                                        "fru": "system/chassis/motherboard/pcieslot10/pcie_card10",
890*cee2e20aSShawn McCarney                                                        "keyword": "CCIN",
891*cee2e20aSShawn McCarney                                                        "value": "6B87"
892*cee2e20aSShawn McCarney                                                    }
893*cee2e20aSShawn McCarney                                                },
894*cee2e20aSShawn McCarney                                                "then": [
895*cee2e20aSShawn McCarney                                                    {
896*cee2e20aSShawn McCarney                                                        "comments": [
897*cee2e20aSShawn McCarney                                                            "Check that card does not have a pass 1",
898*cee2e20aSShawn McCarney                                                            "part number"
899*cee2e20aSShawn McCarney                                                        ],
900*cee2e20aSShawn McCarney                                                        "not": {
901*cee2e20aSShawn McCarney                                                            "or": [
902*cee2e20aSShawn McCarney                                                                {
903*cee2e20aSShawn McCarney                                                                    "compare_vpd": {
904*cee2e20aSShawn McCarney                                                                        "fru": "system/chassis/motherboard/pcieslot10/pcie_card10",
905*cee2e20aSShawn McCarney                                                                        "keyword": "PartNumber",
906*cee2e20aSShawn McCarney                                                                        "value": "03FL194"
907*cee2e20aSShawn McCarney                                                                    }
908*cee2e20aSShawn McCarney                                                                },
909*cee2e20aSShawn McCarney                                                                {
910*cee2e20aSShawn McCarney                                                                    "compare_vpd": {
911*cee2e20aSShawn McCarney                                                                        "fru": "system/chassis/motherboard/pcieslot10/pcie_card10",
912*cee2e20aSShawn McCarney                                                                        "keyword": "PartNumber",
913*cee2e20aSShawn McCarney                                                                        "value": "03FL204"
914*cee2e20aSShawn McCarney                                                                    }
915*cee2e20aSShawn McCarney                                                                }
916*cee2e20aSShawn McCarney                                                            ]
917*cee2e20aSShawn McCarney                                                        }
918*cee2e20aSShawn McCarney                                                    }
919*cee2e20aSShawn McCarney                                                ]
920*cee2e20aSShawn McCarney                                            }
921*cee2e20aSShawn McCarney                                        }
922*cee2e20aSShawn McCarney                                    ]
923*cee2e20aSShawn McCarney                                }
924*cee2e20aSShawn McCarney                            }
925*cee2e20aSShawn McCarney                        ]
926*cee2e20aSShawn McCarney                    }
927*cee2e20aSShawn McCarney                }
928*cee2e20aSShawn McCarney            ]
929*cee2e20aSShawn McCarney        },
930*cee2e20aSShawn McCarney
931*cee2e20aSShawn McCarney        {
932*cee2e20aSShawn McCarney            "comments": [
933*cee2e20aSShawn McCarney                "Rule to determine if a Flett card is present in slot C11.",
934*cee2e20aSShawn McCarney                "This requires a Nisqually pass2+ due to I2C bus number",
935*cee2e20aSShawn McCarney                "differences between pass 1 and pass 2.",
936*cee2e20aSShawn McCarney                "Pass 1 and pass 2 Fletts are both supported.",
937*cee2e20aSShawn McCarney                "Must return true if present and false otherwise."
938*cee2e20aSShawn McCarney            ],
939*cee2e20aSShawn McCarney            "id": "is_flett_c11_present_rule",
940*cee2e20aSShawn McCarney            "actions": [
941*cee2e20aSShawn McCarney                {
942*cee2e20aSShawn McCarney                    "if": {
943*cee2e20aSShawn McCarney                        "condition": {
944*cee2e20aSShawn McCarney                            "comments": ["Check if the Nisqually is pass 2"],
945*cee2e20aSShawn McCarney                            "run_rule": "is_pass2_nisqually_rule"
946*cee2e20aSShawn McCarney                        },
947*cee2e20aSShawn McCarney                        "then": [
948*cee2e20aSShawn McCarney                            {
949*cee2e20aSShawn McCarney                                "comments": [
950*cee2e20aSShawn McCarney                                    "Check if a card is present in slot C11"
951*cee2e20aSShawn McCarney                                ],
952*cee2e20aSShawn McCarney                                "if": {
953*cee2e20aSShawn McCarney                                    "condition": {
954*cee2e20aSShawn McCarney                                        "compare_presence": {
955*cee2e20aSShawn McCarney                                            "fru": "system/chassis/motherboard/pcieslot11/pcie_card11",
956*cee2e20aSShawn McCarney                                            "value": true
957*cee2e20aSShawn McCarney                                        }
958*cee2e20aSShawn McCarney                                    },
959*cee2e20aSShawn McCarney                                    "then": [
960*cee2e20aSShawn McCarney                                        {
961*cee2e20aSShawn McCarney                                            "comments": [
962*cee2e20aSShawn McCarney                                                "Check if card has Flett CCIN keyword"
963*cee2e20aSShawn McCarney                                            ],
964*cee2e20aSShawn McCarney                                            "compare_vpd": {
965*cee2e20aSShawn McCarney                                                "fru": "system/chassis/motherboard/pcieslot11/pcie_card11",
966*cee2e20aSShawn McCarney                                                "keyword": "CCIN",
967*cee2e20aSShawn McCarney                                                "value": "6B87"
968*cee2e20aSShawn McCarney                                            }
969*cee2e20aSShawn McCarney                                        }
970*cee2e20aSShawn McCarney                                    ]
971*cee2e20aSShawn McCarney                                }
972*cee2e20aSShawn McCarney                            }
973*cee2e20aSShawn McCarney                        ]
974*cee2e20aSShawn McCarney                    }
975*cee2e20aSShawn McCarney                }
976*cee2e20aSShawn McCarney            ]
977*cee2e20aSShawn McCarney        }
978*cee2e20aSShawn McCarney    ],
979*cee2e20aSShawn McCarney
980*cee2e20aSShawn McCarney    "chassis": [
981*cee2e20aSShawn McCarney        {
982*cee2e20aSShawn McCarney            "comments": ["Chassis (drawer) 1"],
983*cee2e20aSShawn McCarney            "number": 1,
984*cee2e20aSShawn McCarney            "inventory_path": "system/chassis",
985*cee2e20aSShawn McCarney            "devices": [
986*cee2e20aSShawn McCarney                {
987*cee2e20aSShawn McCarney                    "comments": [
988*cee2e20aSShawn McCarney                        "AVDD / IR38064: Primary PMBus Interface",
989*cee2e20aSShawn McCarney                        "In schematic: bus 4 (1-based), address 0xE2 (8-bit)"
990*cee2e20aSShawn McCarney                    ],
991*cee2e20aSShawn McCarney                    "id": "avdd_regulator",
992*cee2e20aSShawn McCarney                    "is_regulator": true,
993*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
994*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 3, "address": "0x71" },
995*cee2e20aSShawn McCarney                    "presence_detection": {
996*cee2e20aSShawn McCarney                        "rule_id": "is_pass2_nisqually_rule"
997*cee2e20aSShawn McCarney                    },
998*cee2e20aSShawn McCarney                    "rails": [
999*cee2e20aSShawn McCarney                        {
1000*cee2e20aSShawn McCarney                            "id": "avdd_rail",
1001*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1002*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir38064_rule"
1003*cee2e20aSShawn McCarney                            }
1004*cee2e20aSShawn McCarney                        }
1005*cee2e20aSShawn McCarney                    ]
1006*cee2e20aSShawn McCarney                },
1007*cee2e20aSShawn McCarney
1008*cee2e20aSShawn McCarney                {
1009*cee2e20aSShawn McCarney                    "comments": [
1010*cee2e20aSShawn McCarney                        "3.3VA / TPS549D22",
1011*cee2e20aSShawn McCarney                        "In schematic: bus 9 (1-based), address 0x36 (8-bit)",
1012*cee2e20aSShawn McCarney                        "Does not have power at standby; cannot be configured",
1013*cee2e20aSShawn McCarney                        "Does not support the PMBus PAGE command"
1014*cee2e20aSShawn McCarney                    ],
1015*cee2e20aSShawn McCarney                    "id": "3_3va_regulator",
1016*cee2e20aSShawn McCarney                    "is_regulator": true,
1017*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1018*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 8, "address": "0x1B" },
1019*cee2e20aSShawn McCarney                    "rails": [
1020*cee2e20aSShawn McCarney                        {
1021*cee2e20aSShawn McCarney                            "id": "3_3va_rail"
1022*cee2e20aSShawn McCarney                        }
1023*cee2e20aSShawn McCarney                    ]
1024*cee2e20aSShawn McCarney                },
1025*cee2e20aSShawn McCarney
1026*cee2e20aSShawn McCarney                {
1027*cee2e20aSShawn McCarney                    "comments": [
1028*cee2e20aSShawn McCarney                        "3.3VB / TPS549D22",
1029*cee2e20aSShawn McCarney                        "In schematic: bus 4 (1-based), address 0x38 (8-bit)",
1030*cee2e20aSShawn McCarney                        "Does not have power at standby; cannot be configured",
1031*cee2e20aSShawn McCarney                        "Does not support the PMBus PAGE command"
1032*cee2e20aSShawn McCarney                    ],
1033*cee2e20aSShawn McCarney                    "id": "3_3vb_regulator",
1034*cee2e20aSShawn McCarney                    "is_regulator": true,
1035*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1036*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 3, "address": "0x1C" },
1037*cee2e20aSShawn McCarney                    "rails": [
1038*cee2e20aSShawn McCarney                        {
1039*cee2e20aSShawn McCarney                            "id": "3_3vb_rail"
1040*cee2e20aSShawn McCarney                        }
1041*cee2e20aSShawn McCarney                    ]
1042*cee2e20aSShawn McCarney                },
1043*cee2e20aSShawn McCarney
1044*cee2e20aSShawn McCarney                {
1045*cee2e20aSShawn McCarney                    "comments": [
1046*cee2e20aSShawn McCarney                        "VDDp0 DCM 0 / XDPE132G5C: Primary PMBus Interface",
1047*cee2e20aSShawn McCarney                        "In schematic: bus 10 (1-based), address 0xE2 (8-bit)"
1048*cee2e20aSShawn McCarney                    ],
1049*cee2e20aSShawn McCarney                    "id": "vdd_p0_dcm0_regulator",
1050*cee2e20aSShawn McCarney                    "is_regulator": true,
1051*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/vdd_vrm0",
1052*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 9, "address": "0x71" },
1053*cee2e20aSShawn McCarney                    "rails": [
1054*cee2e20aSShawn McCarney                        {
1055*cee2e20aSShawn McCarney                            "id": "vdd_p0_dcm0_rail",
1056*cee2e20aSShawn McCarney                            "configuration": {
1057*cee2e20aSShawn McCarney                                "volts": 0.9,
1058*cee2e20aSShawn McCarney                                "rule_id": "configure_vdd_rule"
1059*cee2e20aSShawn McCarney                            },
1060*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1061*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_xdpe132g5c_page0_rule"
1062*cee2e20aSShawn McCarney                            }
1063*cee2e20aSShawn McCarney                        }
1064*cee2e20aSShawn McCarney                    ]
1065*cee2e20aSShawn McCarney                },
1066*cee2e20aSShawn McCarney
1067*cee2e20aSShawn McCarney                {
1068*cee2e20aSShawn McCarney                    "comments": [
1069*cee2e20aSShawn McCarney                        "VDDp1 DCM 0 / XDPE132G5C: Primary PMBus Interface",
1070*cee2e20aSShawn McCarney                        "In schematic: bus 10 (1-based), address 0xE0 (8-bit)"
1071*cee2e20aSShawn McCarney                    ],
1072*cee2e20aSShawn McCarney                    "id": "vdd_p1_dcm0_regulator",
1073*cee2e20aSShawn McCarney                    "is_regulator": true,
1074*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/vdd_vrm0",
1075*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 9, "address": "0x70" },
1076*cee2e20aSShawn McCarney                    "rails": [
1077*cee2e20aSShawn McCarney                        {
1078*cee2e20aSShawn McCarney                            "id": "vdd_p1_dcm0_rail",
1079*cee2e20aSShawn McCarney                            "configuration": {
1080*cee2e20aSShawn McCarney                                "volts": 0.9,
1081*cee2e20aSShawn McCarney                                "rule_id": "configure_vdd_rule"
1082*cee2e20aSShawn McCarney                            },
1083*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1084*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_xdpe132g5c_page0_rule"
1085*cee2e20aSShawn McCarney                            }
1086*cee2e20aSShawn McCarney                        }
1087*cee2e20aSShawn McCarney                    ]
1088*cee2e20aSShawn McCarney                },
1089*cee2e20aSShawn McCarney
1090*cee2e20aSShawn McCarney                {
1091*cee2e20aSShawn McCarney                    "comments": [
1092*cee2e20aSShawn McCarney                        "VDDp0 DCM 1 / XDPE132G5C: Primary PMBus Interface",
1093*cee2e20aSShawn McCarney                        "In schematic: bus 11 (1-based), address 0xE2 (8-bit)"
1094*cee2e20aSShawn McCarney                    ],
1095*cee2e20aSShawn McCarney                    "id": "vdd_p0_dcm1_regulator",
1096*cee2e20aSShawn McCarney                    "is_regulator": true,
1097*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/vdd_vrm1",
1098*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 10, "address": "0x71" },
1099*cee2e20aSShawn McCarney                    "presence_detection": {
1100*cee2e20aSShawn McCarney                        "rule_id": "is_dcm1_vrm_present_rule"
1101*cee2e20aSShawn McCarney                    },
1102*cee2e20aSShawn McCarney                    "rails": [
1103*cee2e20aSShawn McCarney                        {
1104*cee2e20aSShawn McCarney                            "id": "vdd_p0_dcm1_rail",
1105*cee2e20aSShawn McCarney                            "configuration": {
1106*cee2e20aSShawn McCarney                                "volts": 0.9,
1107*cee2e20aSShawn McCarney                                "rule_id": "configure_vdd_rule"
1108*cee2e20aSShawn McCarney                            },
1109*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1110*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_xdpe132g5c_page0_rule"
1111*cee2e20aSShawn McCarney                            }
1112*cee2e20aSShawn McCarney                        }
1113*cee2e20aSShawn McCarney                    ]
1114*cee2e20aSShawn McCarney                },
1115*cee2e20aSShawn McCarney
1116*cee2e20aSShawn McCarney                {
1117*cee2e20aSShawn McCarney                    "comments": [
1118*cee2e20aSShawn McCarney                        "VDDp1 DCM 1 / XDPE132G5C: Primary PMBus Interface",
1119*cee2e20aSShawn McCarney                        "In schematic: bus 11 (1-based), address 0xE0 (8-bit)"
1120*cee2e20aSShawn McCarney                    ],
1121*cee2e20aSShawn McCarney                    "id": "vdd_p1_dcm1_regulator",
1122*cee2e20aSShawn McCarney                    "is_regulator": true,
1123*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/vdd_vrm1",
1124*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 10, "address": "0x70" },
1125*cee2e20aSShawn McCarney                    "presence_detection": {
1126*cee2e20aSShawn McCarney                        "rule_id": "is_dcm1_vrm_present_rule"
1127*cee2e20aSShawn McCarney                    },
1128*cee2e20aSShawn McCarney                    "rails": [
1129*cee2e20aSShawn McCarney                        {
1130*cee2e20aSShawn McCarney                            "id": "vdd_p1_dcm1_rail",
1131*cee2e20aSShawn McCarney                            "configuration": {
1132*cee2e20aSShawn McCarney                                "volts": 0.9,
1133*cee2e20aSShawn McCarney                                "rule_id": "configure_vdd_rule"
1134*cee2e20aSShawn McCarney                            },
1135*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1136*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_xdpe132g5c_page0_rule"
1137*cee2e20aSShawn McCarney                            }
1138*cee2e20aSShawn McCarney                        }
1139*cee2e20aSShawn McCarney                    ]
1140*cee2e20aSShawn McCarney                },
1141*cee2e20aSShawn McCarney
1142*cee2e20aSShawn McCarney                {
1143*cee2e20aSShawn McCarney                    "comments": [
1144*cee2e20aSShawn McCarney                        "VDN & VCSp0 DCM 0 / IR35221: Primary PMBus Interface",
1145*cee2e20aSShawn McCarney                        "In schematic: bus 10 (1-based), address 0xE4 (8-bit)"
1146*cee2e20aSShawn McCarney                    ],
1147*cee2e20aSShawn McCarney                    "id": "vdn_vcs_p0_dcm0_regulator",
1148*cee2e20aSShawn McCarney                    "is_regulator": true,
1149*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1150*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 9, "address": "0x72" },
1151*cee2e20aSShawn McCarney                    "rails": [
1152*cee2e20aSShawn McCarney                        {
1153*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 0 rail"],
1154*cee2e20aSShawn McCarney                            "id": "vdn_dcm0_rail",
1155*cee2e20aSShawn McCarney                            "configuration": {
1156*cee2e20aSShawn McCarney                                "volts": 0.9,
1157*cee2e20aSShawn McCarney                                "rule_id": "configure_vdn_rule"
1158*cee2e20aSShawn McCarney                            },
1159*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1160*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1161*cee2e20aSShawn McCarney                            }
1162*cee2e20aSShawn McCarney                        },
1163*cee2e20aSShawn McCarney                        {
1164*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 1 rail"],
1165*cee2e20aSShawn McCarney                            "id": "vcs_p0_dcm0_rail",
1166*cee2e20aSShawn McCarney                            "configuration": {
1167*cee2e20aSShawn McCarney                                "volts": 1.0,
1168*cee2e20aSShawn McCarney                                "rule_id": "configure_vcs_rule"
1169*cee2e20aSShawn McCarney                            },
1170*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1171*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page1_rule"
1172*cee2e20aSShawn McCarney                            }
1173*cee2e20aSShawn McCarney                        }
1174*cee2e20aSShawn McCarney                    ]
1175*cee2e20aSShawn McCarney                },
1176*cee2e20aSShawn McCarney
1177*cee2e20aSShawn McCarney                {
1178*cee2e20aSShawn McCarney                    "comments": [
1179*cee2e20aSShawn McCarney                        "VIO & VCSp1 DCM 0 / IR35221: Primary PMBus Interface",
1180*cee2e20aSShawn McCarney                        "In schematic: bus 10 (1-based), address 0xE6 (8-bit)"
1181*cee2e20aSShawn McCarney                    ],
1182*cee2e20aSShawn McCarney                    "id": "vio_vcs_p1_dcm0_regulator",
1183*cee2e20aSShawn McCarney                    "is_regulator": true,
1184*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1185*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 9, "address": "0x73" },
1186*cee2e20aSShawn McCarney                    "rails": [
1187*cee2e20aSShawn McCarney                        {
1188*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 0 rail"],
1189*cee2e20aSShawn McCarney                            "id": "vio_dcm0_rail",
1190*cee2e20aSShawn McCarney                            "configuration": {
1191*cee2e20aSShawn McCarney                                "volts": 1.02,
1192*cee2e20aSShawn McCarney                                "rule_id": "configure_vio_rule"
1193*cee2e20aSShawn McCarney                            },
1194*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1195*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1196*cee2e20aSShawn McCarney                            }
1197*cee2e20aSShawn McCarney                        },
1198*cee2e20aSShawn McCarney                        {
1199*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 1 rail"],
1200*cee2e20aSShawn McCarney                            "id": "vcs_p1_dcm0_rail",
1201*cee2e20aSShawn McCarney                            "configuration": {
1202*cee2e20aSShawn McCarney                                "volts": 1.0,
1203*cee2e20aSShawn McCarney                                "rule_id": "configure_vcs_rule"
1204*cee2e20aSShawn McCarney                            },
1205*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1206*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page1_rule"
1207*cee2e20aSShawn McCarney                            }
1208*cee2e20aSShawn McCarney                        }
1209*cee2e20aSShawn McCarney                    ]
1210*cee2e20aSShawn McCarney                },
1211*cee2e20aSShawn McCarney
1212*cee2e20aSShawn McCarney                {
1213*cee2e20aSShawn McCarney                    "comments": [
1214*cee2e20aSShawn McCarney                        "VDN & VCSp0 DCM 1 / IR35221: Primary PMBus Interface",
1215*cee2e20aSShawn McCarney                        "In schematic: bus 11 (1-based), address 0xE4 (8-bit)"
1216*cee2e20aSShawn McCarney                    ],
1217*cee2e20aSShawn McCarney                    "id": "vdn_vcs_p0_dcm1_regulator",
1218*cee2e20aSShawn McCarney                    "is_regulator": true,
1219*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1220*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 10, "address": "0x72" },
1221*cee2e20aSShawn McCarney                    "presence_detection": { "rule_id": "is_2s_system_rule" },
1222*cee2e20aSShawn McCarney                    "rails": [
1223*cee2e20aSShawn McCarney                        {
1224*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 0 rail"],
1225*cee2e20aSShawn McCarney                            "id": "vdn_dcm1_rail",
1226*cee2e20aSShawn McCarney                            "configuration": {
1227*cee2e20aSShawn McCarney                                "volts": 0.9,
1228*cee2e20aSShawn McCarney                                "rule_id": "configure_vdn_rule"
1229*cee2e20aSShawn McCarney                            },
1230*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1231*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1232*cee2e20aSShawn McCarney                            }
1233*cee2e20aSShawn McCarney                        },
1234*cee2e20aSShawn McCarney                        {
1235*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 1 rail"],
1236*cee2e20aSShawn McCarney                            "id": "vcs_p0_dcm1_rail",
1237*cee2e20aSShawn McCarney                            "configuration": {
1238*cee2e20aSShawn McCarney                                "volts": 1.0,
1239*cee2e20aSShawn McCarney                                "rule_id": "configure_vcs_rule"
1240*cee2e20aSShawn McCarney                            },
1241*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1242*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page1_rule"
1243*cee2e20aSShawn McCarney                            }
1244*cee2e20aSShawn McCarney                        }
1245*cee2e20aSShawn McCarney                    ]
1246*cee2e20aSShawn McCarney                },
1247*cee2e20aSShawn McCarney
1248*cee2e20aSShawn McCarney                {
1249*cee2e20aSShawn McCarney                    "comments": [
1250*cee2e20aSShawn McCarney                        "VIO & VCSp1 DCM 1 / IR35221: Primary PMBus Interface",
1251*cee2e20aSShawn McCarney                        "In schematic: bus 11 (1-based), address 0xE6 (8-bit)"
1252*cee2e20aSShawn McCarney                    ],
1253*cee2e20aSShawn McCarney                    "id": "vio_vcs_p1_dcm1_regulator",
1254*cee2e20aSShawn McCarney                    "is_regulator": true,
1255*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1256*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 10, "address": "0x73" },
1257*cee2e20aSShawn McCarney                    "presence_detection": { "rule_id": "is_2s_system_rule" },
1258*cee2e20aSShawn McCarney                    "rails": [
1259*cee2e20aSShawn McCarney                        {
1260*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 0 rail"],
1261*cee2e20aSShawn McCarney                            "id": "vio_dcm1_rail",
1262*cee2e20aSShawn McCarney                            "configuration": {
1263*cee2e20aSShawn McCarney                                "volts": 1.02,
1264*cee2e20aSShawn McCarney                                "rule_id": "configure_vio_rule"
1265*cee2e20aSShawn McCarney                            },
1266*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1267*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1268*cee2e20aSShawn McCarney                            }
1269*cee2e20aSShawn McCarney                        },
1270*cee2e20aSShawn McCarney                        {
1271*cee2e20aSShawn McCarney                            "comments": ["PMBus PAGE 1 rail"],
1272*cee2e20aSShawn McCarney                            "id": "vcs_p1_dcm1_rail",
1273*cee2e20aSShawn McCarney                            "configuration": {
1274*cee2e20aSShawn McCarney                                "volts": 1.0,
1275*cee2e20aSShawn McCarney                                "rule_id": "configure_vcs_rule"
1276*cee2e20aSShawn McCarney                            },
1277*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1278*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page1_rule"
1279*cee2e20aSShawn McCarney                            }
1280*cee2e20aSShawn McCarney                        }
1281*cee2e20aSShawn McCarney                    ]
1282*cee2e20aSShawn McCarney                },
1283*cee2e20aSShawn McCarney
1284*cee2e20aSShawn McCarney                {
1285*cee2e20aSShawn McCarney                    "comments": [
1286*cee2e20aSShawn McCarney                        "VPCIe DCM 0 / IR35221: Primary PMBus Interface",
1287*cee2e20aSShawn McCarney                        "In schematic: bus 10 (1-based), address 0xE8 (8-bit)"
1288*cee2e20aSShawn McCarney                    ],
1289*cee2e20aSShawn McCarney                    "id": "vpcie_dcm0_regulator",
1290*cee2e20aSShawn McCarney                    "is_regulator": true,
1291*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1292*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 9, "address": "0x74" },
1293*cee2e20aSShawn McCarney                    "rails": [
1294*cee2e20aSShawn McCarney                        {
1295*cee2e20aSShawn McCarney                            "id": "vpcie_dcm0_rail",
1296*cee2e20aSShawn McCarney                            "configuration": {
1297*cee2e20aSShawn McCarney                                "volts": 0.86,
1298*cee2e20aSShawn McCarney                                "rule_id": "configure_vpcie_rule"
1299*cee2e20aSShawn McCarney                            },
1300*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1301*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1302*cee2e20aSShawn McCarney                            }
1303*cee2e20aSShawn McCarney                        }
1304*cee2e20aSShawn McCarney                    ]
1305*cee2e20aSShawn McCarney                },
1306*cee2e20aSShawn McCarney
1307*cee2e20aSShawn McCarney                {
1308*cee2e20aSShawn McCarney                    "comments": [
1309*cee2e20aSShawn McCarney                        "VPCIe DCM 1 / IR35221: Primary PMBus Interface",
1310*cee2e20aSShawn McCarney                        "In schematic: bus 11 (1-based), address 0xE8 (8-bit)"
1311*cee2e20aSShawn McCarney                    ],
1312*cee2e20aSShawn McCarney                    "id": "vpcie_dcm1_regulator",
1313*cee2e20aSShawn McCarney                    "is_regulator": true,
1314*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard",
1315*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 10, "address": "0x74" },
1316*cee2e20aSShawn McCarney                    "presence_detection": { "rule_id": "is_2s_system_rule" },
1317*cee2e20aSShawn McCarney                    "rails": [
1318*cee2e20aSShawn McCarney                        {
1319*cee2e20aSShawn McCarney                            "id": "vpcie_dcm1_rail",
1320*cee2e20aSShawn McCarney                            "configuration": {
1321*cee2e20aSShawn McCarney                                "volts": 0.86,
1322*cee2e20aSShawn McCarney                                "rule_id": "configure_vpcie_rule"
1323*cee2e20aSShawn McCarney                            },
1324*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1325*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1326*cee2e20aSShawn McCarney                            }
1327*cee2e20aSShawn McCarney                        }
1328*cee2e20aSShawn McCarney                    ]
1329*cee2e20aSShawn McCarney                },
1330*cee2e20aSShawn McCarney
1331*cee2e20aSShawn McCarney                {
1332*cee2e20aSShawn McCarney                    "comments": [
1333*cee2e20aSShawn McCarney                        "Flett Slot C8 / IR35221: Primary PMBus Interface",
1334*cee2e20aSShawn McCarney                        "In schematic: bus 7 (1-based) mux channel 3,",
1335*cee2e20aSShawn McCarney                        "address 0xEC (8-bit).",
1336*cee2e20aSShawn McCarney                        "BMC I2C bus alias 28"
1337*cee2e20aSShawn McCarney                    ],
1338*cee2e20aSShawn McCarney                    "id": "flett_slot_c8_regulator",
1339*cee2e20aSShawn McCarney                    "is_regulator": true,
1340*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/pcieslot8/pcie_card8",
1341*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 28, "address": "0x76" },
1342*cee2e20aSShawn McCarney                    "presence_detection": {
1343*cee2e20aSShawn McCarney                        "rule_id": "is_flett_c8_present_rule"
1344*cee2e20aSShawn McCarney                    },
1345*cee2e20aSShawn McCarney                    "rails": [
1346*cee2e20aSShawn McCarney                        {
1347*cee2e20aSShawn McCarney                            "id": "flett_slot_c8_rail",
1348*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1349*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1350*cee2e20aSShawn McCarney                            }
1351*cee2e20aSShawn McCarney                        }
1352*cee2e20aSShawn McCarney                    ]
1353*cee2e20aSShawn McCarney                },
1354*cee2e20aSShawn McCarney
1355*cee2e20aSShawn McCarney                {
1356*cee2e20aSShawn McCarney                    "comments": [
1357*cee2e20aSShawn McCarney                        "Flett Slot C9 / IR35221: Primary PMBus Interface",
1358*cee2e20aSShawn McCarney                        "In schematic: bus 7 (1-based) mux channel 2,",
1359*cee2e20aSShawn McCarney                        "address 0xEC (8-bit).",
1360*cee2e20aSShawn McCarney                        "BMC I2C bus alias 27"
1361*cee2e20aSShawn McCarney                    ],
1362*cee2e20aSShawn McCarney                    "id": "flett_slot_c9_regulator",
1363*cee2e20aSShawn McCarney                    "is_regulator": true,
1364*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/pcieslot9/pcie_card9",
1365*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 27, "address": "0x76" },
1366*cee2e20aSShawn McCarney                    "presence_detection": {
1367*cee2e20aSShawn McCarney                        "rule_id": "is_flett_c9_present_rule"
1368*cee2e20aSShawn McCarney                    },
1369*cee2e20aSShawn McCarney                    "rails": [
1370*cee2e20aSShawn McCarney                        {
1371*cee2e20aSShawn McCarney                            "id": "flett_slot_c9_rail",
1372*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1373*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1374*cee2e20aSShawn McCarney                            }
1375*cee2e20aSShawn McCarney                        }
1376*cee2e20aSShawn McCarney                    ]
1377*cee2e20aSShawn McCarney                },
1378*cee2e20aSShawn McCarney
1379*cee2e20aSShawn McCarney                {
1380*cee2e20aSShawn McCarney                    "comments": [
1381*cee2e20aSShawn McCarney                        "Flett Slot C11 / IR35221: Primary PMBus Interface",
1382*cee2e20aSShawn McCarney                        "In schematic: bus 12 (1-based) mux channel 1,",
1383*cee2e20aSShawn McCarney                        "address 0xEC (8-bit).",
1384*cee2e20aSShawn McCarney                        "BMC I2C bus alias 30"
1385*cee2e20aSShawn McCarney                    ],
1386*cee2e20aSShawn McCarney                    "id": "flett_slot_c11_regulator",
1387*cee2e20aSShawn McCarney                    "is_regulator": true,
1388*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/pcieslot11/pcie_card11",
1389*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 30, "address": "0x76" },
1390*cee2e20aSShawn McCarney                    "presence_detection": {
1391*cee2e20aSShawn McCarney                        "rule_id": "is_flett_c11_present_rule"
1392*cee2e20aSShawn McCarney                    },
1393*cee2e20aSShawn McCarney                    "rails": [
1394*cee2e20aSShawn McCarney                        {
1395*cee2e20aSShawn McCarney                            "id": "flett_slot_c11_rail",
1396*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1397*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1398*cee2e20aSShawn McCarney                            }
1399*cee2e20aSShawn McCarney                        }
1400*cee2e20aSShawn McCarney                    ]
1401*cee2e20aSShawn McCarney                },
1402*cee2e20aSShawn McCarney
1403*cee2e20aSShawn McCarney                {
1404*cee2e20aSShawn McCarney                    "comments": [
1405*cee2e20aSShawn McCarney                        "Flett Slot C10 / IR35221: Primary PMBus Interface",
1406*cee2e20aSShawn McCarney                        "In schematic: bus 12 (1-based) mux channel 0,",
1407*cee2e20aSShawn McCarney                        "address 0xEC (8-bit).",
1408*cee2e20aSShawn McCarney                        "BMC I2C bus alias 29"
1409*cee2e20aSShawn McCarney                    ],
1410*cee2e20aSShawn McCarney                    "id": "flett_slot_c10_regulator",
1411*cee2e20aSShawn McCarney                    "is_regulator": true,
1412*cee2e20aSShawn McCarney                    "fru": "system/chassis/motherboard/pcieslot10/pcie_card10",
1413*cee2e20aSShawn McCarney                    "i2c_interface": { "bus": 29, "address": "0x76" },
1414*cee2e20aSShawn McCarney                    "presence_detection": {
1415*cee2e20aSShawn McCarney                        "rule_id": "is_flett_c10_present_rule"
1416*cee2e20aSShawn McCarney                    },
1417*cee2e20aSShawn McCarney                    "rails": [
1418*cee2e20aSShawn McCarney                        {
1419*cee2e20aSShawn McCarney                            "id": "flett_slot_c10_rail",
1420*cee2e20aSShawn McCarney                            "sensor_monitoring": {
1421*cee2e20aSShawn McCarney                                "rule_id": "read_sensors_ir35221_page0_rule"
1422*cee2e20aSShawn McCarney                            }
1423*cee2e20aSShawn McCarney                        }
1424*cee2e20aSShawn McCarney                    ]
1425*cee2e20aSShawn McCarney                }
1426*cee2e20aSShawn McCarney            ]
1427*cee2e20aSShawn McCarney        }
1428*cee2e20aSShawn McCarney    ]
1429*cee2e20aSShawn McCarney}
1430