1 /**
2  * Copyright (C) 2020 IBM Corporation
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 #include "cfam_access.hpp"
17 #include "ext_interface.hpp"
18 #include "p9_cfam.hpp"
19 #include "registration.hpp"
20 #include "targeting.hpp"
21 
22 extern "C"
23 {
24 #include <libpdbg.h>
25 #include <libpdbg_sbe.h>
26 }
27 
28 #include <phosphor-logging/log.hpp>
29 namespace openpower
30 {
31 namespace p9
32 {
33 
34 using namespace openpower::cfam::access;
35 using namespace openpower::cfam::p9;
36 using namespace openpower::targeting;
37 
38 /**
39  * @brief Continue with memory preserving reboot.
40  * @return void
41  */
42 void startHostMpReboot()
43 {
44     using namespace phosphor::logging;
45 
46     Targeting targets;
47     const auto& master = *(targets.begin());
48 
49     log<level::INFO>("Running P9 procedure startHostMpReboot",
50                      entry("NUM_PROCS=%d", targets.size()));
51 
52     // Ensure asynchronous clock mode is set
53     writeReg(master, P9_LL_MODE_REG, 0x00000001);
54 
55     // Clock mux select override
56     for (const auto& t : targets)
57     {
58         writeRegWithMask(t, P9_ROOT_CTRL8, 0x0000000C, 0x0000000C);
59     }
60 
61     // Enable P9 checkstop to be reported to the BMC
62 
63     // Setup FSI2PIB to report checkstop
64     writeReg(master, P9_FSI_A_SI1S, 0x20000000);
65 
66     // Enable Xstop/ATTN interrupt
67     writeReg(master, P9_FSI2PIB_TRUE_MASK, 0x60000000);
68 
69     // Arm it
70     writeReg(master, P9_FSI2PIB_INTERRUPT, 0xFFFFFFFF);
71 
72     // Kick off the SBE to start the boot
73 
74     // Choose seeprom side to boot from
75     cfam_data_t sbeSide = 0;
76     if (getBootCount() > 0)
77     {
78         sbeSide = 0;
79         log<level::INFO>("Setting SBE seeprom side to 0",
80                          entry("SBE_SIDE_SELECT=%d", 0));
81     }
82     else
83     {
84         sbeSide = 0x00004000;
85         log<level::INFO>("Setting SBE seeprom side to 1",
86                          entry("SBE_SIDE_SELECT=%d", 1));
87     }
88     // Bit 17 of the ctrl status reg indicates sbe seeprom boot side
89     // 0 -> Side 0, 1 -> Side 1
90     writeRegWithMask(master, P9_SBE_CTRL_STATUS, sbeSide, 0x00004000);
91 
92     // Call enter mpipl
93     pdbg_targets_init(NULL);
94     struct pdbg_target* target;
95     pdbg_for_each_class_target("pib", target)
96     {
97         if (pdbg_target_probe(target) != PDBG_TARGET_ENABLED)
98         {
99             continue;
100         }
101 
102         int error = 0;
103         if ((error = sbe_mpipl_continue(target)) < 0)
104         {
105             log<level::ERR>("Failed to execute sbe_mpipl_contiue");
106             throw std::system_error(error, std::generic_category(),
107                                     "Failed to continue with mp reboot");
108         }
109         break;
110     }
111 }
112 
113 REGISTER_PROCEDURE("startHostMpReboot", startHostMpReboot)
114 
115 } // namespace p9
116 } // namespace openpower
117