1177e987bSDelphine CC Chiu#!/bin/bash -e 2177e987bSDelphine CC Chiu# shellcheck source=meta-facebook/meta-yosemite4/recipes-yosemite4/plat-tool/files/yosemite4-common-functions 3177e987bSDelphine CC Chiusource /usr/libexec/yosemite4-common-functions 4177e987bSDelphine CC Chiu 5*1fd57fe1SAllen.Wang 6*1fd57fe1SAllen.Wangenable_all_fan_input() 7*1fd57fe1SAllen.Wang{ 8*1fd57fe1SAllen.Wang for file in /sys/bus/i2c/devices/*/hwmon/*/fan*_enable 9*1fd57fe1SAllen.Wang do 10*1fd57fe1SAllen.Wang echo 1 > "${file}" 11*1fd57fe1SAllen.Wang done 12*1fd57fe1SAllen.Wang} 13*1fd57fe1SAllen.Wang 14a29bca51SEric# probe devices behind mux for management board cpld 15a29bca51SEric 16a29bca51SEricrev_id_gpiochip=$(basename "/sys/bus/i2c/devices/13-0020/"*gpiochip*) 17a29bca51SEricrev_id_bit0=$(gpioget "$rev_id_gpiochip" 0) 18a29bca51SEricrev_id_bit1=$(gpioget "$rev_id_gpiochip" 1) 19a29bca51SEricrev_id_bit2=$(gpioget "$rev_id_gpiochip" 2) 20a29bca51SEricrev_id_bit3=$(gpioget "$rev_id_gpiochip" 3) 21a29bca51SEric 22a29bca51SEric# Default devicetree was set for EVT and later, only POC will do following manual devices' probing 23a29bca51SEricif [ "$rev_id_bit0" -eq 0 ] && [ "$rev_id_bit1" -eq 0 ] && [ "$rev_id_bit2" -eq 0 ] && [ "$rev_id_bit3" -eq 0 ] 24a29bca51SEricthen 25a29bca51SEric echo 24c128 "0x50" > /sys/bus/i2c/devices/i2c-12/new_device 26a29bca51SEric echo 24c64 "0x54" > /sys/bus/i2c/devices/i2c-12/new_device 27a29bca51SEric echo tmp75 "0x48" > /sys/bus/i2c/devices/i2c-12/new_device 28a29bca51SEric echo nct3018y "0x6f" > /sys/bus/i2c/devices/i2c-12/new_device 29a29bca51SEricfi 30a29bca51SEric 31177e987bSDelphine CC Chiu# set initial value for GPIO output pins 32177e987bSDelphine CC Chiuset_gpio EN_P5V_USB_CPLD_R 1 33177e987bSDelphine CC Chiuset_gpio EN_NIC0_POWER_BMC_R 1 34177e987bSDelphine CC Chiuset_gpio EN_NIC1_POWER_BMC_R 1 35177e987bSDelphine CC Chiuset_gpio EN_NIC2_POWER_BMC_R 1 36177e987bSDelphine CC Chiuset_gpio EN_NIC3_POWER_BMC_R 1 37177e987bSDelphine CC Chiuset_gpio FM_BMC_RTCRST_R 0 38177e987bSDelphine CC Chiuset_gpio RST_USB_HUB_R_N 1 39177e987bSDelphine CC Chiuset_gpio FM_BMC_READY_R2 1 40177e987bSDelphine CC Chiuset_gpio SPI_LOCK_REQ_BMC_N 1 41177e987bSDelphine CC Chiuset_gpio EN_P3V_BAT_SCALED_R 0 42177e987bSDelphine CC Chiu 43177e987bSDelphine CC Chiuset_gpio NIC0_MAIN_PWR_EN 1 44177e987bSDelphine CC Chiuset_gpio NIC1_MAIN_PWR_EN 1 45177e987bSDelphine CC Chiuset_gpio NIC2_MAIN_PWR_EN 1 46177e987bSDelphine CC Chiuset_gpio NIC3_MAIN_PWR_EN 1 47177e987bSDelphine CC Chiu 4805c30e10SDelphine CC Chiu# short-term set gpio v0~v3 to input pin for slot5~8 reset button 4905c30e10SDelphine CC Chiumknod -m 660 /dev/mem c 1 1 5005c30e10SDelphine CC Chiuchown root:kmem /dev/mem 5105c30e10SDelphine CC Chiudevmem 0x1e78008c 32 0x19000000 5205c30e10SDelphine CC Chiu 53*1fd57fe1SAllen.Wang# Enable all fan input as early as possible 54*1fd57fe1SAllen.Wangenable_all_fan_input 55*1fd57fe1SAllen.Wang 56177e987bSDelphine CC Chiuexit 0 57