1# N1SDP specific TFA support 2 3# Align with N1SDP-2023.06.22 Manifest 4SRCREV_tfa = "31f60a968347497562b0129134928d7ac4767710" 5PV .= "+git" 6 7COMPATIBLE_MACHINE = "n1sdp" 8TFA_BUILD_TARGET = "all fip" 9TFA_INSTALL_TARGET = "bl1 bl2 bl31 n1sdp-multi-chip n1sdp-single-chip n1sdp_fw_config n1sdp_tb_fw_config fip" 10TFA_DEBUG = "1" 11TFA_MBEDTLS = "1" 12TFA_UBOOT = "0" 13TFA_UEFI ?= "1" 14 15FILESEXTRAPATHS:prepend := "${THISDIR}/files/n1sdp:" 16 17SRC_URI:append = " \ 18 file://0001-Reserve-OP-TEE-memory-from-nwd.patch \ 19 file://0002-Modify-BL32-Location-to-DDR4.patch \ 20 file://0003-Modify-SPMC-Base-to-DDR4.patch \ 21 " 22 23TFA_ROT_KEY= "plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem" 24 25# Enabling Secure-EL1 Payload Dispatcher (SPD) 26TFA_SPD = "spmd" 27# Cortex-A35 supports Armv8.0-A (no S-EL2 execution state). 28# So, the SPD SPMC component should run at the S-EL1 execution state 29TFA_SPMD_SPM_AT_SEL2 = "0" 30 31# BL2 loads BL32 (optee). So, optee needs to be built first: 32DEPENDS += "optee-os" 33 34EXTRA_OEMAKE:append = "\ 35 TRUSTED_BOARD_BOOT=1 \ 36 GENERATE_COT=1 \ 37 CREATE_KEYS=1 \ 38 ARM_ROTPK_LOCATION="devel_rsa" \ 39 ROT_KEY="${TFA_ROT_KEY}" \ 40 BL32=${RECIPE_SYSROOT}/${nonarch_base_libdir}/firmware/tee-pager_v2.bin \ 41 " 42