12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2dd9bda47SCyril Bur /*
3dd9bda47SCyril Bur * Copyright 2016, Cyril Bur, IBM Corp.
4dd9bda47SCyril Bur *
5dd9bda47SCyril Bur * Test the kernel's signal frame code.
6dd9bda47SCyril Bur *
7dd9bda47SCyril Bur * The kernel sets up two sets of ucontexts if the signal was to be
89d535e20SGustavo Romero * delivered while the thread was in a transaction (referred too as
99d535e20SGustavo Romero * first and second contexts).
10dd9bda47SCyril Bur * Expected behaviour is that the checkpointed state is in the user
119d535e20SGustavo Romero * context passed to the signal handler (first context). The speculated
129d535e20SGustavo Romero * state can be accessed with the uc_link pointer (second context).
13dd9bda47SCyril Bur *
14dd9bda47SCyril Bur * The rationale for this is that if TM unaware code (which linked
15dd9bda47SCyril Bur * against TM libs) installs a signal handler it will not know of the
16dd9bda47SCyril Bur * speculative nature of the 'live' registers and may infer the wrong
17dd9bda47SCyril Bur * thing.
18dd9bda47SCyril Bur */
19dd9bda47SCyril Bur
20dd9bda47SCyril Bur #include <stdlib.h>
21dd9bda47SCyril Bur #include <stdio.h>
22dd9bda47SCyril Bur #include <string.h>
23dd9bda47SCyril Bur #include <signal.h>
24dd9bda47SCyril Bur #include <unistd.h>
25dd9bda47SCyril Bur
26dd9bda47SCyril Bur #include <altivec.h>
27dd9bda47SCyril Bur
28dd9bda47SCyril Bur #include "utils.h"
29dd9bda47SCyril Bur #include "tm.h"
30dd9bda47SCyril Bur
31dd9bda47SCyril Bur #define MAX_ATTEMPT 500000
32dd9bda47SCyril Bur
339d535e20SGustavo Romero #define NV_VSX_REGS 12 /* Number of VSX registers to check. */
349d535e20SGustavo Romero #define VSX20 20 /* First VSX register to check in vsr20-vsr31 subset */
359d535e20SGustavo Romero #define FPR20 20 /* FPR20 overlaps VSX20 most significant doubleword */
36dd9bda47SCyril Bur
37dd9bda47SCyril Bur long tm_signal_self_context_load(pid_t pid, long *gprs, double *fps, vector int *vms, vector int *vss);
38dd9bda47SCyril Bur
399d535e20SGustavo Romero static sig_atomic_t fail, broken;
40dd9bda47SCyril Bur
419d535e20SGustavo Romero /* Test only 12 vsx registers from vsr20 to vsr31 */
429d535e20SGustavo Romero vector int vsxs[] = {
439d535e20SGustavo Romero /* First context will be set with these values, i.e. non-speculative */
449d535e20SGustavo Romero /* VSX20 , VSX21 , ... */
45dd9bda47SCyril Bur { 1, 2, 3, 4},{ 5, 6, 7, 8},{ 9,10,11,12},
46dd9bda47SCyril Bur {13,14,15,16},{17,18,19,20},{21,22,23,24},
47dd9bda47SCyril Bur {25,26,27,28},{29,30,31,32},{33,34,35,36},
48dd9bda47SCyril Bur {37,38,39,40},{41,42,43,44},{45,46,47,48},
499d535e20SGustavo Romero /* Second context will be set with these values, i.e. speculative */
509d535e20SGustavo Romero /* VSX20 , VSX21 , ... */
51dd9bda47SCyril Bur {-1, -2, -3, -4 },{-5, -6, -7, -8 },{-9, -10,-11,-12},
52dd9bda47SCyril Bur {-13,-14,-15,-16},{-17,-18,-19,-20},{-21,-22,-23,-24},
53dd9bda47SCyril Bur {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
54dd9bda47SCyril Bur {-37,-38,-39,-40},{-41,-42,-43,-44},{-45,-46,-47,-48}
55dd9bda47SCyril Bur };
56dd9bda47SCyril Bur
signal_usr1(int signum,siginfo_t * info,void * uc)57dd9bda47SCyril Bur static void signal_usr1(int signum, siginfo_t *info, void *uc)
58dd9bda47SCyril Bur {
599d535e20SGustavo Romero int i, j;
609d535e20SGustavo Romero uint8_t vsx[sizeof(vector int)];
619d535e20SGustavo Romero uint8_t vsx_tm[sizeof(vector int)];
62dd9bda47SCyril Bur ucontext_t *ucp = uc;
63dd9bda47SCyril Bur ucontext_t *tm_ucp = ucp->uc_link;
64dd9bda47SCyril Bur
65dd9bda47SCyril Bur /*
669d535e20SGustavo Romero * FP registers and VMX registers overlap the VSX registers.
67dd9bda47SCyril Bur *
689d535e20SGustavo Romero * FP registers (f0-31) overlap the most significant 64 bits of VSX
699d535e20SGustavo Romero * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like
709d535e20SGustavo Romero * the VSX registers, overlap fully the other half of VSX registers,
719d535e20SGustavo Romero * i.e. vr0-31 overlaps fully vsr32-63.
729d535e20SGustavo Romero *
739d535e20SGustavo Romero * Due to compatibility and historical reasons (VMX/Altivec support
749d535e20SGustavo Romero * appeared first on the architecture), VMX registers vr0-31 (so VSX
759d535e20SGustavo Romero * half vsr32-63 too) are stored right after the v_regs pointer, in an
769d535e20SGustavo Romero * area allocated for 'vmx_reverse' array (please see
779d535e20SGustavo Romero * arch/powerpc/include/uapi/asm/sigcontext.h for details about the
789d535e20SGustavo Romero * mcontext_t structure on Power).
799d535e20SGustavo Romero *
809d535e20SGustavo Romero * The other VSX half (vsr0-31) is hence stored below vr0-31/vsr32-63
819d535e20SGustavo Romero * registers, but only the least significant 64 bits of vsr0-31. The
829d535e20SGustavo Romero * most significant 64 bits of vsr0-31 (f0-31), as it overlaps the FP
839d535e20SGustavo Romero * registers, is kept in fp_regs.
849d535e20SGustavo Romero *
859d535e20SGustavo Romero * v_regs is a 16 byte aligned pointer at the start of vmx_reserve
869d535e20SGustavo Romero * (vmx_reserve may or may not be 16 aligned) where the v_regs structure
879d535e20SGustavo Romero * exists, so v_regs points to where vr0-31 / vsr32-63 registers are
889d535e20SGustavo Romero * fully stored. Since v_regs type is elf_vrregset_t, v_regs + 1
899d535e20SGustavo Romero * skips all the slots used to store vr0-31 / vsr32-64 and points to
909d535e20SGustavo Romero * part of one VSX half, i.e. v_regs + 1 points to the least significant
919d535e20SGustavo Romero * 64 bits of vsr0-31. The other part of this half (the most significant
929d535e20SGustavo Romero * part of vsr0-31) is stored in fp_regs.
939d535e20SGustavo Romero *
94dd9bda47SCyril Bur */
959d535e20SGustavo Romero /* Get pointer to least significant doubleword of vsr0-31 */
96dd9bda47SCyril Bur long *vsx_ptr = (long *)(ucp->uc_mcontext.v_regs + 1);
97dd9bda47SCyril Bur long *tm_vsx_ptr = (long *)(tm_ucp->uc_mcontext.v_regs + 1);
989d535e20SGustavo Romero
999d535e20SGustavo Romero /* Check first context. Print all mismatches. */
1009d535e20SGustavo Romero for (i = 0; i < NV_VSX_REGS; i++) {
1019d535e20SGustavo Romero /*
1029d535e20SGustavo Romero * Copy VSX most significant doubleword from fp_regs and
1039d535e20SGustavo Romero * copy VSX least significant one from 64-bit slots below
1049d535e20SGustavo Romero * saved VMX registers.
1059d535e20SGustavo Romero */
1069d535e20SGustavo Romero memcpy(vsx, &ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
1079d535e20SGustavo Romero memcpy(vsx + 8, &vsx_ptr[VSX20 + i], 8);
1089d535e20SGustavo Romero
1099d535e20SGustavo Romero fail = memcmp(vsx, &vsxs[i], sizeof(vector int));
110dd9bda47SCyril Bur
111dd9bda47SCyril Bur if (fail) {
1129d535e20SGustavo Romero broken = 1;
1139d535e20SGustavo Romero printf("VSX%d (1st context) == 0x", VSX20 + i);
1149d535e20SGustavo Romero for (j = 0; j < 16; j++)
1159d535e20SGustavo Romero printf("%02x", vsx[j]);
1169d535e20SGustavo Romero printf(" instead of 0x");
1179d535e20SGustavo Romero for (j = 0; j < 4; j++)
1189d535e20SGustavo Romero printf("%08x", vsxs[i][j]);
1199d535e20SGustavo Romero printf(" (expected)\n");
1209d535e20SGustavo Romero }
1219d535e20SGustavo Romero }
122dd9bda47SCyril Bur
1239d535e20SGustavo Romero /* Check second context. Print all mismatches. */
1249d535e20SGustavo Romero for (i = 0; i < NV_VSX_REGS; i++) {
1259d535e20SGustavo Romero /*
1269d535e20SGustavo Romero * Copy VSX most significant doubleword from fp_regs and
1279d535e20SGustavo Romero * copy VSX least significant one from 64-bit slots below
1289d535e20SGustavo Romero * saved VMX registers.
1299d535e20SGustavo Romero */
1309d535e20SGustavo Romero memcpy(vsx_tm, &tm_ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
1319d535e20SGustavo Romero memcpy(vsx_tm + 8, &tm_vsx_ptr[VSX20 + i], 8);
1329d535e20SGustavo Romero
1339d535e20SGustavo Romero fail = memcmp(vsx_tm, &vsxs[NV_VSX_REGS + i], sizeof(vector int));
1349d535e20SGustavo Romero
1359d535e20SGustavo Romero if (fail) {
1369d535e20SGustavo Romero broken = 1;
1379d535e20SGustavo Romero printf("VSX%d (2nd context) == 0x", VSX20 + i);
138dd9bda47SCyril Bur for (j = 0; j < 16; j++)
1399d535e20SGustavo Romero printf("%02x", vsx_tm[j]);
1409d535e20SGustavo Romero printf(" instead of 0x");
1419d535e20SGustavo Romero for (j = 0; j < 4; j++)
1429d535e20SGustavo Romero printf("%08x", vsxs[NV_VSX_REGS + i][j]);
1439d535e20SGustavo Romero printf("(expected)\n");
144dd9bda47SCyril Bur }
145dd9bda47SCyril Bur }
146dd9bda47SCyril Bur }
147dd9bda47SCyril Bur
tm_signal_context_chk()148dd9bda47SCyril Bur static int tm_signal_context_chk()
149dd9bda47SCyril Bur {
150dd9bda47SCyril Bur struct sigaction act;
151dd9bda47SCyril Bur int i;
152dd9bda47SCyril Bur long rc;
153dd9bda47SCyril Bur pid_t pid = getpid();
154dd9bda47SCyril Bur
155dd9bda47SCyril Bur SKIP_IF(!have_htm());
156*e42edf9bSJordan Niethe SKIP_IF(htm_is_synthetic());
157dd9bda47SCyril Bur
158dd9bda47SCyril Bur act.sa_sigaction = signal_usr1;
159dd9bda47SCyril Bur sigemptyset(&act.sa_mask);
160dd9bda47SCyril Bur act.sa_flags = SA_SIGINFO;
161dd9bda47SCyril Bur if (sigaction(SIGUSR1, &act, NULL) < 0) {
162dd9bda47SCyril Bur perror("sigaction sigusr1");
163dd9bda47SCyril Bur exit(1);
164dd9bda47SCyril Bur }
165dd9bda47SCyril Bur
166dd9bda47SCyril Bur i = 0;
1679d535e20SGustavo Romero while (i < MAX_ATTEMPT && !broken) {
1689d535e20SGustavo Romero /*
1699d535e20SGustavo Romero * tm_signal_self_context_load will set both first and second
1709d535e20SGustavo Romero * contexts accordingly to the values passed through non-NULL
1719d535e20SGustavo Romero * array pointers to it, in that case 'vsxs', and invoke the
1729d535e20SGustavo Romero * signal handler installed for SIGUSR1.
1739d535e20SGustavo Romero */
1749d535e20SGustavo Romero rc = tm_signal_self_context_load(pid, NULL, NULL, NULL, vsxs);
175dd9bda47SCyril Bur FAIL_IF(rc != pid);
176dd9bda47SCyril Bur i++;
177dd9bda47SCyril Bur }
178dd9bda47SCyril Bur
1799d535e20SGustavo Romero return (broken);
180dd9bda47SCyril Bur }
181dd9bda47SCyril Bur
main(void)182dd9bda47SCyril Bur int main(void)
183dd9bda47SCyril Bur {
184dd9bda47SCyril Bur return test_harness(tm_signal_context_chk, "tm_signal_context_chk_vsx");
185dd9bda47SCyril Bur }
186