1 /* 2 * Ptrace test for VMX/VSX registers in the TM context 3 * 4 * Copyright (C) 2015 Anshuman Khandual, IBM Corporation. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 #include "ptrace.h" 12 #include "tm.h" 13 #include "ptrace-vsx.h" 14 15 int shm_id; 16 unsigned long *cptr, *pptr; 17 18 unsigned long fp_load[VEC_MAX]; 19 unsigned long fp_store[VEC_MAX]; 20 unsigned long fp_load_ckpt[VEC_MAX]; 21 unsigned long fp_load_ckpt_new[VEC_MAX]; 22 23 __attribute__((used)) void load_vsx(void) 24 { 25 loadvsx(fp_load, 0); 26 } 27 28 __attribute__((used)) void load_vsx_ckpt(void) 29 { 30 loadvsx(fp_load_ckpt, 0); 31 } 32 33 void tm_vsx(void) 34 { 35 unsigned long result, texasr; 36 int ret; 37 38 cptr = (unsigned long *)shmat(shm_id, NULL, 0); 39 40 trans: 41 cptr[1] = 0; 42 asm __volatile__( 43 "bl load_vsx_ckpt;" 44 45 "1: ;" 46 "tbegin.;" 47 "beq 2f;" 48 49 "bl load_vsx;" 50 "tsuspend.;" 51 "li 7, 1;" 52 "stw 7, 0(%[cptr1]);" 53 "tresume.;" 54 "b .;" 55 56 "tend.;" 57 "li 0, 0;" 58 "ori %[res], 0, 0;" 59 "b 3f;" 60 61 "2: ;" 62 "li 0, 1;" 63 "ori %[res], 0, 0;" 64 "mfspr %[texasr], %[sprn_texasr];" 65 66 "3: ;" 67 : [res] "=r" (result), [texasr] "=r" (texasr) 68 : [sprn_texasr] "i" (SPRN_TEXASR), [cptr1] "b" (&cptr[1]) 69 : "memory", "r0", "r1", "r3", "r4", 70 "r7", "r8", "r9", "r10", "r11" 71 ); 72 73 if (result) { 74 if (!cptr[0]) 75 goto trans; 76 77 shmdt((void *)cptr); 78 storevsx(fp_store, 0); 79 ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new); 80 if (ret) 81 exit(1); 82 exit(0); 83 } 84 shmdt((void *)cptr); 85 exit(1); 86 } 87 88 int trace_tm_vsx(pid_t child) 89 { 90 unsigned long vsx[VSX_MAX]; 91 unsigned long vmx[VMX_MAX + 2][2]; 92 93 FAIL_IF(start_trace(child)); 94 FAIL_IF(show_vsx(child, vsx)); 95 FAIL_IF(validate_vsx(vsx, fp_load)); 96 FAIL_IF(show_vmx(child, vmx)); 97 FAIL_IF(validate_vmx(vmx, fp_load)); 98 FAIL_IF(show_vsx_ckpt(child, vsx)); 99 FAIL_IF(validate_vsx(vsx, fp_load_ckpt)); 100 FAIL_IF(show_vmx_ckpt(child, vmx)); 101 FAIL_IF(validate_vmx(vmx, fp_load_ckpt)); 102 memset(vsx, 0, sizeof(vsx)); 103 memset(vmx, 0, sizeof(vmx)); 104 105 load_vsx_vmx(fp_load_ckpt_new, vsx, vmx); 106 107 FAIL_IF(write_vsx_ckpt(child, vsx)); 108 FAIL_IF(write_vmx_ckpt(child, vmx)); 109 pptr[0] = 1; 110 FAIL_IF(stop_trace(child)); 111 return TEST_PASS; 112 } 113 114 int ptrace_tm_vsx(void) 115 { 116 pid_t pid; 117 int ret, status, i; 118 119 SKIP_IF(!have_htm()); 120 shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT); 121 122 for (i = 0; i < 128; i++) { 123 fp_load[i] = 1 + rand(); 124 fp_load_ckpt[i] = 1 + 2 * rand(); 125 fp_load_ckpt_new[i] = 1 + 3 * rand(); 126 } 127 128 pid = fork(); 129 if (pid < 0) { 130 perror("fork() failed"); 131 return TEST_FAIL; 132 } 133 134 if (pid == 0) 135 tm_vsx(); 136 137 if (pid) { 138 pptr = (unsigned long *)shmat(shm_id, NULL, 0); 139 while (!pptr[1]) 140 asm volatile("" : : : "memory"); 141 142 ret = trace_tm_vsx(pid); 143 if (ret) { 144 kill(pid, SIGKILL); 145 shmdt((void *)pptr); 146 shmctl(shm_id, IPC_RMID, NULL); 147 return TEST_FAIL; 148 } 149 150 shmdt((void *)pptr); 151 ret = wait(&status); 152 shmctl(shm_id, IPC_RMID, NULL); 153 if (ret != pid) { 154 printf("Child's exit status not captured\n"); 155 return TEST_FAIL; 156 } 157 158 return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL : 159 TEST_PASS; 160 } 161 return TEST_PASS; 162 } 163 164 int main(int argc, char *argv[]) 165 { 166 return test_harness(ptrace_tm_vsx, "ptrace_tm_vsx"); 167 } 168