1*50d9c30aSKajol Jain // SPDX-License-Identifier: GPL-2.0-only
2*50d9c30aSKajol Jain /*
3*50d9c30aSKajol Jain * Copyright 2022, Kajol Jain, IBM Corp.
4*50d9c30aSKajol Jain */
5*50d9c30aSKajol Jain
6*50d9c30aSKajol Jain #include <stdio.h>
7*50d9c30aSKajol Jain #include <stdlib.h>
8*50d9c30aSKajol Jain
9*50d9c30aSKajol Jain #include "../event.h"
10*50d9c30aSKajol Jain #include "misc.h"
11*50d9c30aSKajol Jain #include "utils.h"
12*50d9c30aSKajol Jain
13*50d9c30aSKajol Jain /*
14*50d9c30aSKajol Jain * Primary PMU event used here is PM_MRK_INST_CMPL (0x401e0)
15*50d9c30aSKajol Jain * Threshold event selection used is issue to complete for cycles
16*50d9c30aSKajol Jain * Sampling criteria is Load only sampling
17*50d9c30aSKajol Jain */
18*50d9c30aSKajol Jain #define p9_EventCode 0x13E35340401e0
19*50d9c30aSKajol Jain #define p10_EventCode 0x35340401e0
20*50d9c30aSKajol Jain
21*50d9c30aSKajol Jain extern void thirty_two_instruction_loop_with_ll_sc(u64 loops, u64 *ll_sc_target);
22*50d9c30aSKajol Jain
23*50d9c30aSKajol Jain /* A perf sampling test to test mmcra fields */
mmcra_thresh_cmp(void)24*50d9c30aSKajol Jain static int mmcra_thresh_cmp(void)
25*50d9c30aSKajol Jain {
26*50d9c30aSKajol Jain struct event event;
27*50d9c30aSKajol Jain u64 *intr_regs;
28*50d9c30aSKajol Jain u64 dummy;
29*50d9c30aSKajol Jain
30*50d9c30aSKajol Jain /* Check for platform support for the test */
31*50d9c30aSKajol Jain SKIP_IF(check_pvr_for_sampling_tests());
32*50d9c30aSKajol Jain
33*50d9c30aSKajol Jain /* Skip for comapt mode */
34*50d9c30aSKajol Jain SKIP_IF(check_for_compat_mode());
35*50d9c30aSKajol Jain
36*50d9c30aSKajol Jain /* Init the event for the sampling test */
37*50d9c30aSKajol Jain if (!have_hwcap2(PPC_FEATURE2_ARCH_3_1)) {
38*50d9c30aSKajol Jain event_init_sampling(&event, p9_EventCode);
39*50d9c30aSKajol Jain } else {
40*50d9c30aSKajol Jain event_init_sampling(&event, p10_EventCode);
41*50d9c30aSKajol Jain event.attr.config1 = 1000;
42*50d9c30aSKajol Jain }
43*50d9c30aSKajol Jain
44*50d9c30aSKajol Jain event.attr.sample_regs_intr = platform_extended_mask;
45*50d9c30aSKajol Jain FAIL_IF(event_open(&event));
46*50d9c30aSKajol Jain event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
47*50d9c30aSKajol Jain
48*50d9c30aSKajol Jain FAIL_IF(event_enable(&event));
49*50d9c30aSKajol Jain
50*50d9c30aSKajol Jain /* workload to make the event overflow */
51*50d9c30aSKajol Jain thirty_two_instruction_loop_with_ll_sc(1000000, &dummy);
52*50d9c30aSKajol Jain
53*50d9c30aSKajol Jain FAIL_IF(event_disable(&event));
54*50d9c30aSKajol Jain
55*50d9c30aSKajol Jain /* Check for sample count */
56*50d9c30aSKajol Jain FAIL_IF(!collect_samples(event.mmap_buffer));
57*50d9c30aSKajol Jain
58*50d9c30aSKajol Jain intr_regs = get_intr_regs(&event, event.mmap_buffer);
59*50d9c30aSKajol Jain
60*50d9c30aSKajol Jain /* Check for intr_regs */
61*50d9c30aSKajol Jain FAIL_IF(!intr_regs);
62*50d9c30aSKajol Jain
63*50d9c30aSKajol Jain /* Verify that thresh cmp match with the corresponding event code fields */
64*50d9c30aSKajol Jain FAIL_IF(get_thresh_cmp_val(event) !=
65*50d9c30aSKajol Jain get_mmcra_thd_cmp(get_reg_value(intr_regs, "MMCRA"), 4));
66*50d9c30aSKajol Jain
67*50d9c30aSKajol Jain event_close(&event);
68*50d9c30aSKajol Jain return 0;
69*50d9c30aSKajol Jain }
70*50d9c30aSKajol Jain
main(void)71*50d9c30aSKajol Jain int main(void)
72*50d9c30aSKajol Jain {
73*50d9c30aSKajol Jain FAIL_IF(test_harness(mmcra_thresh_cmp, "mmcra_thresh_cmp"));
74*50d9c30aSKajol Jain }
75