1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * tools/testing/selftests/kvm/lib/x86_64/svm.c 4 * Helpers used for nested SVM testing 5 * Largely inspired from KVM unit test svm.c 6 * 7 * Copyright (C) 2020, Red Hat, Inc. 8 */ 9 10 #include "test_util.h" 11 #include "kvm_util.h" 12 #include "../kvm_util_internal.h" 13 #include "processor.h" 14 #include "svm_util.h" 15 16 struct gpr64_regs guest_regs; 17 u64 rflags; 18 19 /* Allocate memory regions for nested SVM tests. 20 * 21 * Input Args: 22 * vm - The VM to allocate guest-virtual addresses in. 23 * 24 * Output Args: 25 * p_svm_gva - The guest virtual address for the struct svm_test_data. 26 * 27 * Return: 28 * Pointer to structure with the addresses of the SVM areas. 29 */ 30 struct svm_test_data * 31 vcpu_alloc_svm(struct kvm_vm *vm, vm_vaddr_t *p_svm_gva) 32 { 33 vm_vaddr_t svm_gva = vm_vaddr_alloc(vm, getpagesize(), 34 0x10000, 0, 0); 35 struct svm_test_data *svm = addr_gva2hva(vm, svm_gva); 36 37 svm->vmcb = (void *)vm_vaddr_alloc(vm, getpagesize(), 38 0x10000, 0, 0); 39 svm->vmcb_hva = addr_gva2hva(vm, (uintptr_t)svm->vmcb); 40 svm->vmcb_gpa = addr_gva2gpa(vm, (uintptr_t)svm->vmcb); 41 42 svm->save_area = (void *)vm_vaddr_alloc(vm, getpagesize(), 43 0x10000, 0, 0); 44 svm->save_area_hva = addr_gva2hva(vm, (uintptr_t)svm->save_area); 45 svm->save_area_gpa = addr_gva2gpa(vm, (uintptr_t)svm->save_area); 46 47 *p_svm_gva = svm_gva; 48 return svm; 49 } 50 51 static void vmcb_set_seg(struct vmcb_seg *seg, u16 selector, 52 u64 base, u32 limit, u32 attr) 53 { 54 seg->selector = selector; 55 seg->attrib = attr; 56 seg->limit = limit; 57 seg->base = base; 58 } 59 60 void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp) 61 { 62 struct vmcb *vmcb = svm->vmcb; 63 uint64_t vmcb_gpa = svm->vmcb_gpa; 64 struct vmcb_save_area *save = &vmcb->save; 65 struct vmcb_control_area *ctrl = &vmcb->control; 66 u32 data_seg_attr = 3 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 67 | SVM_SELECTOR_DB_MASK | SVM_SELECTOR_G_MASK; 68 u32 code_seg_attr = 9 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 69 | SVM_SELECTOR_L_MASK | SVM_SELECTOR_G_MASK; 70 uint64_t efer; 71 72 efer = rdmsr(MSR_EFER); 73 wrmsr(MSR_EFER, efer | EFER_SVME); 74 wrmsr(MSR_VM_HSAVE_PA, svm->save_area_gpa); 75 76 memset(vmcb, 0, sizeof(*vmcb)); 77 asm volatile ("vmsave %0\n\t" : : "a" (vmcb_gpa) : "memory"); 78 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); 79 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); 80 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); 81 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); 82 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); 83 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); 84 85 ctrl->asid = 1; 86 save->cpl = 0; 87 save->efer = rdmsr(MSR_EFER); 88 asm volatile ("mov %%cr4, %0" : "=r"(save->cr4) : : "memory"); 89 asm volatile ("mov %%cr3, %0" : "=r"(save->cr3) : : "memory"); 90 asm volatile ("mov %%cr0, %0" : "=r"(save->cr0) : : "memory"); 91 asm volatile ("mov %%dr7, %0" : "=r"(save->dr7) : : "memory"); 92 asm volatile ("mov %%dr6, %0" : "=r"(save->dr6) : : "memory"); 93 asm volatile ("mov %%cr2, %0" : "=r"(save->cr2) : : "memory"); 94 save->g_pat = rdmsr(MSR_IA32_CR_PAT); 95 save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR); 96 ctrl->intercept = (1ULL << INTERCEPT_VMRUN) | 97 (1ULL << INTERCEPT_VMMCALL); 98 99 vmcb->save.rip = (u64)guest_rip; 100 vmcb->save.rsp = (u64)guest_rsp; 101 guest_regs.rdi = (u64)svm; 102 } 103 104 /* 105 * save/restore 64-bit general registers except rax, rip, rsp 106 * which are directly handed through the VMCB guest processor state 107 */ 108 #define SAVE_GPR_C \ 109 "xchg %%rbx, guest_regs+0x20\n\t" \ 110 "xchg %%rcx, guest_regs+0x10\n\t" \ 111 "xchg %%rdx, guest_regs+0x18\n\t" \ 112 "xchg %%rbp, guest_regs+0x30\n\t" \ 113 "xchg %%rsi, guest_regs+0x38\n\t" \ 114 "xchg %%rdi, guest_regs+0x40\n\t" \ 115 "xchg %%r8, guest_regs+0x48\n\t" \ 116 "xchg %%r9, guest_regs+0x50\n\t" \ 117 "xchg %%r10, guest_regs+0x58\n\t" \ 118 "xchg %%r11, guest_regs+0x60\n\t" \ 119 "xchg %%r12, guest_regs+0x68\n\t" \ 120 "xchg %%r13, guest_regs+0x70\n\t" \ 121 "xchg %%r14, guest_regs+0x78\n\t" \ 122 "xchg %%r15, guest_regs+0x80\n\t" 123 124 #define LOAD_GPR_C SAVE_GPR_C 125 126 /* 127 * selftests do not use interrupts so we dropped clgi/sti/cli/stgi 128 * for now. registers involved in LOAD/SAVE_GPR_C are eventually 129 * unmodified so they do not need to be in the clobber list. 130 */ 131 void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa) 132 { 133 asm volatile ( 134 "vmload %[vmcb_gpa]\n\t" 135 "mov rflags, %%r15\n\t" // rflags 136 "mov %%r15, 0x170(%[vmcb])\n\t" 137 "mov guest_regs, %%r15\n\t" // rax 138 "mov %%r15, 0x1f8(%[vmcb])\n\t" 139 LOAD_GPR_C 140 "vmrun %[vmcb_gpa]\n\t" 141 SAVE_GPR_C 142 "mov 0x170(%[vmcb]), %%r15\n\t" // rflags 143 "mov %%r15, rflags\n\t" 144 "mov 0x1f8(%[vmcb]), %%r15\n\t" // rax 145 "mov %%r15, guest_regs\n\t" 146 "vmsave %[vmcb_gpa]\n\t" 147 : : [vmcb] "r" (vmcb), [vmcb_gpa] "a" (vmcb_gpa) 148 : "r15", "memory"); 149 } 150 151 bool nested_svm_supported(void) 152 { 153 struct kvm_cpuid_entry2 *entry = 154 kvm_get_supported_cpuid_entry(0x80000001); 155 156 return entry->ecx & CPUID_SVM; 157 } 158 159 void nested_svm_check_supported(void) 160 { 161 if (!nested_svm_supported()) { 162 print_skip("nested SVM not enabled"); 163 exit(KSFT_SKIP); 164 } 165 } 166