1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * tools/testing/selftests/kvm/lib/x86_64/svm.c 4 * Helpers used for nested SVM testing 5 * Largely inspired from KVM unit test svm.c 6 * 7 * Copyright (C) 2020, Red Hat, Inc. 8 */ 9 10 #include "test_util.h" 11 #include "kvm_util.h" 12 #include "../kvm_util_internal.h" 13 #include "processor.h" 14 #include "svm_util.h" 15 16 #define SEV_DEV_PATH "/dev/sev" 17 18 struct gpr64_regs guest_regs; 19 u64 rflags; 20 21 /* Allocate memory regions for nested SVM tests. 22 * 23 * Input Args: 24 * vm - The VM to allocate guest-virtual addresses in. 25 * 26 * Output Args: 27 * p_svm_gva - The guest virtual address for the struct svm_test_data. 28 * 29 * Return: 30 * Pointer to structure with the addresses of the SVM areas. 31 */ 32 struct svm_test_data * 33 vcpu_alloc_svm(struct kvm_vm *vm, vm_vaddr_t *p_svm_gva) 34 { 35 vm_vaddr_t svm_gva = vm_vaddr_alloc_page(vm); 36 struct svm_test_data *svm = addr_gva2hva(vm, svm_gva); 37 38 svm->vmcb = (void *)vm_vaddr_alloc_page(vm); 39 svm->vmcb_hva = addr_gva2hva(vm, (uintptr_t)svm->vmcb); 40 svm->vmcb_gpa = addr_gva2gpa(vm, (uintptr_t)svm->vmcb); 41 42 svm->save_area = (void *)vm_vaddr_alloc_page(vm); 43 svm->save_area_hva = addr_gva2hva(vm, (uintptr_t)svm->save_area); 44 svm->save_area_gpa = addr_gva2gpa(vm, (uintptr_t)svm->save_area); 45 46 *p_svm_gva = svm_gva; 47 return svm; 48 } 49 50 static void vmcb_set_seg(struct vmcb_seg *seg, u16 selector, 51 u64 base, u32 limit, u32 attr) 52 { 53 seg->selector = selector; 54 seg->attrib = attr; 55 seg->limit = limit; 56 seg->base = base; 57 } 58 59 /* 60 * Avoid using memset to clear the vmcb, since libc may not be 61 * available in L1 (and, even if it is, features that libc memset may 62 * want to use, like AVX, may not be enabled). 63 */ 64 static void clear_vmcb(struct vmcb *vmcb) 65 { 66 int n = sizeof(*vmcb) / sizeof(u32); 67 68 asm volatile ("rep stosl" : "+c"(n), "+D"(vmcb) : "a"(0) : "memory"); 69 } 70 71 void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp) 72 { 73 struct vmcb *vmcb = svm->vmcb; 74 uint64_t vmcb_gpa = svm->vmcb_gpa; 75 struct vmcb_save_area *save = &vmcb->save; 76 struct vmcb_control_area *ctrl = &vmcb->control; 77 u32 data_seg_attr = 3 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 78 | SVM_SELECTOR_DB_MASK | SVM_SELECTOR_G_MASK; 79 u32 code_seg_attr = 9 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 80 | SVM_SELECTOR_L_MASK | SVM_SELECTOR_G_MASK; 81 uint64_t efer; 82 83 efer = rdmsr(MSR_EFER); 84 wrmsr(MSR_EFER, efer | EFER_SVME); 85 wrmsr(MSR_VM_HSAVE_PA, svm->save_area_gpa); 86 87 clear_vmcb(vmcb); 88 asm volatile ("vmsave %0\n\t" : : "a" (vmcb_gpa) : "memory"); 89 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); 90 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); 91 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); 92 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); 93 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); 94 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); 95 96 ctrl->asid = 1; 97 save->cpl = 0; 98 save->efer = rdmsr(MSR_EFER); 99 asm volatile ("mov %%cr4, %0" : "=r"(save->cr4) : : "memory"); 100 asm volatile ("mov %%cr3, %0" : "=r"(save->cr3) : : "memory"); 101 asm volatile ("mov %%cr0, %0" : "=r"(save->cr0) : : "memory"); 102 asm volatile ("mov %%dr7, %0" : "=r"(save->dr7) : : "memory"); 103 asm volatile ("mov %%dr6, %0" : "=r"(save->dr6) : : "memory"); 104 asm volatile ("mov %%cr2, %0" : "=r"(save->cr2) : : "memory"); 105 save->g_pat = rdmsr(MSR_IA32_CR_PAT); 106 save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR); 107 ctrl->intercept = (1ULL << INTERCEPT_VMRUN) | 108 (1ULL << INTERCEPT_VMMCALL); 109 110 vmcb->save.rip = (u64)guest_rip; 111 vmcb->save.rsp = (u64)guest_rsp; 112 guest_regs.rdi = (u64)svm; 113 } 114 115 /* 116 * save/restore 64-bit general registers except rax, rip, rsp 117 * which are directly handed through the VMCB guest processor state 118 */ 119 #define SAVE_GPR_C \ 120 "xchg %%rbx, guest_regs+0x20\n\t" \ 121 "xchg %%rcx, guest_regs+0x10\n\t" \ 122 "xchg %%rdx, guest_regs+0x18\n\t" \ 123 "xchg %%rbp, guest_regs+0x30\n\t" \ 124 "xchg %%rsi, guest_regs+0x38\n\t" \ 125 "xchg %%rdi, guest_regs+0x40\n\t" \ 126 "xchg %%r8, guest_regs+0x48\n\t" \ 127 "xchg %%r9, guest_regs+0x50\n\t" \ 128 "xchg %%r10, guest_regs+0x58\n\t" \ 129 "xchg %%r11, guest_regs+0x60\n\t" \ 130 "xchg %%r12, guest_regs+0x68\n\t" \ 131 "xchg %%r13, guest_regs+0x70\n\t" \ 132 "xchg %%r14, guest_regs+0x78\n\t" \ 133 "xchg %%r15, guest_regs+0x80\n\t" 134 135 #define LOAD_GPR_C SAVE_GPR_C 136 137 /* 138 * selftests do not use interrupts so we dropped clgi/sti/cli/stgi 139 * for now. registers involved in LOAD/SAVE_GPR_C are eventually 140 * unmodified so they do not need to be in the clobber list. 141 */ 142 void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa) 143 { 144 asm volatile ( 145 "vmload %[vmcb_gpa]\n\t" 146 "mov rflags, %%r15\n\t" // rflags 147 "mov %%r15, 0x170(%[vmcb])\n\t" 148 "mov guest_regs, %%r15\n\t" // rax 149 "mov %%r15, 0x1f8(%[vmcb])\n\t" 150 LOAD_GPR_C 151 "vmrun %[vmcb_gpa]\n\t" 152 SAVE_GPR_C 153 "mov 0x170(%[vmcb]), %%r15\n\t" // rflags 154 "mov %%r15, rflags\n\t" 155 "mov 0x1f8(%[vmcb]), %%r15\n\t" // rax 156 "mov %%r15, guest_regs\n\t" 157 "vmsave %[vmcb_gpa]\n\t" 158 : : [vmcb] "r" (vmcb), [vmcb_gpa] "a" (vmcb_gpa) 159 : "r15", "memory"); 160 } 161 162 bool nested_svm_supported(void) 163 { 164 struct kvm_cpuid_entry2 *entry = 165 kvm_get_supported_cpuid_entry(0x80000001); 166 167 return entry->ecx & CPUID_SVM; 168 } 169 170 void nested_svm_check_supported(void) 171 { 172 if (!nested_svm_supported()) { 173 print_skip("nested SVM not enabled"); 174 exit(KSFT_SKIP); 175 } 176 } 177 178 /* 179 * Open SEV_DEV_PATH if available, otherwise exit the entire program. 180 * 181 * Return: 182 * The opened file descriptor of /dev/sev. 183 */ 184 int open_sev_dev_path_or_exit(void) 185 { 186 return open_path_or_exit(SEV_DEV_PATH, 0); 187 } 188