1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ARM Generic Interrupt Controller (GIC) v3 host support 4 */ 5 6 #include <linux/kvm.h> 7 #include <linux/sizes.h> 8 #include <asm/kvm_para.h> 9 #include <asm/kvm.h> 10 11 #include "kvm_util.h" 12 #include "../kvm_util_internal.h" 13 #include "vgic.h" 14 #include "gic.h" 15 #include "gic_v3.h" 16 17 /* 18 * vGIC-v3 default host setup 19 * 20 * Input args: 21 * vm - KVM VM 22 * nr_vcpus - Number of vCPUs supported by this VM 23 * gicd_base_gpa - Guest Physical Address of the Distributor region 24 * gicr_base_gpa - Guest Physical Address of the Redistributor region 25 * 26 * Output args: None 27 * 28 * Return: GIC file-descriptor or negative error code upon failure 29 * 30 * The function creates a vGIC-v3 device and maps the distributor and 31 * redistributor regions of the guest. Since it depends on the number of 32 * vCPUs for the VM, it must be called after all the vCPUs have been created. 33 */ 34 int vgic_v3_setup(struct kvm_vm *vm, unsigned int nr_vcpus, uint32_t nr_irqs, 35 uint64_t gicd_base_gpa, uint64_t gicr_base_gpa) 36 { 37 int gic_fd; 38 uint64_t redist_attr; 39 struct list_head *iter; 40 unsigned int nr_gic_pages, nr_vcpus_created = 0; 41 42 TEST_ASSERT(nr_vcpus, "Number of vCPUs cannot be empty\n"); 43 44 /* 45 * Make sure that the caller is infact calling this 46 * function after all the vCPUs are added. 47 */ 48 list_for_each(iter, &vm->vcpus) 49 nr_vcpus_created++; 50 TEST_ASSERT(nr_vcpus == nr_vcpus_created, 51 "Number of vCPUs requested (%u) doesn't match with the ones created for the VM (%u)\n", 52 nr_vcpus, nr_vcpus_created); 53 54 /* Distributor setup */ 55 gic_fd = kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_V3, false); 56 57 kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 58 0, &nr_irqs, true); 59 60 kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 61 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true); 62 63 kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR, 64 KVM_VGIC_V3_ADDR_TYPE_DIST, &gicd_base_gpa, true); 65 nr_gic_pages = vm_calc_num_guest_pages(vm->mode, KVM_VGIC_V3_DIST_SIZE); 66 virt_map(vm, gicd_base_gpa, gicd_base_gpa, nr_gic_pages); 67 68 /* Redistributor setup */ 69 redist_attr = REDIST_REGION_ATTR_ADDR(nr_vcpus, gicr_base_gpa, 0, 0); 70 kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR, 71 KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION, &redist_attr, true); 72 nr_gic_pages = vm_calc_num_guest_pages(vm->mode, 73 KVM_VGIC_V3_REDIST_SIZE * nr_vcpus); 74 virt_map(vm, gicr_base_gpa, gicr_base_gpa, nr_gic_pages); 75 76 kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, 77 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true); 78 79 return gic_fd; 80 } 81 82 /* should only work for level sensitive interrupts */ 83 int _kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level) 84 { 85 uint64_t attr = 32 * (intid / 32); 86 uint64_t index = intid % 32; 87 uint64_t val; 88 int ret; 89 90 ret = _kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO, 91 attr, &val, false); 92 if (ret != 0) 93 return ret; 94 95 val |= 1U << index; 96 ret = _kvm_device_access(gic_fd, KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO, 97 attr, &val, true); 98 return ret; 99 } 100 101 void kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level) 102 { 103 int ret = _kvm_irq_set_level_info(gic_fd, intid, level); 104 105 TEST_ASSERT(ret == 0, "KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO failed, " 106 "rc: %i errno: %i", ret, errno); 107 } 108 109 int _kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level) 110 { 111 uint32_t irq = intid & KVM_ARM_IRQ_NUM_MASK; 112 113 TEST_ASSERT(!INTID_IS_SGI(intid), "KVM_IRQ_LINE's interface itself " 114 "doesn't allow injecting SGIs. There's no mask for it."); 115 116 if (INTID_IS_PPI(intid)) 117 irq |= KVM_ARM_IRQ_TYPE_PPI << KVM_ARM_IRQ_TYPE_SHIFT; 118 else 119 irq |= KVM_ARM_IRQ_TYPE_SPI << KVM_ARM_IRQ_TYPE_SHIFT; 120 121 return _kvm_irq_line(vm, irq, level); 122 } 123 124 void kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level) 125 { 126 int ret = _kvm_arm_irq_line(vm, intid, level); 127 128 TEST_ASSERT(ret == 0, "KVM_IRQ_LINE failed, rc: %i errno: %i", 129 ret, errno); 130 } 131 132 static void vgic_poke_irq(int gic_fd, uint32_t intid, 133 uint32_t vcpu, uint64_t reg_off) 134 { 135 uint64_t reg = intid / 32; 136 uint64_t index = intid % 32; 137 uint64_t attr = reg_off + reg * 4; 138 uint64_t val; 139 bool intid_is_private = INTID_IS_SGI(intid) || INTID_IS_PPI(intid); 140 141 /* Check that the addr part of the attr is within 32 bits. */ 142 assert(attr <= KVM_DEV_ARM_VGIC_OFFSET_MASK); 143 144 uint32_t group = intid_is_private ? KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 145 : KVM_DEV_ARM_VGIC_GRP_DIST_REGS; 146 147 if (intid_is_private) { 148 /* TODO: only vcpu 0 implemented for now. */ 149 assert(vcpu == 0); 150 attr += SZ_64K; 151 } 152 153 /* All calls will succeed, even with invalid intid's, as long as the 154 * addr part of the attr is within 32 bits (checked above). An invalid 155 * intid will just make the read/writes point to above the intended 156 * register space (i.e., ICPENDR after ISPENDR). 157 */ 158 kvm_device_access(gic_fd, group, attr, &val, false); 159 val |= 1ULL << index; 160 kvm_device_access(gic_fd, group, attr, &val, true); 161 } 162 163 void kvm_irq_write_ispendr(int gic_fd, uint32_t intid, uint32_t vcpu) 164 { 165 vgic_poke_irq(gic_fd, intid, vcpu, GICD_ISPENDR); 166 } 167 168 void kvm_irq_write_isactiver(int gic_fd, uint32_t intid, uint32_t vcpu) 169 { 170 vgic_poke_irq(gic_fd, intid, vcpu, GICD_ISACTIVER); 171 } 172