1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * tools/testing/selftests/kvm/include/x86_64/hyperv.h 4 * 5 * Copyright (C) 2021, Red Hat, Inc. 6 * 7 */ 8 9 #ifndef SELFTEST_KVM_HYPERV_H 10 #define SELFTEST_KVM_HYPERV_H 11 12 #include "processor.h" 13 14 #define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000 15 #define HYPERV_CPUID_INTERFACE 0x40000001 16 #define HYPERV_CPUID_VERSION 0x40000002 17 #define HYPERV_CPUID_FEATURES 0x40000003 18 #define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004 19 #define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005 20 #define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES 0x40000007 21 #define HYPERV_CPUID_NESTED_FEATURES 0x4000000A 22 #define HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS 0x40000080 23 #define HYPERV_CPUID_SYNDBG_INTERFACE 0x40000081 24 #define HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES 0x40000082 25 26 #define HV_X64_MSR_GUEST_OS_ID 0x40000000 27 #define HV_X64_MSR_HYPERCALL 0x40000001 28 #define HV_X64_MSR_VP_INDEX 0x40000002 29 #define HV_X64_MSR_RESET 0x40000003 30 #define HV_X64_MSR_VP_RUNTIME 0x40000010 31 #define HV_X64_MSR_TIME_REF_COUNT 0x40000020 32 #define HV_X64_MSR_REFERENCE_TSC 0x40000021 33 #define HV_X64_MSR_TSC_FREQUENCY 0x40000022 34 #define HV_X64_MSR_APIC_FREQUENCY 0x40000023 35 #define HV_X64_MSR_EOI 0x40000070 36 #define HV_X64_MSR_ICR 0x40000071 37 #define HV_X64_MSR_TPR 0x40000072 38 #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073 39 #define HV_X64_MSR_SCONTROL 0x40000080 40 #define HV_X64_MSR_SVERSION 0x40000081 41 #define HV_X64_MSR_SIEFP 0x40000082 42 #define HV_X64_MSR_SIMP 0x40000083 43 #define HV_X64_MSR_EOM 0x40000084 44 #define HV_X64_MSR_SINT0 0x40000090 45 #define HV_X64_MSR_SINT1 0x40000091 46 #define HV_X64_MSR_SINT2 0x40000092 47 #define HV_X64_MSR_SINT3 0x40000093 48 #define HV_X64_MSR_SINT4 0x40000094 49 #define HV_X64_MSR_SINT5 0x40000095 50 #define HV_X64_MSR_SINT6 0x40000096 51 #define HV_X64_MSR_SINT7 0x40000097 52 #define HV_X64_MSR_SINT8 0x40000098 53 #define HV_X64_MSR_SINT9 0x40000099 54 #define HV_X64_MSR_SINT10 0x4000009A 55 #define HV_X64_MSR_SINT11 0x4000009B 56 #define HV_X64_MSR_SINT12 0x4000009C 57 #define HV_X64_MSR_SINT13 0x4000009D 58 #define HV_X64_MSR_SINT14 0x4000009E 59 #define HV_X64_MSR_SINT15 0x4000009F 60 #define HV_X64_MSR_STIMER0_CONFIG 0x400000B0 61 #define HV_X64_MSR_STIMER0_COUNT 0x400000B1 62 #define HV_X64_MSR_STIMER1_CONFIG 0x400000B2 63 #define HV_X64_MSR_STIMER1_COUNT 0x400000B3 64 #define HV_X64_MSR_STIMER2_CONFIG 0x400000B4 65 #define HV_X64_MSR_STIMER2_COUNT 0x400000B5 66 #define HV_X64_MSR_STIMER3_CONFIG 0x400000B6 67 #define HV_X64_MSR_STIMER3_COUNT 0x400000B7 68 #define HV_X64_MSR_GUEST_IDLE 0x400000F0 69 #define HV_X64_MSR_CRASH_P0 0x40000100 70 #define HV_X64_MSR_CRASH_P1 0x40000101 71 #define HV_X64_MSR_CRASH_P2 0x40000102 72 #define HV_X64_MSR_CRASH_P3 0x40000103 73 #define HV_X64_MSR_CRASH_P4 0x40000104 74 #define HV_X64_MSR_CRASH_CTL 0x40000105 75 #define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106 76 #define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107 77 #define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108 78 #define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118 79 80 #define HV_X64_MSR_SYNDBG_CONTROL 0x400000F1 81 #define HV_X64_MSR_SYNDBG_STATUS 0x400000F2 82 #define HV_X64_MSR_SYNDBG_SEND_BUFFER 0x400000F3 83 #define HV_X64_MSR_SYNDBG_RECV_BUFFER 0x400000F4 84 #define HV_X64_MSR_SYNDBG_PENDING_BUFFER 0x400000F5 85 #define HV_X64_MSR_SYNDBG_OPTIONS 0x400000FF 86 87 /* HYPERV_CPUID_FEATURES.EAX */ 88 #define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0) 89 #define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1) 90 #define HV_MSR_SYNIC_AVAILABLE BIT(2) 91 #define HV_MSR_SYNTIMER_AVAILABLE BIT(3) 92 #define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4) 93 #define HV_MSR_HYPERCALL_AVAILABLE BIT(5) 94 #define HV_MSR_VP_INDEX_AVAILABLE BIT(6) 95 #define HV_MSR_RESET_AVAILABLE BIT(7) 96 #define HV_MSR_STAT_PAGES_AVAILABLE BIT(8) 97 #define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9) 98 #define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10) 99 #define HV_ACCESS_FREQUENCY_MSRS BIT(11) 100 #define HV_ACCESS_REENLIGHTENMENT BIT(13) 101 #define HV_ACCESS_TSC_INVARIANT BIT(15) 102 103 /* HYPERV_CPUID_FEATURES.EBX */ 104 #define HV_CREATE_PARTITIONS BIT(0) 105 #define HV_ACCESS_PARTITION_ID BIT(1) 106 #define HV_ACCESS_MEMORY_POOL BIT(2) 107 #define HV_ADJUST_MESSAGE_BUFFERS BIT(3) 108 #define HV_POST_MESSAGES BIT(4) 109 #define HV_SIGNAL_EVENTS BIT(5) 110 #define HV_CREATE_PORT BIT(6) 111 #define HV_CONNECT_PORT BIT(7) 112 #define HV_ACCESS_STATS BIT(8) 113 #define HV_DEBUGGING BIT(11) 114 #define HV_CPU_MANAGEMENT BIT(12) 115 #define HV_ISOLATION BIT(22) 116 117 /* HYPERV_CPUID_FEATURES.EDX */ 118 #define HV_X64_MWAIT_AVAILABLE BIT(0) 119 #define HV_X64_GUEST_DEBUGGING_AVAILABLE BIT(1) 120 #define HV_X64_PERF_MONITOR_AVAILABLE BIT(2) 121 #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3) 122 #define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE BIT(4) 123 #define HV_X64_GUEST_IDLE_STATE_AVAILABLE BIT(5) 124 #define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE BIT(8) 125 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(10) 126 #define HV_FEATURE_DEBUG_MSRS_AVAILABLE BIT(11) 127 #define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(19) 128 129 /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 130 #define HV_X64_AS_SWITCH_RECOMMENDED BIT(0) 131 #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED BIT(1) 132 #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED BIT(2) 133 #define HV_X64_APIC_ACCESS_RECOMMENDED BIT(3) 134 #define HV_X64_SYSTEM_RESET_RECOMMENDED BIT(4) 135 #define HV_X64_RELAXED_TIMING_RECOMMENDED BIT(5) 136 #define HV_DEPRECATING_AEOI_RECOMMENDED BIT(9) 137 #define HV_X64_CLUSTER_IPI_RECOMMENDED BIT(10) 138 #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED BIT(11) 139 #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED BIT(14) 140 141 /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 142 #define HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING BIT(1) 143 144 /* Hypercalls */ 145 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 146 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 147 #define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 148 #define HVCALL_SEND_IPI 0x000b 149 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 150 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 151 #define HVCALL_SEND_IPI_EX 0x0015 152 #define HVCALL_GET_PARTITION_ID 0x0046 153 #define HVCALL_DEPOSIT_MEMORY 0x0048 154 #define HVCALL_CREATE_VP 0x004e 155 #define HVCALL_GET_VP_REGISTERS 0x0050 156 #define HVCALL_SET_VP_REGISTERS 0x0051 157 #define HVCALL_POST_MESSAGE 0x005c 158 #define HVCALL_SIGNAL_EVENT 0x005d 159 #define HVCALL_POST_DEBUG_DATA 0x0069 160 #define HVCALL_RETRIEVE_DEBUG_DATA 0x006a 161 #define HVCALL_RESET_DEBUG_SESSION 0x006b 162 #define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076 163 #define HVCALL_MAP_DEVICE_INTERRUPT 0x007c 164 #define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d 165 #define HVCALL_RETARGET_INTERRUPT 0x007e 166 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af 167 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0 168 169 #define HV_FLUSH_ALL_PROCESSORS BIT(0) 170 #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) 171 #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) 172 #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) 173 174 /* hypercall status code */ 175 #define HV_STATUS_SUCCESS 0 176 #define HV_STATUS_INVALID_HYPERCALL_CODE 2 177 #define HV_STATUS_INVALID_HYPERCALL_INPUT 3 178 #define HV_STATUS_INVALID_ALIGNMENT 4 179 #define HV_STATUS_INVALID_PARAMETER 5 180 #define HV_STATUS_ACCESS_DENIED 6 181 #define HV_STATUS_OPERATION_DENIED 8 182 #define HV_STATUS_INSUFFICIENT_MEMORY 11 183 #define HV_STATUS_INVALID_PORT_ID 17 184 #define HV_STATUS_INVALID_CONNECTION_ID 18 185 #define HV_STATUS_INSUFFICIENT_BUFFERS 19 186 187 /* hypercall options */ 188 #define HV_HYPERCALL_FAST_BIT BIT(16) 189 #define HV_HYPERCALL_VARHEAD_OFFSET 17 190 #define HV_HYPERCALL_REP_COMP_OFFSET 32 191 192 /* 193 * Issue a Hyper-V hypercall. Returns exception vector raised or 0, 'hv_status' 194 * is set to the hypercall status (if no exception occurred). 195 */ 196 static inline uint8_t __hyperv_hypercall(u64 control, vm_vaddr_t input_address, 197 vm_vaddr_t output_address, 198 uint64_t *hv_status) 199 { 200 uint64_t error_code; 201 uint8_t vector; 202 203 /* Note both the hypercall and the "asm safe" clobber r9-r11. */ 204 asm volatile("mov %[output_address], %%r8\n\t" 205 KVM_ASM_SAFE("vmcall") 206 : "=a" (*hv_status), 207 "+c" (control), "+d" (input_address), 208 KVM_ASM_SAFE_OUTPUTS(vector, error_code) 209 : [output_address] "r"(output_address), 210 "a" (-EFAULT) 211 : "cc", "memory", "r8", KVM_ASM_SAFE_CLOBBERS); 212 return vector; 213 } 214 215 /* Issue a Hyper-V hypercall and assert that it succeeded. */ 216 static inline void hyperv_hypercall(u64 control, vm_vaddr_t input_address, 217 vm_vaddr_t output_address) 218 { 219 uint64_t hv_status; 220 uint8_t vector; 221 222 vector = __hyperv_hypercall(control, input_address, output_address, &hv_status); 223 224 GUEST_ASSERT(!vector); 225 GUEST_ASSERT((hv_status & 0xffff) == 0); 226 } 227 228 /* Write 'Fast' hypercall input 'data' to the first 'n_sse_regs' SSE regs */ 229 static inline void hyperv_write_xmm_input(void *data, int n_sse_regs) 230 { 231 int i; 232 233 for (i = 0; i < n_sse_regs; i++) 234 write_sse_reg(i, (sse128_t *)(data + sizeof(sse128_t) * i)); 235 } 236 237 /* Proper HV_X64_MSR_GUEST_OS_ID value */ 238 #define HYPERV_LINUX_OS_ID ((u64)0x8100 << 48) 239 240 #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073 241 #define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001 242 #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12 243 #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \ 244 (~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1)) 245 246 struct hv_nested_enlightenments_control { 247 struct { 248 __u32 directhypercall:1; 249 __u32 reserved:31; 250 } features; 251 struct { 252 __u32 reserved; 253 } hypercallControls; 254 } __packed; 255 256 /* Define virtual processor assist page structure. */ 257 struct hv_vp_assist_page { 258 __u32 apic_assist; 259 __u32 reserved1; 260 __u64 vtl_control[3]; 261 struct hv_nested_enlightenments_control nested_control; 262 __u8 enlighten_vmentry; 263 __u8 reserved2[7]; 264 __u64 current_nested_vmcs; 265 } __packed; 266 267 extern struct hv_vp_assist_page *current_vp_assist; 268 269 int enable_vp_assist(uint64_t vp_assist_pa, void *vp_assist); 270 271 struct hyperv_test_pages { 272 /* VP assist page */ 273 void *vp_assist_hva; 274 uint64_t vp_assist_gpa; 275 void *vp_assist; 276 277 /* Partition assist page */ 278 void *partition_assist_hva; 279 uint64_t partition_assist_gpa; 280 void *partition_assist; 281 282 /* Enlightened VMCS */ 283 void *enlightened_vmcs_hva; 284 uint64_t enlightened_vmcs_gpa; 285 void *enlightened_vmcs; 286 }; 287 288 struct hyperv_test_pages *vcpu_alloc_hyperv_test_pages(struct kvm_vm *vm, 289 vm_vaddr_t *p_hv_pages_gva); 290 291 #endif /* !SELFTEST_KVM_HYPERV_H */ 292