1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * tools/testing/selftests/kvm/include/x86_64/hyperv.h
4  *
5  * Copyright (C) 2021, Red Hat, Inc.
6  *
7  */
8 
9 #ifndef SELFTEST_KVM_HYPERV_H
10 #define SELFTEST_KVM_HYPERV_H
11 
12 #define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS	0x40000000
13 #define HYPERV_CPUID_INTERFACE			0x40000001
14 #define HYPERV_CPUID_VERSION			0x40000002
15 #define HYPERV_CPUID_FEATURES			0x40000003
16 #define HYPERV_CPUID_ENLIGHTMENT_INFO		0x40000004
17 #define HYPERV_CPUID_IMPLEMENT_LIMITS		0x40000005
18 #define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES	0x40000007
19 #define HYPERV_CPUID_NESTED_FEATURES		0x4000000A
20 #define HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS	0x40000080
21 #define HYPERV_CPUID_SYNDBG_INTERFACE			0x40000081
22 #define HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES	0x40000082
23 
24 #define HV_X64_MSR_GUEST_OS_ID			0x40000000
25 #define HV_X64_MSR_HYPERCALL			0x40000001
26 #define HV_X64_MSR_VP_INDEX			0x40000002
27 #define HV_X64_MSR_RESET			0x40000003
28 #define HV_X64_MSR_VP_RUNTIME			0x40000010
29 #define HV_X64_MSR_TIME_REF_COUNT		0x40000020
30 #define HV_X64_MSR_REFERENCE_TSC		0x40000021
31 #define HV_X64_MSR_TSC_FREQUENCY		0x40000022
32 #define HV_X64_MSR_APIC_FREQUENCY		0x40000023
33 #define HV_X64_MSR_EOI				0x40000070
34 #define HV_X64_MSR_ICR				0x40000071
35 #define HV_X64_MSR_TPR				0x40000072
36 #define HV_X64_MSR_VP_ASSIST_PAGE		0x40000073
37 #define HV_X64_MSR_SCONTROL			0x40000080
38 #define HV_X64_MSR_SVERSION			0x40000081
39 #define HV_X64_MSR_SIEFP			0x40000082
40 #define HV_X64_MSR_SIMP				0x40000083
41 #define HV_X64_MSR_EOM				0x40000084
42 #define HV_X64_MSR_SINT0			0x40000090
43 #define HV_X64_MSR_SINT1			0x40000091
44 #define HV_X64_MSR_SINT2			0x40000092
45 #define HV_X64_MSR_SINT3			0x40000093
46 #define HV_X64_MSR_SINT4			0x40000094
47 #define HV_X64_MSR_SINT5			0x40000095
48 #define HV_X64_MSR_SINT6			0x40000096
49 #define HV_X64_MSR_SINT7			0x40000097
50 #define HV_X64_MSR_SINT8			0x40000098
51 #define HV_X64_MSR_SINT9			0x40000099
52 #define HV_X64_MSR_SINT10			0x4000009A
53 #define HV_X64_MSR_SINT11			0x4000009B
54 #define HV_X64_MSR_SINT12			0x4000009C
55 #define HV_X64_MSR_SINT13			0x4000009D
56 #define HV_X64_MSR_SINT14			0x4000009E
57 #define HV_X64_MSR_SINT15			0x4000009F
58 #define HV_X64_MSR_STIMER0_CONFIG		0x400000B0
59 #define HV_X64_MSR_STIMER0_COUNT		0x400000B1
60 #define HV_X64_MSR_STIMER1_CONFIG		0x400000B2
61 #define HV_X64_MSR_STIMER1_COUNT		0x400000B3
62 #define HV_X64_MSR_STIMER2_CONFIG		0x400000B4
63 #define HV_X64_MSR_STIMER2_COUNT		0x400000B5
64 #define HV_X64_MSR_STIMER3_CONFIG		0x400000B6
65 #define HV_X64_MSR_STIMER3_COUNT		0x400000B7
66 #define HV_X64_MSR_GUEST_IDLE			0x400000F0
67 #define HV_X64_MSR_CRASH_P0			0x40000100
68 #define HV_X64_MSR_CRASH_P1			0x40000101
69 #define HV_X64_MSR_CRASH_P2			0x40000102
70 #define HV_X64_MSR_CRASH_P3			0x40000103
71 #define HV_X64_MSR_CRASH_P4			0x40000104
72 #define HV_X64_MSR_CRASH_CTL			0x40000105
73 #define HV_X64_MSR_REENLIGHTENMENT_CONTROL	0x40000106
74 #define HV_X64_MSR_TSC_EMULATION_CONTROL	0x40000107
75 #define HV_X64_MSR_TSC_EMULATION_STATUS		0x40000108
76 #define HV_X64_MSR_TSC_INVARIANT_CONTROL	0x40000118
77 
78 #define HV_X64_MSR_SYNDBG_CONTROL		0x400000F1
79 #define HV_X64_MSR_SYNDBG_STATUS		0x400000F2
80 #define HV_X64_MSR_SYNDBG_SEND_BUFFER		0x400000F3
81 #define HV_X64_MSR_SYNDBG_RECV_BUFFER		0x400000F4
82 #define HV_X64_MSR_SYNDBG_PENDING_BUFFER	0x400000F5
83 #define HV_X64_MSR_SYNDBG_OPTIONS		0x400000FF
84 
85 /* HYPERV_CPUID_FEATURES.EAX */
86 #define HV_MSR_VP_RUNTIME_AVAILABLE		BIT(0)
87 #define HV_MSR_TIME_REF_COUNT_AVAILABLE		BIT(1)
88 #define HV_MSR_SYNIC_AVAILABLE			BIT(2)
89 #define HV_MSR_SYNTIMER_AVAILABLE		BIT(3)
90 #define HV_MSR_APIC_ACCESS_AVAILABLE		BIT(4)
91 #define HV_MSR_HYPERCALL_AVAILABLE		BIT(5)
92 #define HV_MSR_VP_INDEX_AVAILABLE		BIT(6)
93 #define HV_MSR_RESET_AVAILABLE			BIT(7)
94 #define HV_MSR_STAT_PAGES_AVAILABLE		BIT(8)
95 #define HV_MSR_REFERENCE_TSC_AVAILABLE		BIT(9)
96 #define HV_MSR_GUEST_IDLE_AVAILABLE		BIT(10)
97 #define HV_ACCESS_FREQUENCY_MSRS		BIT(11)
98 #define HV_ACCESS_REENLIGHTENMENT		BIT(13)
99 #define HV_ACCESS_TSC_INVARIANT			BIT(15)
100 
101 /* HYPERV_CPUID_FEATURES.EBX */
102 #define HV_CREATE_PARTITIONS			BIT(0)
103 #define HV_ACCESS_PARTITION_ID			BIT(1)
104 #define HV_ACCESS_MEMORY_POOL			BIT(2)
105 #define HV_ADJUST_MESSAGE_BUFFERS		BIT(3)
106 #define HV_POST_MESSAGES			BIT(4)
107 #define HV_SIGNAL_EVENTS			BIT(5)
108 #define HV_CREATE_PORT				BIT(6)
109 #define HV_CONNECT_PORT				BIT(7)
110 #define HV_ACCESS_STATS				BIT(8)
111 #define HV_DEBUGGING				BIT(11)
112 #define HV_CPU_MANAGEMENT			BIT(12)
113 #define HV_ISOLATION				BIT(22)
114 
115 /* HYPERV_CPUID_FEATURES.EDX */
116 #define HV_X64_MWAIT_AVAILABLE				BIT(0)
117 #define HV_X64_GUEST_DEBUGGING_AVAILABLE		BIT(1)
118 #define HV_X64_PERF_MONITOR_AVAILABLE			BIT(2)
119 #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE	BIT(3)
120 #define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE		BIT(4)
121 #define HV_X64_GUEST_IDLE_STATE_AVAILABLE		BIT(5)
122 #define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE		BIT(8)
123 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE		BIT(10)
124 #define HV_FEATURE_DEBUG_MSRS_AVAILABLE			BIT(11)
125 #define HV_STIMER_DIRECT_MODE_AVAILABLE			BIT(19)
126 
127 /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
128 #define HV_X64_AS_SWITCH_RECOMMENDED			BIT(0)
129 #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED		BIT(1)
130 #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED		BIT(2)
131 #define HV_X64_APIC_ACCESS_RECOMMENDED			BIT(3)
132 #define HV_X64_SYSTEM_RESET_RECOMMENDED			BIT(4)
133 #define HV_X64_RELAXED_TIMING_RECOMMENDED		BIT(5)
134 #define HV_DEPRECATING_AEOI_RECOMMENDED			BIT(9)
135 #define HV_X64_CLUSTER_IPI_RECOMMENDED			BIT(10)
136 #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED		BIT(11)
137 #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED		BIT(14)
138 
139 /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
140 #define HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING	BIT(1)
141 
142 /* Hypercalls */
143 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE	0x0002
144 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST	0x0003
145 #define HVCALL_NOTIFY_LONG_SPIN_WAIT		0x0008
146 #define HVCALL_SEND_IPI				0x000b
147 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX	0x0013
148 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX	0x0014
149 #define HVCALL_SEND_IPI_EX			0x0015
150 #define HVCALL_GET_PARTITION_ID			0x0046
151 #define HVCALL_DEPOSIT_MEMORY			0x0048
152 #define HVCALL_CREATE_VP			0x004e
153 #define HVCALL_GET_VP_REGISTERS			0x0050
154 #define HVCALL_SET_VP_REGISTERS			0x0051
155 #define HVCALL_POST_MESSAGE			0x005c
156 #define HVCALL_SIGNAL_EVENT			0x005d
157 #define HVCALL_POST_DEBUG_DATA			0x0069
158 #define HVCALL_RETRIEVE_DEBUG_DATA		0x006a
159 #define HVCALL_RESET_DEBUG_SESSION		0x006b
160 #define HVCALL_ADD_LOGICAL_PROCESSOR		0x0076
161 #define HVCALL_MAP_DEVICE_INTERRUPT		0x007c
162 #define HVCALL_UNMAP_DEVICE_INTERRUPT		0x007d
163 #define HVCALL_RETARGET_INTERRUPT		0x007e
164 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
165 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
166 
167 #define HV_FLUSH_ALL_PROCESSORS			BIT(0)
168 #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES	BIT(1)
169 #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY	BIT(2)
170 #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT	BIT(3)
171 
172 /* hypercall status code */
173 #define HV_STATUS_SUCCESS			0
174 #define HV_STATUS_INVALID_HYPERCALL_CODE	2
175 #define HV_STATUS_INVALID_HYPERCALL_INPUT	3
176 #define HV_STATUS_INVALID_ALIGNMENT		4
177 #define HV_STATUS_INVALID_PARAMETER		5
178 #define HV_STATUS_ACCESS_DENIED			6
179 #define HV_STATUS_OPERATION_DENIED		8
180 #define HV_STATUS_INSUFFICIENT_MEMORY		11
181 #define HV_STATUS_INVALID_PORT_ID		17
182 #define HV_STATUS_INVALID_CONNECTION_ID		18
183 #define HV_STATUS_INSUFFICIENT_BUFFERS		19
184 
185 /* hypercall options */
186 #define HV_HYPERCALL_FAST_BIT		BIT(16)
187 
188 #endif /* !SELFTEST_KVM_HYPERV_H */
189