1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * tools/testing/selftests/kvm/include/x86_64/hyperv.h 4 * 5 * Copyright (C) 2021, Red Hat, Inc. 6 * 7 */ 8 9 #ifndef SELFTEST_KVM_HYPERV_H 10 #define SELFTEST_KVM_HYPERV_H 11 12 #include "processor.h" 13 14 #define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000 15 #define HYPERV_CPUID_INTERFACE 0x40000001 16 #define HYPERV_CPUID_VERSION 0x40000002 17 #define HYPERV_CPUID_FEATURES 0x40000003 18 #define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004 19 #define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005 20 #define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES 0x40000007 21 #define HYPERV_CPUID_NESTED_FEATURES 0x4000000A 22 #define HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS 0x40000080 23 #define HYPERV_CPUID_SYNDBG_INTERFACE 0x40000081 24 #define HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES 0x40000082 25 26 #define HV_X64_MSR_GUEST_OS_ID 0x40000000 27 #define HV_X64_MSR_HYPERCALL 0x40000001 28 #define HV_X64_MSR_VP_INDEX 0x40000002 29 #define HV_X64_MSR_RESET 0x40000003 30 #define HV_X64_MSR_VP_RUNTIME 0x40000010 31 #define HV_X64_MSR_TIME_REF_COUNT 0x40000020 32 #define HV_X64_MSR_REFERENCE_TSC 0x40000021 33 #define HV_X64_MSR_TSC_FREQUENCY 0x40000022 34 #define HV_X64_MSR_APIC_FREQUENCY 0x40000023 35 #define HV_X64_MSR_EOI 0x40000070 36 #define HV_X64_MSR_ICR 0x40000071 37 #define HV_X64_MSR_TPR 0x40000072 38 #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073 39 #define HV_X64_MSR_SCONTROL 0x40000080 40 #define HV_X64_MSR_SVERSION 0x40000081 41 #define HV_X64_MSR_SIEFP 0x40000082 42 #define HV_X64_MSR_SIMP 0x40000083 43 #define HV_X64_MSR_EOM 0x40000084 44 #define HV_X64_MSR_SINT0 0x40000090 45 #define HV_X64_MSR_SINT1 0x40000091 46 #define HV_X64_MSR_SINT2 0x40000092 47 #define HV_X64_MSR_SINT3 0x40000093 48 #define HV_X64_MSR_SINT4 0x40000094 49 #define HV_X64_MSR_SINT5 0x40000095 50 #define HV_X64_MSR_SINT6 0x40000096 51 #define HV_X64_MSR_SINT7 0x40000097 52 #define HV_X64_MSR_SINT8 0x40000098 53 #define HV_X64_MSR_SINT9 0x40000099 54 #define HV_X64_MSR_SINT10 0x4000009A 55 #define HV_X64_MSR_SINT11 0x4000009B 56 #define HV_X64_MSR_SINT12 0x4000009C 57 #define HV_X64_MSR_SINT13 0x4000009D 58 #define HV_X64_MSR_SINT14 0x4000009E 59 #define HV_X64_MSR_SINT15 0x4000009F 60 #define HV_X64_MSR_STIMER0_CONFIG 0x400000B0 61 #define HV_X64_MSR_STIMER0_COUNT 0x400000B1 62 #define HV_X64_MSR_STIMER1_CONFIG 0x400000B2 63 #define HV_X64_MSR_STIMER1_COUNT 0x400000B3 64 #define HV_X64_MSR_STIMER2_CONFIG 0x400000B4 65 #define HV_X64_MSR_STIMER2_COUNT 0x400000B5 66 #define HV_X64_MSR_STIMER3_CONFIG 0x400000B6 67 #define HV_X64_MSR_STIMER3_COUNT 0x400000B7 68 #define HV_X64_MSR_GUEST_IDLE 0x400000F0 69 #define HV_X64_MSR_CRASH_P0 0x40000100 70 #define HV_X64_MSR_CRASH_P1 0x40000101 71 #define HV_X64_MSR_CRASH_P2 0x40000102 72 #define HV_X64_MSR_CRASH_P3 0x40000103 73 #define HV_X64_MSR_CRASH_P4 0x40000104 74 #define HV_X64_MSR_CRASH_CTL 0x40000105 75 #define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106 76 #define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107 77 #define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108 78 #define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118 79 80 #define HV_X64_MSR_SYNDBG_CONTROL 0x400000F1 81 #define HV_X64_MSR_SYNDBG_STATUS 0x400000F2 82 #define HV_X64_MSR_SYNDBG_SEND_BUFFER 0x400000F3 83 #define HV_X64_MSR_SYNDBG_RECV_BUFFER 0x400000F4 84 #define HV_X64_MSR_SYNDBG_PENDING_BUFFER 0x400000F5 85 #define HV_X64_MSR_SYNDBG_OPTIONS 0x400000FF 86 87 /* HYPERV_CPUID_FEATURES.EAX */ 88 #define HV_MSR_VP_RUNTIME_AVAILABLE \ 89 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 0) 90 #define HV_MSR_TIME_REF_COUNT_AVAILABLE \ 91 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 1) 92 #define HV_MSR_SYNIC_AVAILABLE \ 93 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 2) 94 #define HV_MSR_SYNTIMER_AVAILABLE \ 95 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 3) 96 #define HV_MSR_APIC_ACCESS_AVAILABLE \ 97 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 4) 98 #define HV_MSR_HYPERCALL_AVAILABLE \ 99 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 5) 100 #define HV_MSR_VP_INDEX_AVAILABLE \ 101 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 6) 102 #define HV_MSR_RESET_AVAILABLE \ 103 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 7) 104 #define HV_MSR_STAT_PAGES_AVAILABLE \ 105 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 8) 106 #define HV_MSR_REFERENCE_TSC_AVAILABLE \ 107 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 9) 108 #define HV_MSR_GUEST_IDLE_AVAILABLE \ 109 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 10) 110 #define HV_ACCESS_FREQUENCY_MSRS \ 111 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 11) 112 #define HV_ACCESS_REENLIGHTENMENT \ 113 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 13) 114 #define HV_ACCESS_TSC_INVARIANT \ 115 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 15) 116 117 /* HYPERV_CPUID_FEATURES.EBX */ 118 #define HV_CREATE_PARTITIONS \ 119 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 0) 120 #define HV_ACCESS_PARTITION_ID \ 121 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 1) 122 #define HV_ACCESS_MEMORY_POOL \ 123 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 2) 124 #define HV_ADJUST_MESSAGE_BUFFERS \ 125 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 3) 126 #define HV_POST_MESSAGES \ 127 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 4) 128 #define HV_SIGNAL_EVENTS \ 129 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 5) 130 #define HV_CREATE_PORT \ 131 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 6) 132 #define HV_CONNECT_PORT \ 133 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 7) 134 #define HV_ACCESS_STATS \ 135 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 8) 136 #define HV_DEBUGGING \ 137 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 11) 138 #define HV_CPU_MANAGEMENT \ 139 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 12) 140 #define HV_ISOLATION \ 141 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 22) 142 143 /* HYPERV_CPUID_FEATURES.EDX */ 144 #define HV_X64_MWAIT_AVAILABLE \ 145 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 0) 146 #define HV_X64_GUEST_DEBUGGING_AVAILABLE \ 147 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 1) 148 #define HV_X64_PERF_MONITOR_AVAILABLE \ 149 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 2) 150 #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE \ 151 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 3) 152 #define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE \ 153 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 4) 154 #define HV_X64_GUEST_IDLE_STATE_AVAILABLE \ 155 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 5) 156 #define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE \ 157 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 8) 158 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE \ 159 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 10) 160 #define HV_FEATURE_DEBUG_MSRS_AVAILABLE \ 161 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 11) 162 #define HV_STIMER_DIRECT_MODE_AVAILABLE \ 163 KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 19) 164 165 /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 166 #define HV_X64_AS_SWITCH_RECOMMENDED \ 167 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 0) 168 #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED \ 169 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 1) 170 #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED \ 171 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 2) 172 #define HV_X64_APIC_ACCESS_RECOMMENDED \ 173 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 3) 174 #define HV_X64_SYSTEM_RESET_RECOMMENDED \ 175 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 4) 176 #define HV_X64_RELAXED_TIMING_RECOMMENDED \ 177 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 5) 178 #define HV_DEPRECATING_AEOI_RECOMMENDED \ 179 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 9) 180 #define HV_X64_CLUSTER_IPI_RECOMMENDED \ 181 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 10) 182 #define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED \ 183 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 11) 184 #define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED \ 185 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 14) 186 187 /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 188 #define HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING \ 189 KVM_X86_CPU_FEATURE(HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES, 0, EAX, 1) 190 191 /* Hypercalls */ 192 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 193 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 194 #define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 195 #define HVCALL_SEND_IPI 0x000b 196 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 197 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 198 #define HVCALL_SEND_IPI_EX 0x0015 199 #define HVCALL_GET_PARTITION_ID 0x0046 200 #define HVCALL_DEPOSIT_MEMORY 0x0048 201 #define HVCALL_CREATE_VP 0x004e 202 #define HVCALL_GET_VP_REGISTERS 0x0050 203 #define HVCALL_SET_VP_REGISTERS 0x0051 204 #define HVCALL_POST_MESSAGE 0x005c 205 #define HVCALL_SIGNAL_EVENT 0x005d 206 #define HVCALL_POST_DEBUG_DATA 0x0069 207 #define HVCALL_RETRIEVE_DEBUG_DATA 0x006a 208 #define HVCALL_RESET_DEBUG_SESSION 0x006b 209 #define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076 210 #define HVCALL_MAP_DEVICE_INTERRUPT 0x007c 211 #define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d 212 #define HVCALL_RETARGET_INTERRUPT 0x007e 213 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af 214 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0 215 216 #define HV_FLUSH_ALL_PROCESSORS BIT(0) 217 #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) 218 #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) 219 #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) 220 221 /* hypercall status code */ 222 #define HV_STATUS_SUCCESS 0 223 #define HV_STATUS_INVALID_HYPERCALL_CODE 2 224 #define HV_STATUS_INVALID_HYPERCALL_INPUT 3 225 #define HV_STATUS_INVALID_ALIGNMENT 4 226 #define HV_STATUS_INVALID_PARAMETER 5 227 #define HV_STATUS_ACCESS_DENIED 6 228 #define HV_STATUS_OPERATION_DENIED 8 229 #define HV_STATUS_INSUFFICIENT_MEMORY 11 230 #define HV_STATUS_INVALID_PORT_ID 17 231 #define HV_STATUS_INVALID_CONNECTION_ID 18 232 #define HV_STATUS_INSUFFICIENT_BUFFERS 19 233 234 /* hypercall options */ 235 #define HV_HYPERCALL_FAST_BIT BIT(16) 236 #define HV_HYPERCALL_VARHEAD_OFFSET 17 237 #define HV_HYPERCALL_REP_COMP_OFFSET 32 238 239 /* 240 * Issue a Hyper-V hypercall. Returns exception vector raised or 0, 'hv_status' 241 * is set to the hypercall status (if no exception occurred). 242 */ 243 static inline uint8_t __hyperv_hypercall(u64 control, vm_vaddr_t input_address, 244 vm_vaddr_t output_address, 245 uint64_t *hv_status) 246 { 247 uint64_t error_code; 248 uint8_t vector; 249 250 /* Note both the hypercall and the "asm safe" clobber r9-r11. */ 251 asm volatile("mov %[output_address], %%r8\n\t" 252 KVM_ASM_SAFE("vmcall") 253 : "=a" (*hv_status), 254 "+c" (control), "+d" (input_address), 255 KVM_ASM_SAFE_OUTPUTS(vector, error_code) 256 : [output_address] "r"(output_address), 257 "a" (-EFAULT) 258 : "cc", "memory", "r8", KVM_ASM_SAFE_CLOBBERS); 259 return vector; 260 } 261 262 /* Issue a Hyper-V hypercall and assert that it succeeded. */ 263 static inline void hyperv_hypercall(u64 control, vm_vaddr_t input_address, 264 vm_vaddr_t output_address) 265 { 266 uint64_t hv_status; 267 uint8_t vector; 268 269 vector = __hyperv_hypercall(control, input_address, output_address, &hv_status); 270 271 GUEST_ASSERT(!vector); 272 GUEST_ASSERT((hv_status & 0xffff) == 0); 273 } 274 275 /* Write 'Fast' hypercall input 'data' to the first 'n_sse_regs' SSE regs */ 276 static inline void hyperv_write_xmm_input(void *data, int n_sse_regs) 277 { 278 int i; 279 280 for (i = 0; i < n_sse_regs; i++) 281 write_sse_reg(i, (sse128_t *)(data + sizeof(sse128_t) * i)); 282 } 283 284 /* Proper HV_X64_MSR_GUEST_OS_ID value */ 285 #define HYPERV_LINUX_OS_ID ((u64)0x8100 << 48) 286 287 #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073 288 #define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001 289 #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12 290 #define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \ 291 (~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1)) 292 293 struct hv_nested_enlightenments_control { 294 struct { 295 __u32 directhypercall:1; 296 __u32 reserved:31; 297 } features; 298 struct { 299 __u32 reserved; 300 } hypercallControls; 301 } __packed; 302 303 /* Define virtual processor assist page structure. */ 304 struct hv_vp_assist_page { 305 __u32 apic_assist; 306 __u32 reserved1; 307 __u64 vtl_control[3]; 308 struct hv_nested_enlightenments_control nested_control; 309 __u8 enlighten_vmentry; 310 __u8 reserved2[7]; 311 __u64 current_nested_vmcs; 312 } __packed; 313 314 extern struct hv_vp_assist_page *current_vp_assist; 315 316 int enable_vp_assist(uint64_t vp_assist_pa, void *vp_assist); 317 318 struct hyperv_test_pages { 319 /* VP assist page */ 320 void *vp_assist_hva; 321 uint64_t vp_assist_gpa; 322 void *vp_assist; 323 324 /* Partition assist page */ 325 void *partition_assist_hva; 326 uint64_t partition_assist_gpa; 327 void *partition_assist; 328 329 /* Enlightened VMCS */ 330 void *enlightened_vmcs_hva; 331 uint64_t enlightened_vmcs_gpa; 332 void *enlightened_vmcs; 333 }; 334 335 struct hyperv_test_pages *vcpu_alloc_hyperv_test_pages(struct kvm_vm *vm, 336 vm_vaddr_t *p_hv_pages_gva); 337 338 #endif /* !SELFTEST_KVM_HYPERV_H */ 339