1 {
2 	"add+sub+mul",
3 	.insns = {
4 	BPF_MOV64_IMM(BPF_REG_1, 1),
5 	BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 2),
6 	BPF_MOV64_IMM(BPF_REG_2, 3),
7 	BPF_ALU64_REG(BPF_SUB, BPF_REG_1, BPF_REG_2),
8 	BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -1),
9 	BPF_ALU64_IMM(BPF_MUL, BPF_REG_1, 3),
10 	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
11 	BPF_EXIT_INSN(),
12 	},
13 	.result = ACCEPT,
14 	.retval = -3,
15 },
16 {
17 	"xor32 zero extend check",
18 	.insns = {
19 	BPF_MOV32_IMM(BPF_REG_2, -1),
20 	BPF_ALU64_IMM(BPF_LSH, BPF_REG_2, 32),
21 	BPF_ALU64_IMM(BPF_OR, BPF_REG_2, 0xffff),
22 	BPF_ALU32_REG(BPF_XOR, BPF_REG_2, BPF_REG_2),
23 	BPF_MOV32_IMM(BPF_REG_0, 2),
24 	BPF_JMP_IMM(BPF_JNE, BPF_REG_2, 0, 1),
25 	BPF_MOV32_IMM(BPF_REG_0, 1),
26 	BPF_EXIT_INSN(),
27 	},
28 	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
29 	.result = ACCEPT,
30 	.retval = 1,
31 },
32 {
33 	"arsh32 on imm",
34 	.insns = {
35 	BPF_MOV64_IMM(BPF_REG_0, 1),
36 	BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 5),
37 	BPF_EXIT_INSN(),
38 	},
39 	.result = ACCEPT,
40 	.retval = 0,
41 },
42 {
43 	"arsh32 on imm 2",
44 	.insns = {
45 	BPF_LD_IMM64(BPF_REG_0, 0x1122334485667788),
46 	BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 7),
47 	BPF_EXIT_INSN(),
48 	},
49 	.result = ACCEPT,
50 	.retval = -16069393,
51 },
52 {
53 	"arsh32 on reg",
54 	.insns = {
55 	BPF_MOV64_IMM(BPF_REG_0, 1),
56 	BPF_MOV64_IMM(BPF_REG_1, 5),
57 	BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
58 	BPF_EXIT_INSN(),
59 	},
60 	.result = ACCEPT,
61 	.retval = 0,
62 },
63 {
64 	"arsh32 on reg 2",
65 	.insns = {
66 	BPF_LD_IMM64(BPF_REG_0, 0xffff55667788),
67 	BPF_MOV64_IMM(BPF_REG_1, 15),
68 	BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
69 	BPF_EXIT_INSN(),
70 	},
71 	.result = ACCEPT,
72 	.retval = 43724,
73 },
74 {
75 	"arsh64 on imm",
76 	.insns = {
77 	BPF_MOV64_IMM(BPF_REG_0, 1),
78 	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_0, 5),
79 	BPF_EXIT_INSN(),
80 	},
81 	.result = ACCEPT,
82 },
83 {
84 	"arsh64 on reg",
85 	.insns = {
86 	BPF_MOV64_IMM(BPF_REG_0, 1),
87 	BPF_MOV64_IMM(BPF_REG_1, 5),
88 	BPF_ALU64_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
89 	BPF_EXIT_INSN(),
90 	},
91 	.result = ACCEPT,
92 },
93 {
94 	"invalid 64-bit BPF_END",
95 	.insns = {
96 	BPF_MOV32_IMM(BPF_REG_0, 0),
97 	{
98 		.code  = BPF_ALU64 | BPF_END | BPF_TO_LE,
99 		.dst_reg = BPF_REG_0,
100 		.src_reg = 0,
101 		.off   = 0,
102 		.imm   = 32,
103 	},
104 	BPF_EXIT_INSN(),
105 	},
106 	.errstr = "unknown opcode d7",
107 	.result = REJECT,
108 },
109 {
110 	"mov64 src == dst",
111 	.insns = {
112 	BPF_MOV64_IMM(BPF_REG_2, 0),
113 	BPF_MOV64_REG(BPF_REG_2, BPF_REG_2),
114 	// Check bounds are OK
115 	BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
116 	BPF_MOV64_IMM(BPF_REG_0, 0),
117 	BPF_EXIT_INSN(),
118 	},
119 	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
120 	.result = ACCEPT,
121 },
122 {
123 	"mov64 src != dst",
124 	.insns = {
125 	BPF_MOV64_IMM(BPF_REG_3, 0),
126 	BPF_MOV64_REG(BPF_REG_2, BPF_REG_3),
127 	// Check bounds are OK
128 	BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
129 	BPF_MOV64_IMM(BPF_REG_0, 0),
130 	BPF_EXIT_INSN(),
131 	},
132 	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
133 	.result = ACCEPT,
134 },
135