1e9b60476SAmit Daniel Kachhap /* SPDX-License-Identifier: GPL-2.0 */
2e9b60476SAmit Daniel Kachhap /* Copyright (C) 2020 ARM Limited */
3e9b60476SAmit Daniel Kachhap 
4e9b60476SAmit Daniel Kachhap /*
5e9b60476SAmit Daniel Kachhap  * Below definitions may be found in kernel headers, However, they are
6e9b60476SAmit Daniel Kachhap  * redefined here to decouple the MTE selftests compilations from them.
7e9b60476SAmit Daniel Kachhap  */
8e9b60476SAmit Daniel Kachhap #ifndef SEGV_MTEAERR
9e9b60476SAmit Daniel Kachhap #define	SEGV_MTEAERR	8
10e9b60476SAmit Daniel Kachhap #endif
11e9b60476SAmit Daniel Kachhap #ifndef SEGV_MTESERR
12e9b60476SAmit Daniel Kachhap #define	SEGV_MTESERR	9
13e9b60476SAmit Daniel Kachhap #endif
14e9b60476SAmit Daniel Kachhap #ifndef PROT_MTE
15e9b60476SAmit Daniel Kachhap #define PROT_MTE	 0x20
16e9b60476SAmit Daniel Kachhap #endif
17e9b60476SAmit Daniel Kachhap #ifndef HWCAP2_MTE
18e9b60476SAmit Daniel Kachhap #define HWCAP2_MTE	(1 << 18)
19e9b60476SAmit Daniel Kachhap #endif
20e9b60476SAmit Daniel Kachhap 
21e9b60476SAmit Daniel Kachhap #ifndef PR_MTE_TCF_SHIFT
22e9b60476SAmit Daniel Kachhap #define PR_MTE_TCF_SHIFT	1
23e9b60476SAmit Daniel Kachhap #endif
24e9b60476SAmit Daniel Kachhap #ifndef PR_MTE_TCF_NONE
25e9b60476SAmit Daniel Kachhap #define PR_MTE_TCF_NONE		(0UL << PR_MTE_TCF_SHIFT)
26e9b60476SAmit Daniel Kachhap #endif
27e9b60476SAmit Daniel Kachhap #ifndef PR_MTE_TCF_SYNC
28e9b60476SAmit Daniel Kachhap #define	PR_MTE_TCF_SYNC		(1UL << PR_MTE_TCF_SHIFT)
29e9b60476SAmit Daniel Kachhap #endif
30e9b60476SAmit Daniel Kachhap #ifndef PR_MTE_TCF_ASYNC
31e9b60476SAmit Daniel Kachhap #define PR_MTE_TCF_ASYNC	(2UL << PR_MTE_TCF_SHIFT)
32e9b60476SAmit Daniel Kachhap #endif
33e9b60476SAmit Daniel Kachhap #ifndef PR_MTE_TAG_SHIFT
34e9b60476SAmit Daniel Kachhap #define	PR_MTE_TAG_SHIFT	3
35e9b60476SAmit Daniel Kachhap #endif
36e9b60476SAmit Daniel Kachhap 
37e9b60476SAmit Daniel Kachhap /* MTE Hardware feature definitions below. */
38e9b60476SAmit Daniel Kachhap #define MT_TAG_SHIFT		56
39e9b60476SAmit Daniel Kachhap #define MT_TAG_MASK		0xFUL
40e9b60476SAmit Daniel Kachhap #define MT_FREE_TAG		0x0UL
41e9b60476SAmit Daniel Kachhap #define MT_GRANULE_SIZE         16
42e9b60476SAmit Daniel Kachhap #define MT_TAG_COUNT		16
43e9b60476SAmit Daniel Kachhap #define MT_INCLUDE_TAG_MASK	0xFFFF
44e9b60476SAmit Daniel Kachhap #define MT_EXCLUDE_TAG_MASK	0x0
45e9b60476SAmit Daniel Kachhap 
46e9b60476SAmit Daniel Kachhap #define MT_ALIGN_GRANULE	(MT_GRANULE_SIZE - 1)
47e9b60476SAmit Daniel Kachhap #define MT_CLEAR_TAG(x)		((x) & ~(MT_TAG_MASK << MT_TAG_SHIFT))
48e9b60476SAmit Daniel Kachhap #define MT_SET_TAG(x, y)	((x) | (y << MT_TAG_SHIFT))
49e9b60476SAmit Daniel Kachhap #define MT_FETCH_TAG(x)		((x >> MT_TAG_SHIFT) & (MT_TAG_MASK))
50e9b60476SAmit Daniel Kachhap #define MT_ALIGN_UP(x)		((x + MT_ALIGN_GRANULE) & ~(MT_ALIGN_GRANULE))
51e9b60476SAmit Daniel Kachhap 
52e9b60476SAmit Daniel Kachhap #define MT_PSTATE_TCO_SHIFT	25
53e9b60476SAmit Daniel Kachhap #define MT_PSTATE_TCO_MASK	~(0x1 << MT_PSTATE_TCO_SHIFT)
54e9b60476SAmit Daniel Kachhap #define MT_PSTATE_TCO_EN	1
55e9b60476SAmit Daniel Kachhap #define MT_PSTATE_TCO_DIS	0
56e9b60476SAmit Daniel Kachhap 
57e9b60476SAmit Daniel Kachhap #define MT_EXCLUDE_TAG(x)		(1 << (x))
58e9b60476SAmit Daniel Kachhap #define MT_INCLUDE_VALID_TAG(x)		(MT_INCLUDE_TAG_MASK ^ MT_EXCLUDE_TAG(x))
59e9b60476SAmit Daniel Kachhap #define MT_INCLUDE_VALID_TAGS(x)	(MT_INCLUDE_TAG_MASK ^ (x))
60e9b60476SAmit Daniel Kachhap #define MTE_ALLOW_NON_ZERO_TAG		MT_INCLUDE_VALID_TAG(0)
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