1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
4  */
5 #ifndef __NFIT_TEST_H__
6 #define __NFIT_TEST_H__
7 #include <linux/acpi.h>
8 #include <linux/list.h>
9 #include <linux/uuid.h>
10 #include <linux/ioport.h>
11 #include <linux/spinlock_types.h>
12 
13 struct nfit_test_request {
14 	struct list_head list;
15 	struct resource res;
16 };
17 
18 struct nfit_test_resource {
19 	struct list_head requests;
20 	struct list_head list;
21 	struct resource res;
22 	struct device *dev;
23 	spinlock_t lock;
24 	int req_count;
25 	void *buf;
26 };
27 
28 #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA  2
29 #define NFIT_ARS_INJECT_INVALID 2
30 
31 enum err_inj_options {
32 	ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
33 };
34 
35 /* nfit commands */
36 enum nfit_cmd_num {
37 	NFIT_CMD_TRANSLATE_SPA = 5,
38 	NFIT_CMD_ARS_INJECT_SET = 7,
39 	NFIT_CMD_ARS_INJECT_CLEAR = 8,
40 	NFIT_CMD_ARS_INJECT_GET = 9,
41 };
42 
43 struct nd_cmd_translate_spa {
44 	__u64 spa;
45 	__u32 status;
46 	__u8  flags;
47 	__u8  _reserved[3];
48 	__u64 translate_length;
49 	__u32 num_nvdimms;
50 	struct nd_nvdimm_device {
51 		__u32 nfit_device_handle;
52 		__u32 _reserved;
53 		__u64 dpa;
54 	} __packed devices[0];
55 
56 } __packed;
57 
58 struct nd_cmd_ars_err_inj {
59 	__u64 err_inj_spa_range_base;
60 	__u64 err_inj_spa_range_length;
61 	__u8  err_inj_options;
62 	__u32 status;
63 } __packed;
64 
65 struct nd_cmd_ars_err_inj_clr {
66 	__u64 err_inj_clr_spa_range_base;
67 	__u64 err_inj_clr_spa_range_length;
68 	__u32 status;
69 } __packed;
70 
71 struct nd_cmd_ars_err_inj_stat {
72 	__u32 status;
73 	__u32 inj_err_rec_count;
74 	struct nd_error_stat_query_record {
75 		__u64 err_inj_stat_spa_range_base;
76 		__u64 err_inj_stat_spa_range_length;
77 	} __packed record[0];
78 } __packed;
79 
80 #define ND_INTEL_SMART			 1
81 #define ND_INTEL_SMART_THRESHOLD	 2
82 #define ND_INTEL_ENABLE_LSS_STATUS	10
83 #define ND_INTEL_FW_GET_INFO		12
84 #define ND_INTEL_FW_START_UPDATE	13
85 #define ND_INTEL_FW_SEND_DATA		14
86 #define ND_INTEL_FW_FINISH_UPDATE	15
87 #define ND_INTEL_FW_FINISH_QUERY	16
88 #define ND_INTEL_SMART_SET_THRESHOLD	17
89 #define ND_INTEL_SMART_INJECT		18
90 
91 #define ND_INTEL_SMART_HEALTH_VALID             (1 << 0)
92 #define ND_INTEL_SMART_SPARES_VALID             (1 << 1)
93 #define ND_INTEL_SMART_USED_VALID               (1 << 2)
94 #define ND_INTEL_SMART_MTEMP_VALID              (1 << 3)
95 #define ND_INTEL_SMART_CTEMP_VALID              (1 << 4)
96 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
97 #define ND_INTEL_SMART_AIT_STATUS_VALID         (1 << 6)
98 #define ND_INTEL_SMART_PTEMP_VALID              (1 << 7)
99 #define ND_INTEL_SMART_ALARM_VALID              (1 << 9)
100 #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
101 #define ND_INTEL_SMART_VENDOR_VALID             (1 << 11)
102 #define ND_INTEL_SMART_SPARE_TRIP               (1 << 0)
103 #define ND_INTEL_SMART_TEMP_TRIP                (1 << 1)
104 #define ND_INTEL_SMART_CTEMP_TRIP               (1 << 2)
105 #define ND_INTEL_SMART_NON_CRITICAL_HEALTH      (1 << 0)
106 #define ND_INTEL_SMART_CRITICAL_HEALTH          (1 << 1)
107 #define ND_INTEL_SMART_FATAL_HEALTH             (1 << 2)
108 #define ND_INTEL_SMART_INJECT_MTEMP		(1 << 0)
109 #define ND_INTEL_SMART_INJECT_SPARE		(1 << 1)
110 #define ND_INTEL_SMART_INJECT_FATAL		(1 << 2)
111 #define ND_INTEL_SMART_INJECT_SHUTDOWN		(1 << 3)
112 
113 struct nd_intel_smart_threshold {
114 	__u32 status;
115 	union {
116 		struct {
117 			__u16 alarm_control;
118 			__u8 spares;
119 			__u16 media_temperature;
120 			__u16 ctrl_temperature;
121 			__u8 reserved[1];
122 		} __packed;
123 		__u8 data[8];
124 	};
125 } __packed;
126 
127 struct nd_intel_smart_set_threshold {
128 	__u16 alarm_control;
129 	__u8 spares;
130 	__u16 media_temperature;
131 	__u16 ctrl_temperature;
132 	__u32 status;
133 } __packed;
134 
135 struct nd_intel_smart_inject {
136 	__u64 flags;
137 	__u8 mtemp_enable;
138 	__u16 media_temperature;
139 	__u8 spare_enable;
140 	__u8 spares;
141 	__u8 fatal_enable;
142 	__u8 unsafe_shutdown_enable;
143 	__u32 status;
144 } __packed;
145 
146 #define INTEL_FW_STORAGE_SIZE		0x100000
147 #define INTEL_FW_MAX_SEND_LEN		0xFFEC
148 #define INTEL_FW_QUERY_INTERVAL		250000
149 #define INTEL_FW_QUERY_MAX_TIME		3000000
150 #define INTEL_FW_FIS_VERSION		0x0105
151 #define INTEL_FW_FAKE_VERSION		0xffffffffabcd
152 
153 enum intel_fw_update_state {
154 	FW_STATE_NEW = 0,
155 	FW_STATE_IN_PROGRESS,
156 	FW_STATE_VERIFY,
157 	FW_STATE_UPDATED,
158 };
159 
160 struct nd_intel_fw_info {
161 	__u32 status;
162 	__u32 storage_size;
163 	__u32 max_send_len;
164 	__u32 query_interval;
165 	__u32 max_query_time;
166 	__u8 update_cap;
167 	__u8 reserved[3];
168 	__u32 fis_version;
169 	__u64 run_version;
170 	__u64 updated_version;
171 } __packed;
172 
173 struct nd_intel_fw_start {
174 	__u32 status;
175 	__u32 context;
176 } __packed;
177 
178 /* this one has the output first because the variable input data size */
179 struct nd_intel_fw_send_data {
180 	__u32 context;
181 	__u32 offset;
182 	__u32 length;
183 	__u8 data[0];
184 /* this field is not declared due ot variable data from input */
185 /*	__u32 status; */
186 } __packed;
187 
188 struct nd_intel_fw_finish_update {
189 	__u8 ctrl_flags;
190 	__u8 reserved[3];
191 	__u32 context;
192 	__u32 status;
193 } __packed;
194 
195 struct nd_intel_fw_finish_query {
196 	__u32 context;
197 	__u32 status;
198 	__u64 updated_fw_rev;
199 } __packed;
200 
201 struct nd_intel_lss {
202 	__u8 enable;
203 	__u32 status;
204 } __packed;
205 
206 typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
207 typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
208 		 const guid_t *guid, u64 rev, u64 func,
209 		 union acpi_object *argv4);
210 void __wrap_iounmap(volatile void __iomem *addr);
211 void nfit_test_setup(nfit_test_lookup_fn lookup,
212 		nfit_test_evaluate_dsm_fn evaluate);
213 void nfit_test_teardown(void);
214 struct nfit_test_resource *get_nfit_res(resource_size_t resource);
215 #endif
216