15b497af4SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
26bc75619SDan Williams /*
36bc75619SDan Williams  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
46bc75619SDan Williams  */
56bc75619SDan Williams #ifndef __NFIT_TEST_H__
66bc75619SDan Williams #define __NFIT_TEST_H__
759f08896SNathan Chancellor #include <linux/acpi.h>
8f295e53bSDan Williams #include <linux/list.h>
994116f81SAndy Shevchenko #include <linux/uuid.h>
10bd4cd745SDan Williams #include <linux/ioport.h>
11bd4cd745SDan Williams #include <linux/spinlock_types.h>
12bd4cd745SDan Williams 
13bd4cd745SDan Williams struct nfit_test_request {
14bd4cd745SDan Williams 	struct list_head list;
15bd4cd745SDan Williams 	struct resource res;
16bd4cd745SDan Williams };
176bc75619SDan Williams 
186bc75619SDan Williams struct nfit_test_resource {
19bd4cd745SDan Williams 	struct list_head requests;
206bc75619SDan Williams 	struct list_head list;
21bd4cd745SDan Williams 	struct resource res;
226bc75619SDan Williams 	struct device *dev;
23bd4cd745SDan Williams 	spinlock_t lock;
24bd4cd745SDan Williams 	int req_count;
256bc75619SDan Williams 	void *buf;
266bc75619SDan Williams };
276bc75619SDan Williams 
28a586cb49SYasunori Goto #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA  2
299fb1a190SDave Jiang #define NFIT_ARS_INJECT_INVALID 2
309fb1a190SDave Jiang 
319fb1a190SDave Jiang enum err_inj_options {
329fb1a190SDave Jiang 	ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
339fb1a190SDave Jiang };
34a586cb49SYasunori Goto 
35a586cb49SYasunori Goto /* nfit commands */
36a586cb49SYasunori Goto enum nfit_cmd_num {
37a586cb49SYasunori Goto 	NFIT_CMD_TRANSLATE_SPA = 5,
38a586cb49SYasunori Goto 	NFIT_CMD_ARS_INJECT_SET = 7,
39a586cb49SYasunori Goto 	NFIT_CMD_ARS_INJECT_CLEAR = 8,
40a586cb49SYasunori Goto 	NFIT_CMD_ARS_INJECT_GET = 9,
41a586cb49SYasunori Goto };
42a586cb49SYasunori Goto 
43a586cb49SYasunori Goto struct nd_cmd_translate_spa {
44a586cb49SYasunori Goto 	__u64 spa;
45a586cb49SYasunori Goto 	__u32 status;
46a586cb49SYasunori Goto 	__u8  flags;
47a586cb49SYasunori Goto 	__u8  _reserved[3];
48a586cb49SYasunori Goto 	__u64 translate_length;
49a586cb49SYasunori Goto 	__u32 num_nvdimms;
50a586cb49SYasunori Goto 	struct nd_nvdimm_device {
51a586cb49SYasunori Goto 		__u32 nfit_device_handle;
52a586cb49SYasunori Goto 		__u32 _reserved;
53a586cb49SYasunori Goto 		__u64 dpa;
54a5290febSGustavo A. R. Silva 	} __packed devices[];
55a586cb49SYasunori Goto 
56a586cb49SYasunori Goto } __packed;
57a586cb49SYasunori Goto 
58a586cb49SYasunori Goto struct nd_cmd_ars_err_inj {
59a586cb49SYasunori Goto 	__u64 err_inj_spa_range_base;
60a586cb49SYasunori Goto 	__u64 err_inj_spa_range_length;
61a586cb49SYasunori Goto 	__u8  err_inj_options;
62a586cb49SYasunori Goto 	__u32 status;
63a586cb49SYasunori Goto } __packed;
64a586cb49SYasunori Goto 
65a586cb49SYasunori Goto struct nd_cmd_ars_err_inj_clr {
66a586cb49SYasunori Goto 	__u64 err_inj_clr_spa_range_base;
67a586cb49SYasunori Goto 	__u64 err_inj_clr_spa_range_length;
68a586cb49SYasunori Goto 	__u32 status;
69a586cb49SYasunori Goto } __packed;
70a586cb49SYasunori Goto 
71a586cb49SYasunori Goto struct nd_cmd_ars_err_inj_stat {
72a586cb49SYasunori Goto 	__u32 status;
73a586cb49SYasunori Goto 	__u32 inj_err_rec_count;
74a586cb49SYasunori Goto 	struct nd_error_stat_query_record {
75a586cb49SYasunori Goto 		__u64 err_inj_stat_spa_range_base;
76a586cb49SYasunori Goto 		__u64 err_inj_stat_spa_range_length;
77a5290febSGustavo A. R. Silva 	} __packed record[];
78a586cb49SYasunori Goto } __packed;
79a586cb49SYasunori Goto 
80cdd77d3eSDan Williams #define ND_INTEL_SMART			 1
81cdd77d3eSDan Williams #define ND_INTEL_SMART_THRESHOLD	 2
82674d8bdeSDave Jiang #define ND_INTEL_ENABLE_LSS_STATUS	10
83bfbaa952SDave Jiang #define ND_INTEL_FW_GET_INFO		12
84bfbaa952SDave Jiang #define ND_INTEL_FW_START_UPDATE	13
85bfbaa952SDave Jiang #define ND_INTEL_FW_SEND_DATA		14
86bfbaa952SDave Jiang #define ND_INTEL_FW_FINISH_UPDATE	15
87bfbaa952SDave Jiang #define ND_INTEL_FW_FINISH_QUERY	16
88ed07c433SDan Williams #define ND_INTEL_SMART_SET_THRESHOLD	17
894cf260fcSVishal Verma #define ND_INTEL_SMART_INJECT		18
90cdd77d3eSDan Williams 
91cdd77d3eSDan Williams #define ND_INTEL_SMART_HEALTH_VALID             (1 << 0)
92cdd77d3eSDan Williams #define ND_INTEL_SMART_SPARES_VALID             (1 << 1)
93cdd77d3eSDan Williams #define ND_INTEL_SMART_USED_VALID               (1 << 2)
94cdd77d3eSDan Williams #define ND_INTEL_SMART_MTEMP_VALID              (1 << 3)
95cdd77d3eSDan Williams #define ND_INTEL_SMART_CTEMP_VALID              (1 << 4)
96cdd77d3eSDan Williams #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
97cdd77d3eSDan Williams #define ND_INTEL_SMART_AIT_STATUS_VALID         (1 << 6)
98cdd77d3eSDan Williams #define ND_INTEL_SMART_PTEMP_VALID              (1 << 7)
99cdd77d3eSDan Williams #define ND_INTEL_SMART_ALARM_VALID              (1 << 9)
100cdd77d3eSDan Williams #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
101cdd77d3eSDan Williams #define ND_INTEL_SMART_VENDOR_VALID             (1 << 11)
102cdd77d3eSDan Williams #define ND_INTEL_SMART_SPARE_TRIP               (1 << 0)
103cdd77d3eSDan Williams #define ND_INTEL_SMART_TEMP_TRIP                (1 << 1)
104cdd77d3eSDan Williams #define ND_INTEL_SMART_CTEMP_TRIP               (1 << 2)
105cdd77d3eSDan Williams #define ND_INTEL_SMART_NON_CRITICAL_HEALTH      (1 << 0)
106cdd77d3eSDan Williams #define ND_INTEL_SMART_CRITICAL_HEALTH          (1 << 1)
107cdd77d3eSDan Williams #define ND_INTEL_SMART_FATAL_HEALTH             (1 << 2)
1084cf260fcSVishal Verma #define ND_INTEL_SMART_INJECT_MTEMP		(1 << 0)
1094cf260fcSVishal Verma #define ND_INTEL_SMART_INJECT_SPARE		(1 << 1)
1104cf260fcSVishal Verma #define ND_INTEL_SMART_INJECT_FATAL		(1 << 2)
1114cf260fcSVishal Verma #define ND_INTEL_SMART_INJECT_SHUTDOWN		(1 << 3)
112cdd77d3eSDan Williams 
113cdd77d3eSDan Williams struct nd_intel_smart_threshold {
114cdd77d3eSDan Williams 	__u32 status;
115cdd77d3eSDan Williams 	union {
116cdd77d3eSDan Williams 		struct {
117cdd77d3eSDan Williams 			__u16 alarm_control;
118cdd77d3eSDan Williams 			__u8 spares;
119cdd77d3eSDan Williams 			__u16 media_temperature;
120cdd77d3eSDan Williams 			__u16 ctrl_temperature;
121cdd77d3eSDan Williams 			__u8 reserved[1];
122cdd77d3eSDan Williams 		} __packed;
123cdd77d3eSDan Williams 		__u8 data[8];
124cdd77d3eSDan Williams 	};
125cdd77d3eSDan Williams } __packed;
126cdd77d3eSDan Williams 
127ed07c433SDan Williams struct nd_intel_smart_set_threshold {
128ed07c433SDan Williams 	__u16 alarm_control;
129ed07c433SDan Williams 	__u8 spares;
130ed07c433SDan Williams 	__u16 media_temperature;
131ed07c433SDan Williams 	__u16 ctrl_temperature;
132ed07c433SDan Williams 	__u32 status;
133ed07c433SDan Williams } __packed;
134ed07c433SDan Williams 
1354cf260fcSVishal Verma struct nd_intel_smart_inject {
1364cf260fcSVishal Verma 	__u64 flags;
1374cf260fcSVishal Verma 	__u8 mtemp_enable;
1384cf260fcSVishal Verma 	__u16 media_temperature;
1394cf260fcSVishal Verma 	__u8 spare_enable;
1404cf260fcSVishal Verma 	__u8 spares;
1414cf260fcSVishal Verma 	__u8 fatal_enable;
1424cf260fcSVishal Verma 	__u8 unsafe_shutdown_enable;
1434cf260fcSVishal Verma 	__u32 status;
1444cf260fcSVishal Verma } __packed;
1454cf260fcSVishal Verma 
146bfbaa952SDave Jiang #define INTEL_FW_STORAGE_SIZE		0x100000
147bfbaa952SDave Jiang #define INTEL_FW_MAX_SEND_LEN		0xFFEC
148bfbaa952SDave Jiang #define INTEL_FW_QUERY_INTERVAL		250000
149bfbaa952SDave Jiang #define INTEL_FW_QUERY_MAX_TIME		3000000
150bfbaa952SDave Jiang #define INTEL_FW_FIS_VERSION		0x0105
151bfbaa952SDave Jiang #define INTEL_FW_FAKE_VERSION		0xffffffffabcd
152bfbaa952SDave Jiang 
153bfbaa952SDave Jiang enum intel_fw_update_state {
154bfbaa952SDave Jiang 	FW_STATE_NEW = 0,
155bfbaa952SDave Jiang 	FW_STATE_IN_PROGRESS,
156bfbaa952SDave Jiang 	FW_STATE_VERIFY,
157bfbaa952SDave Jiang 	FW_STATE_UPDATED,
158bfbaa952SDave Jiang };
159bfbaa952SDave Jiang 
160bfbaa952SDave Jiang struct nd_intel_fw_info {
161bfbaa952SDave Jiang 	__u32 status;
162bfbaa952SDave Jiang 	__u32 storage_size;
163bfbaa952SDave Jiang 	__u32 max_send_len;
164bfbaa952SDave Jiang 	__u32 query_interval;
165bfbaa952SDave Jiang 	__u32 max_query_time;
166bfbaa952SDave Jiang 	__u8 update_cap;
167bfbaa952SDave Jiang 	__u8 reserved[3];
168bfbaa952SDave Jiang 	__u32 fis_version;
169bfbaa952SDave Jiang 	__u64 run_version;
170bfbaa952SDave Jiang 	__u64 updated_version;
171bfbaa952SDave Jiang } __packed;
172bfbaa952SDave Jiang 
173bfbaa952SDave Jiang struct nd_intel_fw_start {
174bfbaa952SDave Jiang 	__u32 status;
175bfbaa952SDave Jiang 	__u32 context;
176bfbaa952SDave Jiang } __packed;
177bfbaa952SDave Jiang 
178bfbaa952SDave Jiang /* this one has the output first because the variable input data size */
179bfbaa952SDave Jiang struct nd_intel_fw_send_data {
180bfbaa952SDave Jiang 	__u32 context;
181bfbaa952SDave Jiang 	__u32 offset;
182bfbaa952SDave Jiang 	__u32 length;
183a5290febSGustavo A. R. Silva 	__u8 data[];
184bfbaa952SDave Jiang /* this field is not declared due ot variable data from input */
185bfbaa952SDave Jiang /*	__u32 status; */
186bfbaa952SDave Jiang } __packed;
187bfbaa952SDave Jiang 
188bfbaa952SDave Jiang struct nd_intel_fw_finish_update {
189bfbaa952SDave Jiang 	__u8 ctrl_flags;
190bfbaa952SDave Jiang 	__u8 reserved[3];
191bfbaa952SDave Jiang 	__u32 context;
192bfbaa952SDave Jiang 	__u32 status;
193bfbaa952SDave Jiang } __packed;
194bfbaa952SDave Jiang 
195bfbaa952SDave Jiang struct nd_intel_fw_finish_query {
196bfbaa952SDave Jiang 	__u32 context;
197bfbaa952SDave Jiang 	__u32 status;
198bfbaa952SDave Jiang 	__u64 updated_fw_rev;
199bfbaa952SDave Jiang } __packed;
200bfbaa952SDave Jiang 
201674d8bdeSDave Jiang struct nd_intel_lss {
202674d8bdeSDave Jiang 	__u8 enable;
203674d8bdeSDave Jiang 	__u32 status;
204674d8bdeSDave Jiang } __packed;
205674d8bdeSDave Jiang 
2066bc75619SDan Williams typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
207a7de92daSDan Williams typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
20894116f81SAndy Shevchenko 		 const guid_t *guid, u64 rev, u64 func,
20994116f81SAndy Shevchenko 		 union acpi_object *argv4);
210*9e46e541SArnd Bergmann void __iomem *__wrap_devm_ioremap(struct device *dev,
211*9e46e541SArnd Bergmann 		resource_size_t offset, unsigned long size);
212*9e46e541SArnd Bergmann void *__wrap_devm_memremap(struct device *dev, resource_size_t offset,
213*9e46e541SArnd Bergmann 		size_t size, unsigned long flags);
214*9e46e541SArnd Bergmann void *__wrap_devm_memremap_pages(struct device *dev, struct dev_pagemap *pgmap);
215*9e46e541SArnd Bergmann pfn_t __wrap_phys_to_pfn_t(phys_addr_t addr, unsigned long flags);
216*9e46e541SArnd Bergmann void *__wrap_memremap(resource_size_t offset, size_t size,
217*9e46e541SArnd Bergmann 		unsigned long flags);
218*9e46e541SArnd Bergmann void __wrap_devm_memunmap(struct device *dev, void *addr);
219*9e46e541SArnd Bergmann void __iomem *__wrap_ioremap(resource_size_t offset, unsigned long size);
220*9e46e541SArnd Bergmann void __iomem *__wrap_ioremap_wc(resource_size_t offset, unsigned long size);
2216bc75619SDan Williams void __wrap_iounmap(volatile void __iomem *addr);
222*9e46e541SArnd Bergmann void __wrap_memunmap(void *addr);
223*9e46e541SArnd Bergmann struct resource *__wrap___request_region(struct resource *parent,
224*9e46e541SArnd Bergmann 		resource_size_t start, resource_size_t n, const char *name,
225*9e46e541SArnd Bergmann 		int flags);
226*9e46e541SArnd Bergmann int __wrap_insert_resource(struct resource *parent, struct resource *res);
227*9e46e541SArnd Bergmann int __wrap_remove_resource(struct resource *res);
228*9e46e541SArnd Bergmann struct resource *__wrap___devm_request_region(struct device *dev,
229*9e46e541SArnd Bergmann 		struct resource *parent, resource_size_t start,
230*9e46e541SArnd Bergmann 		resource_size_t n, const char *name);
231*9e46e541SArnd Bergmann void __wrap___release_region(struct resource *parent, resource_size_t start,
232*9e46e541SArnd Bergmann 		resource_size_t n);
233*9e46e541SArnd Bergmann void __wrap___devm_release_region(struct device *dev, struct resource *parent,
234*9e46e541SArnd Bergmann 		resource_size_t start, resource_size_t n);
235*9e46e541SArnd Bergmann acpi_status __wrap_acpi_evaluate_object(acpi_handle handle, acpi_string path,
236*9e46e541SArnd Bergmann 		struct acpi_object_list *p, struct acpi_buffer *buf);
237*9e46e541SArnd Bergmann union acpi_object * __wrap_acpi_evaluate_dsm(acpi_handle handle, const guid_t *guid,
238*9e46e541SArnd Bergmann 		u64 rev, u64 func, union acpi_object *argv4);
239*9e46e541SArnd Bergmann 
240a7de92daSDan Williams void nfit_test_setup(nfit_test_lookup_fn lookup,
241a7de92daSDan Williams 		nfit_test_evaluate_dsm_fn evaluate);
2426bc75619SDan Williams void nfit_test_teardown(void);
243f295e53bSDan Williams struct nfit_test_resource *get_nfit_res(resource_size_t resource);
2446bc75619SDan Williams #endif
245