turbostat [ Options ] [ "--interval seconds" ]
Some information is not available on older processors.
--counter MSR# shows the delta of the specified 32-bit MSR counter.
--Dump displays the raw counter values.
--debug displays additional system configuration information. Invoking this parameter more than once may also enable internal turbostat debug information.
--interval seconds overrides the default 5.0 second measurement interval.
--out output_file turbostat output is written to the specified output_file. The file is truncated if it already exists, and it is created if it does not exist.
--help displays usage for the most common parameters.
--Joules displays energy in Joules, rather than dividing Joules by time to print power in Watts.
--MSR MSR# shows the specified 64-bit MSR value.
--msr MSR# shows the specified 32-bit MSR value.
--Package limits output to the system summary plus the 1st thread in each Package.
--processor limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
--Summary limits output to a 1-line System Summary for each interval.
--TCC temperature sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.
--version displays the version.
The command parameter forks command, and upon its exit, displays the statistics gathered since it was forked.
CPU Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together. AVG_MHz number of cycles executed divided by time elapsed. Busy% percent of the interval that the CPU retired instructions, aka. % of time in "C0" state. Bzy_MHz average clock rate while the CPU was busy (in "c0" state). TSC_MHz average MHz that the TSC ran during the entire interval.
Package processor package number. Core processor core number. Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT). CPU%c1, CPU%c3, CPU%c6, CPU%c7 show the percentage residency in hardware core idle states. CoreTmp Degrees Celsius reported by the per-core Digital Thermal Sensor. PkgTtmp Degrees Celsius reported by the per-package Package Thermal Monitor. Pkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7 percentage residency in hardware package idle states. PkgWatt Watts consumed by the whole package. CorWatt Watts consumed by the core part of the package. GFXWatt Watts consumed by the Graphics part of the package -- available only on client processors. RAMWatt Watts consumed by the DRAM DIMMS -- available only on server processors. PKG_% percent of the interval that RAPL throttling was active on the Package. RAM_% percent of the interval that RAPL throttling was active on DRAM.
[root@hsw]# ./turbostat CPU Avg_MHz Busy% Bzy_MHz TSC_MHz - 488 12.51 3898 3498 0 0 0.01 3885 3498 4 3897 99.99 3898 3498 1 0 0.00 3861 3498 5 0 0.00 3882 3498 2 1 0.02 3894 3498 6 2 0.06 3898 3498 3 0 0.00 3849 3498 7 0 0.00 3877 3498
turbostat version 4.1 10-Feb, 2015 - Len Brown <lenb@kernel.org> CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3) CPUID(6): APERF, DTS, PTM, EPB RAPL: 3121 sec. Joule Counter Range, at 84 Watts cpu0: MSR_NHM_PLATFORM_INFO: 0x80838f3012300 8 * 100 = 800 MHz max efficiency 35 * 100 = 3500 MHz TSC frequency cpu0: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled) cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0) cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727 37 * 100 = 3700 MHz max turbo 4 active cores 38 * 100 = 3800 MHz max turbo 3 active cores 39 * 100 = 3900 MHz max turbo 2 active cores 39 * 100 = 3900 MHz max turbo 1 active cores cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced) cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Auto-HWP, Amps, MultiCoreTurbo, Transitions, ) cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: ) cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, ) cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.) cpu0: MSR_PKG_POWER_INFO: 0x000002a0 (84 W TDP, RAPL 0 - 0 W, 0.000000 sec.) cpu0: MSR_PKG_POWER_LIMIT: 0x428348001a82a0 (UNlocked) cpu0: PKG Limit #1: ENabled (84.000000 Watts, 8.000000 sec, clamp DISabled) cpu0: PKG Limit #2: ENabled (105.000000 Watts, 0.002441* sec, clamp DISabled) cpu0: MSR_PP0_POLICY: 0 cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked) cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) cpu0: MSR_PP1_POLICY: 0 cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked) cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C) cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x88340800 (48 C) cpu0: MSR_IA32_THERM_STATUS: 0x88340000 (48 C +/- 1) cpu1: MSR_IA32_THERM_STATUS: 0x88440000 (32 C +/- 1) cpu2: MSR_IA32_THERM_STATUS: 0x88450000 (31 C +/- 1) cpu3: MSR_IA32_THERM_STATUS: 0x88490000 (27 C +/- 1) Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp PkgWatt CorWatt GFXWatt - - 493 12.64 3898 3498 0 12.64 0.00 0.00 74.72 47 47 21.62 13.74 0.00 0 0 4 0.11 3894 3498 0 99.89 0.00 0.00 0.00 47 47 21.62 13.74 0.00 0 4 3897 99.98 3898 3498 0 0.02 1 1 7 0.17 3887 3498 0 0.04 0.00 0.00 99.79 32 1 5 0 0.00 3885 3498 0 0.21 2 2 29 0.76 3895 3498 0 0.10 0.01 0.01 99.13 32 2 6 2 0.06 3896 3498 0 0.80 3 3 1 0.02 3832 3498 0 0.03 0.00 0.00 99.95 28 3 7 0 0.00 3879 3498 0 0.04 ^CThe max efficiency frequency, a.k.a. Low Frequency Mode, is the frequency available at the minimum package voltage. The TSC frequency is the base frequency of the processor -- this should match the brand string in /proc/cpuinfo. This base frequency should be sustainable on all CPUs indefinitely, given nominal power and cooling. The remaining rows show what maximum turbo frequency is possible depending on the number of idle cores. Note that not all information is available on all processors.
The --debug option adds additional columns to the measurement ouput, including CPU idle power-state residency processor temperature sensor readinds. See the field definitions above.
root@hsw: turbostat cat /dev/zero > /dev/null ^C CPU Avg_MHz Busy% Bzy_MHz TSC_MHz - 482 12.51 3854 3498 0 0 0.01 1960 3498 4 0 0.00 2128 3498 1 0 0.00 3003 3498 5 3854 99.98 3855 3498 2 0 0.01 3504 3498 6 3 0.08 3884 3498 3 0 0.00 2553 3498 7 0 0.00 2126 3498 10.783983 secAbove the cycle soaker drives cpu5 up its 3.9 GHz turbo limit. The first row shows the average MHz and Busy% across all the processors in the system. Note that the Avg_MHz column reflects the total number of cycles executed divided by the measurement interval. If the Busy% column is 100%, then the processor was running at that speed the entire interval. The Avg_MHz multiplied by the Busy% results in the Bzy_MHz -- which is the average frequency while the processor was executing -- not including any non-busy idle time.
/dev/cpu/*/msr
Written by Len Brown <len.brown@intel.com>