1 /*
2  *  (C) 2010,2011       Thomas Renninger <trenn@suse.de>, Novell Inc.
3  *
4  *  Licensed under the terms of the GNU GPL License version 2.
5  *
6  *  Based on Len Brown's <lenb@kernel.org> turbostat tool.
7  */
8 
9 #if defined(__i386__) || defined(__x86_64__)
10 
11 #include <stdio.h>
12 #include <stdint.h>
13 #include <stdlib.h>
14 #include <string.h>
15 
16 #include "helpers/helpers.h"
17 #include "idle_monitor/cpupower-monitor.h"
18 
19 #define MSR_PKG_C2_RESIDENCY	0x60D
20 #define MSR_PKG_C7_RESIDENCY	0x3FA
21 #define MSR_CORE_C7_RESIDENCY	0x3FE
22 
23 #define MSR_TSC	0x10
24 
25 enum intel_snb_id { C7 = 0, PC2, PC7, SNB_CSTATE_COUNT, TSC = 0xFFFF };
26 
27 static int snb_get_count_percent(unsigned int self_id, double *percent,
28 				 unsigned int cpu);
29 
30 static cstate_t snb_cstates[SNB_CSTATE_COUNT] = {
31 	{
32 		.name			= "C7",
33 		.desc			= N_("Processor Core C7"),
34 		.id			= C7,
35 		.range			= RANGE_CORE,
36 		.get_count_percent	= snb_get_count_percent,
37 	},
38 	{
39 		.name			= "PC2",
40 		.desc			= N_("Processor Package C2"),
41 		.id			= PC2,
42 		.range			= RANGE_PACKAGE,
43 		.get_count_percent	= snb_get_count_percent,
44 	},
45 	{
46 		.name			= "PC7",
47 		.desc			= N_("Processor Package C7"),
48 		.id			= PC7,
49 		.range			= RANGE_PACKAGE,
50 		.get_count_percent	= snb_get_count_percent,
51 	},
52 };
53 
54 static unsigned long long tsc_at_measure_start;
55 static unsigned long long tsc_at_measure_end;
56 static unsigned long long *previous_count[SNB_CSTATE_COUNT];
57 static unsigned long long *current_count[SNB_CSTATE_COUNT];
58 /* valid flag for all CPUs. If a MSR read failed it will be zero */
59 static int *is_valid;
60 
61 static int snb_get_count(enum intel_snb_id id, unsigned long long *val,
62 			unsigned int cpu)
63 {
64 	int msr;
65 
66 	switch (id) {
67 	case C7:
68 		msr = MSR_CORE_C7_RESIDENCY;
69 		break;
70 	case PC2:
71 		msr = MSR_PKG_C2_RESIDENCY;
72 		break;
73 	case PC7:
74 		msr = MSR_PKG_C7_RESIDENCY;
75 		break;
76 	case TSC:
77 		msr = MSR_TSC;
78 		break;
79 	default:
80 		return -1;
81 	};
82 	if (read_msr(cpu, msr, val))
83 		return -1;
84 	return 0;
85 }
86 
87 static int snb_get_count_percent(unsigned int id, double *percent,
88 				 unsigned int cpu)
89 {
90 	*percent = 0.0;
91 
92 	if (!is_valid[cpu])
93 		return -1;
94 
95 	*percent = (100.0 *
96 		(current_count[id][cpu] - previous_count[id][cpu])) /
97 		(tsc_at_measure_end - tsc_at_measure_start);
98 
99 	dprint("%s: previous: %llu - current: %llu - (%u)\n",
100 		snb_cstates[id].name, previous_count[id][cpu],
101 		current_count[id][cpu], cpu);
102 
103 	dprint("%s: tsc_diff: %llu - count_diff: %llu - percent: %2.f (%u)\n",
104 	       snb_cstates[id].name,
105 	       (unsigned long long) tsc_at_measure_end - tsc_at_measure_start,
106 	       current_count[id][cpu] - previous_count[id][cpu],
107 	       *percent, cpu);
108 
109 	return 0;
110 }
111 
112 static int snb_start(void)
113 {
114 	int num, cpu;
115 	unsigned long long val;
116 
117 	for (num = 0; num < SNB_CSTATE_COUNT; num++) {
118 		for (cpu = 0; cpu < cpu_count; cpu++) {
119 			snb_get_count(num, &val, cpu);
120 			previous_count[num][cpu] = val;
121 		}
122 	}
123 	snb_get_count(TSC, &tsc_at_measure_start, 0);
124 	return 0;
125 }
126 
127 static int snb_stop(void)
128 {
129 	unsigned long long val;
130 	int num, cpu;
131 
132 	snb_get_count(TSC, &tsc_at_measure_end, 0);
133 
134 	for (num = 0; num < SNB_CSTATE_COUNT; num++) {
135 		for (cpu = 0; cpu < cpu_count; cpu++) {
136 			is_valid[cpu] = !snb_get_count(num, &val, cpu);
137 			current_count[num][cpu] = val;
138 		}
139 	}
140 	return 0;
141 }
142 
143 struct cpuidle_monitor intel_snb_monitor;
144 
145 static struct cpuidle_monitor *snb_register(void)
146 {
147 	int num;
148 
149 	if (cpupower_cpu_info.vendor != X86_VENDOR_INTEL
150 	    || cpupower_cpu_info.family != 6)
151 		return NULL;
152 
153 	switch (cpupower_cpu_info.model) {
154 	case 0x2A: /* SNB */
155 	case 0x2D: /* SNB Xeon */
156 	case 0x3A: /* IVB */
157 	case 0x3E: /* IVB Xeon */
158 	case 0x3C: /* HSW */
159 	case 0x3F: /* HSW */
160 	case 0x45: /* HSW */
161 	case 0x46: /* HSW */
162 		break;
163 	default:
164 		return NULL;
165 	}
166 
167 	is_valid = calloc(cpu_count, sizeof(int));
168 	for (num = 0; num < SNB_CSTATE_COUNT; num++) {
169 		previous_count[num] = calloc(cpu_count,
170 					sizeof(unsigned long long));
171 		current_count[num]  = calloc(cpu_count,
172 					sizeof(unsigned long long));
173 	}
174 	intel_snb_monitor.name_len = strlen(intel_snb_monitor.name);
175 	return &intel_snb_monitor;
176 }
177 
178 void snb_unregister(void)
179 {
180 	int num;
181 	free(is_valid);
182 	for (num = 0; num < SNB_CSTATE_COUNT; num++) {
183 		free(previous_count[num]);
184 		free(current_count[num]);
185 	}
186 }
187 
188 struct cpuidle_monitor intel_snb_monitor = {
189 	.name			= "SandyBridge",
190 	.hw_states		= snb_cstates,
191 	.hw_states_num		= SNB_CSTATE_COUNT,
192 	.start			= snb_start,
193 	.stop			= snb_stop,
194 	.do_register		= snb_register,
195 	.unregister		= snb_unregister,
196 	.needs_root		= 1,
197 	.overflow_s		= 922000000 /* 922337203 seconds TSC overflow
198 					       at 20GHz */
199 };
200 #endif /* defined(__i386__) || defined(__x86_64__) */
201