1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * intel_pt_insn_decoder.c: Intel Processor Trace support 4 * Copyright (c) 2013-2014, Intel Corporation. 5 */ 6 7 #include <linux/kernel.h> 8 #include <stdio.h> 9 #include <string.h> 10 #include <endian.h> 11 #include <byteswap.h> 12 #include "../../../arch/x86/include/asm/insn.h" 13 14 #include "../../../arch/x86/lib/inat.c" 15 #include "../../../arch/x86/lib/insn.c" 16 17 #include "event.h" 18 19 #include "intel-pt-insn-decoder.h" 20 #include "dump-insn.h" 21 #include "util/sample.h" 22 23 #if INTEL_PT_INSN_BUF_SZ < MAX_INSN_SIZE || INTEL_PT_INSN_BUF_SZ > MAX_INSN 24 #error Instruction buffer size too small 25 #endif 26 27 /* Based on branch_type() from arch/x86/events/intel/lbr.c */ 28 static void intel_pt_insn_decoder(struct insn *insn, 29 struct intel_pt_insn *intel_pt_insn) 30 { 31 enum intel_pt_insn_op op = INTEL_PT_OP_OTHER; 32 enum intel_pt_insn_branch branch = INTEL_PT_BR_NO_BRANCH; 33 int ext; 34 35 intel_pt_insn->rel = 0; 36 intel_pt_insn->emulated_ptwrite = false; 37 38 if (insn_is_avx(insn)) { 39 intel_pt_insn->op = INTEL_PT_OP_OTHER; 40 intel_pt_insn->branch = INTEL_PT_BR_NO_BRANCH; 41 intel_pt_insn->length = insn->length; 42 return; 43 } 44 45 switch (insn->opcode.bytes[0]) { 46 case 0xf: 47 switch (insn->opcode.bytes[1]) { 48 case 0x01: 49 switch (insn->modrm.bytes[0]) { 50 case 0xc2: /* vmlaunch */ 51 case 0xc3: /* vmresume */ 52 op = INTEL_PT_OP_VMENTRY; 53 branch = INTEL_PT_BR_INDIRECT; 54 break; 55 default: 56 break; 57 } 58 break; 59 case 0x05: /* syscall */ 60 case 0x34: /* sysenter */ 61 op = INTEL_PT_OP_SYSCALL; 62 branch = INTEL_PT_BR_INDIRECT; 63 break; 64 case 0x07: /* sysret */ 65 case 0x35: /* sysexit */ 66 op = INTEL_PT_OP_SYSRET; 67 branch = INTEL_PT_BR_INDIRECT; 68 break; 69 case 0x80 ... 0x8f: /* jcc */ 70 op = INTEL_PT_OP_JCC; 71 branch = INTEL_PT_BR_CONDITIONAL; 72 break; 73 default: 74 break; 75 } 76 break; 77 case 0x70 ... 0x7f: /* jcc */ 78 op = INTEL_PT_OP_JCC; 79 branch = INTEL_PT_BR_CONDITIONAL; 80 break; 81 case 0xc2: /* near ret */ 82 case 0xc3: /* near ret */ 83 case 0xca: /* far ret */ 84 case 0xcb: /* far ret */ 85 op = INTEL_PT_OP_RET; 86 branch = INTEL_PT_BR_INDIRECT; 87 break; 88 case 0xcf: /* iret */ 89 op = INTEL_PT_OP_IRET; 90 branch = INTEL_PT_BR_INDIRECT; 91 break; 92 case 0xcc ... 0xce: /* int */ 93 op = INTEL_PT_OP_INT; 94 branch = INTEL_PT_BR_INDIRECT; 95 break; 96 case 0xe8: /* call near rel */ 97 op = INTEL_PT_OP_CALL; 98 branch = INTEL_PT_BR_UNCONDITIONAL; 99 break; 100 case 0x9a: /* call far absolute */ 101 op = INTEL_PT_OP_CALL; 102 branch = INTEL_PT_BR_INDIRECT; 103 break; 104 case 0xe0 ... 0xe2: /* loop */ 105 op = INTEL_PT_OP_LOOP; 106 branch = INTEL_PT_BR_CONDITIONAL; 107 break; 108 case 0xe3: /* jcc */ 109 op = INTEL_PT_OP_JCC; 110 branch = INTEL_PT_BR_CONDITIONAL; 111 break; 112 case 0xe9: /* jmp */ 113 case 0xeb: /* jmp */ 114 op = INTEL_PT_OP_JMP; 115 branch = INTEL_PT_BR_UNCONDITIONAL; 116 break; 117 case 0xea: /* far jmp */ 118 op = INTEL_PT_OP_JMP; 119 branch = INTEL_PT_BR_INDIRECT; 120 break; 121 case 0xff: /* call near absolute, call far absolute ind */ 122 ext = (insn->modrm.bytes[0] >> 3) & 0x7; 123 switch (ext) { 124 case 2: /* near ind call */ 125 case 3: /* far ind call */ 126 op = INTEL_PT_OP_CALL; 127 branch = INTEL_PT_BR_INDIRECT; 128 break; 129 case 4: 130 case 5: 131 op = INTEL_PT_OP_JMP; 132 branch = INTEL_PT_BR_INDIRECT; 133 break; 134 default: 135 break; 136 } 137 break; 138 default: 139 break; 140 } 141 142 intel_pt_insn->op = op; 143 intel_pt_insn->branch = branch; 144 intel_pt_insn->length = insn->length; 145 146 if (branch == INTEL_PT_BR_CONDITIONAL || 147 branch == INTEL_PT_BR_UNCONDITIONAL) { 148 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 149 switch (insn->immediate.nbytes) { 150 case 1: 151 intel_pt_insn->rel = insn->immediate.value; 152 break; 153 case 2: 154 intel_pt_insn->rel = 155 bswap_16((short)insn->immediate.value); 156 break; 157 case 4: 158 intel_pt_insn->rel = bswap_32(insn->immediate.value); 159 break; 160 default: 161 intel_pt_insn->rel = 0; 162 break; 163 } 164 #else 165 intel_pt_insn->rel = insn->immediate.value; 166 #endif 167 } 168 } 169 170 int intel_pt_get_insn(const unsigned char *buf, size_t len, int x86_64, 171 struct intel_pt_insn *intel_pt_insn) 172 { 173 struct insn insn; 174 int ret; 175 176 ret = insn_decode(&insn, buf, len, 177 x86_64 ? INSN_MODE_64 : INSN_MODE_32); 178 if (ret < 0 || insn.length > len) 179 return -1; 180 181 intel_pt_insn_decoder(&insn, intel_pt_insn); 182 if (insn.length < INTEL_PT_INSN_BUF_SZ) 183 memcpy(intel_pt_insn->buf, buf, insn.length); 184 else 185 memcpy(intel_pt_insn->buf, buf, INTEL_PT_INSN_BUF_SZ); 186 return 0; 187 } 188 189 int arch_is_branch(const unsigned char *buf, size_t len, int x86_64) 190 { 191 struct intel_pt_insn in; 192 if (intel_pt_get_insn(buf, len, x86_64, &in) < 0) 193 return -1; 194 return in.branch != INTEL_PT_BR_NO_BRANCH; 195 } 196 197 const char *dump_insn(struct perf_insn *x, uint64_t ip __maybe_unused, 198 u8 *inbuf, int inlen, int *lenp) 199 { 200 struct insn insn; 201 int n, i, ret; 202 int left; 203 204 ret = insn_decode(&insn, inbuf, inlen, 205 x->is64bit ? INSN_MODE_64 : INSN_MODE_32); 206 207 if (ret < 0 || insn.length > inlen) 208 return "<bad>"; 209 if (lenp) 210 *lenp = insn.length; 211 left = sizeof(x->out); 212 n = snprintf(x->out, left, "insn: "); 213 left -= n; 214 for (i = 0; i < insn.length; i++) { 215 n += snprintf(x->out + n, left, "%02x ", inbuf[i]); 216 left -= n; 217 } 218 return x->out; 219 } 220 221 const char *branch_name[] = { 222 [INTEL_PT_OP_OTHER] = "Other", 223 [INTEL_PT_OP_CALL] = "Call", 224 [INTEL_PT_OP_RET] = "Ret", 225 [INTEL_PT_OP_JCC] = "Jcc", 226 [INTEL_PT_OP_JMP] = "Jmp", 227 [INTEL_PT_OP_LOOP] = "Loop", 228 [INTEL_PT_OP_IRET] = "IRet", 229 [INTEL_PT_OP_INT] = "Int", 230 [INTEL_PT_OP_SYSCALL] = "Syscall", 231 [INTEL_PT_OP_SYSRET] = "Sysret", 232 [INTEL_PT_OP_VMENTRY] = "VMentry", 233 }; 234 235 const char *intel_pt_insn_name(enum intel_pt_insn_op op) 236 { 237 return branch_name[op]; 238 } 239 240 int intel_pt_insn_desc(const struct intel_pt_insn *intel_pt_insn, char *buf, 241 size_t buf_len) 242 { 243 switch (intel_pt_insn->branch) { 244 case INTEL_PT_BR_CONDITIONAL: 245 case INTEL_PT_BR_UNCONDITIONAL: 246 return snprintf(buf, buf_len, "%s %s%d", 247 intel_pt_insn_name(intel_pt_insn->op), 248 intel_pt_insn->rel > 0 ? "+" : "", 249 intel_pt_insn->rel); 250 case INTEL_PT_BR_NO_BRANCH: 251 case INTEL_PT_BR_INDIRECT: 252 return snprintf(buf, buf_len, "%s", 253 intel_pt_insn_name(intel_pt_insn->op)); 254 default: 255 break; 256 } 257 return 0; 258 } 259 260 int intel_pt_insn_type(enum intel_pt_insn_op op) 261 { 262 switch (op) { 263 case INTEL_PT_OP_OTHER: 264 return 0; 265 case INTEL_PT_OP_CALL: 266 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL; 267 case INTEL_PT_OP_RET: 268 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN; 269 case INTEL_PT_OP_JCC: 270 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL; 271 case INTEL_PT_OP_JMP: 272 return PERF_IP_FLAG_BRANCH; 273 case INTEL_PT_OP_LOOP: 274 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL; 275 case INTEL_PT_OP_IRET: 276 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN | 277 PERF_IP_FLAG_INTERRUPT; 278 case INTEL_PT_OP_INT: 279 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL | 280 PERF_IP_FLAG_INTERRUPT; 281 case INTEL_PT_OP_SYSCALL: 282 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL | 283 PERF_IP_FLAG_SYSCALLRET; 284 case INTEL_PT_OP_SYSRET: 285 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN | 286 PERF_IP_FLAG_SYSCALLRET; 287 case INTEL_PT_OP_VMENTRY: 288 return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL | 289 PERF_IP_FLAG_VMENTRY; 290 default: 291 return 0; 292 } 293 } 294