1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * intel_pt_decoder.h: Intel Processor Trace support 4 * Copyright (c) 2013-2014, Intel Corporation. 5 */ 6 7 #ifndef INCLUDE__INTEL_PT_DECODER_H__ 8 #define INCLUDE__INTEL_PT_DECODER_H__ 9 10 #include <stdint.h> 11 #include <stddef.h> 12 #include <stdbool.h> 13 14 #include "intel-pt-insn-decoder.h" 15 16 #define INTEL_PT_IN_TX (1 << 0) 17 #define INTEL_PT_ABORT_TX (1 << 1) 18 #define INTEL_PT_ASYNC (1 << 2) 19 #define INTEL_PT_FUP_IP (1 << 3) 20 #define INTEL_PT_SAMPLE_IPC (1 << 4) 21 22 enum intel_pt_sample_type { 23 INTEL_PT_BRANCH = 1 << 0, 24 INTEL_PT_INSTRUCTION = 1 << 1, 25 INTEL_PT_TRANSACTION = 1 << 2, 26 INTEL_PT_PTW = 1 << 3, 27 INTEL_PT_MWAIT_OP = 1 << 4, 28 INTEL_PT_PWR_ENTRY = 1 << 5, 29 INTEL_PT_EX_STOP = 1 << 6, 30 INTEL_PT_PWR_EXIT = 1 << 7, 31 INTEL_PT_CBR_CHG = 1 << 8, 32 INTEL_PT_TRACE_BEGIN = 1 << 9, 33 INTEL_PT_TRACE_END = 1 << 10, 34 INTEL_PT_BLK_ITEMS = 1 << 11, 35 INTEL_PT_PSB_EVT = 1 << 12, 36 }; 37 38 enum intel_pt_period_type { 39 INTEL_PT_PERIOD_NONE, 40 INTEL_PT_PERIOD_INSTRUCTIONS, 41 INTEL_PT_PERIOD_TICKS, 42 INTEL_PT_PERIOD_MTC, 43 }; 44 45 enum { 46 INTEL_PT_ERR_NOMEM = 1, 47 INTEL_PT_ERR_INTERN, 48 INTEL_PT_ERR_BADPKT, 49 INTEL_PT_ERR_NODATA, 50 INTEL_PT_ERR_NOINSN, 51 INTEL_PT_ERR_MISMAT, 52 INTEL_PT_ERR_OVR, 53 INTEL_PT_ERR_LOST, 54 INTEL_PT_ERR_UNK, 55 INTEL_PT_ERR_NELOOP, 56 INTEL_PT_ERR_MAX, 57 }; 58 59 enum intel_pt_param_flags { 60 /* 61 * FUP packet can contain next linear instruction pointer instead of 62 * current linear instruction pointer. 63 */ 64 INTEL_PT_FUP_WITH_NLIP = 1 << 0, 65 }; 66 67 enum intel_pt_blk_type { 68 INTEL_PT_GP_REGS = 1, 69 INTEL_PT_PEBS_BASIC = 4, 70 INTEL_PT_PEBS_MEM = 5, 71 INTEL_PT_LBR_0 = 8, 72 INTEL_PT_LBR_1 = 9, 73 INTEL_PT_LBR_2 = 10, 74 INTEL_PT_XMM = 16, 75 INTEL_PT_BLK_TYPE_MAX 76 }; 77 78 /* 79 * The block type numbers are not sequential but here they are given sequential 80 * positions to avoid wasting space for array placement. 81 */ 82 enum intel_pt_blk_type_pos { 83 INTEL_PT_GP_REGS_POS, 84 INTEL_PT_PEBS_BASIC_POS, 85 INTEL_PT_PEBS_MEM_POS, 86 INTEL_PT_LBR_0_POS, 87 INTEL_PT_LBR_1_POS, 88 INTEL_PT_LBR_2_POS, 89 INTEL_PT_XMM_POS, 90 INTEL_PT_BLK_TYPE_CNT 91 }; 92 93 /* Get the array position for a block type */ 94 static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type) 95 { 96 #define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1 97 const int map[INTEL_PT_BLK_TYPE_MAX] = { 98 BLK_TYPE(GP_REGS), 99 BLK_TYPE(PEBS_BASIC), 100 BLK_TYPE(PEBS_MEM), 101 BLK_TYPE(LBR_0), 102 BLK_TYPE(LBR_1), 103 BLK_TYPE(LBR_2), 104 BLK_TYPE(XMM), 105 }; 106 #undef BLK_TYPE 107 108 return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1; 109 } 110 111 #define INTEL_PT_BLK_ITEM_ID_CNT 32 112 113 /* 114 * Use unions so that the block items can be accessed by name or by array index. 115 * There is an array of 32-bit masks for each block type, which indicate which 116 * values are present. Then arrays of 32 64-bit values for each block type. 117 */ 118 struct intel_pt_blk_items { 119 union { 120 uint32_t mask[INTEL_PT_BLK_TYPE_CNT]; 121 struct { 122 uint32_t has_rflags:1; 123 uint32_t has_rip:1; 124 uint32_t has_rax:1; 125 uint32_t has_rcx:1; 126 uint32_t has_rdx:1; 127 uint32_t has_rbx:1; 128 uint32_t has_rsp:1; 129 uint32_t has_rbp:1; 130 uint32_t has_rsi:1; 131 uint32_t has_rdi:1; 132 uint32_t has_r8:1; 133 uint32_t has_r9:1; 134 uint32_t has_r10:1; 135 uint32_t has_r11:1; 136 uint32_t has_r12:1; 137 uint32_t has_r13:1; 138 uint32_t has_r14:1; 139 uint32_t has_r15:1; 140 uint32_t has_unused_0:14; 141 uint32_t has_ip:1; 142 uint32_t has_applicable_counters:1; 143 uint32_t has_timestamp:1; 144 uint32_t has_unused_1:29; 145 uint32_t has_mem_access_address:1; 146 uint32_t has_mem_aux_info:1; 147 uint32_t has_mem_access_latency:1; 148 uint32_t has_tsx_aux_info:1; 149 uint32_t has_unused_2:28; 150 uint32_t has_lbr_0; 151 uint32_t has_lbr_1; 152 uint32_t has_lbr_2; 153 uint32_t has_xmm; 154 }; 155 }; 156 union { 157 uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT]; 158 struct { 159 struct { 160 uint64_t rflags; 161 uint64_t rip; 162 uint64_t rax; 163 uint64_t rcx; 164 uint64_t rdx; 165 uint64_t rbx; 166 uint64_t rsp; 167 uint64_t rbp; 168 uint64_t rsi; 169 uint64_t rdi; 170 uint64_t r8; 171 uint64_t r9; 172 uint64_t r10; 173 uint64_t r11; 174 uint64_t r12; 175 uint64_t r13; 176 uint64_t r14; 177 uint64_t r15; 178 uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18]; 179 }; 180 struct { 181 uint64_t ip; 182 uint64_t applicable_counters; 183 uint64_t timestamp; 184 uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3]; 185 }; 186 struct { 187 uint64_t mem_access_address; 188 uint64_t mem_aux_info; 189 uint64_t mem_access_latency; 190 uint64_t tsx_aux_info; 191 uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4]; 192 }; 193 uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT]; 194 uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT]; 195 uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT]; 196 uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT]; 197 }; 198 }; 199 bool is_32_bit; 200 }; 201 202 struct intel_pt_state { 203 enum intel_pt_sample_type type; 204 bool from_nr; 205 bool to_nr; 206 int err; 207 uint64_t from_ip; 208 uint64_t to_ip; 209 uint64_t tot_insn_cnt; 210 uint64_t tot_cyc_cnt; 211 uint64_t timestamp; 212 uint64_t est_timestamp; 213 uint64_t trace_nr; 214 uint64_t ptw_payload; 215 uint64_t mwait_payload; 216 uint64_t pwre_payload; 217 uint64_t pwrx_payload; 218 uint64_t cbr_payload; 219 uint64_t psb_offset; 220 uint32_t cbr; 221 uint32_t flags; 222 enum intel_pt_insn_op insn_op; 223 int insn_len; 224 char insn[INTEL_PT_INSN_BUF_SZ]; 225 struct intel_pt_blk_items items; 226 }; 227 228 struct intel_pt_insn; 229 230 struct intel_pt_buffer { 231 const unsigned char *buf; 232 size_t len; 233 bool consecutive; 234 uint64_t ref_timestamp; 235 uint64_t trace_nr; 236 }; 237 238 typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *); 239 240 struct intel_pt_params { 241 int (*get_trace)(struct intel_pt_buffer *buffer, void *data); 242 int (*walk_insn)(struct intel_pt_insn *intel_pt_insn, 243 uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip, 244 uint64_t max_insn_cnt, void *data); 245 bool (*pgd_ip)(uint64_t ip, void *data); 246 int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data); 247 void *data; 248 bool return_compression; 249 bool branch_enable; 250 uint64_t ctl; 251 uint64_t period; 252 enum intel_pt_period_type period_type; 253 unsigned max_non_turbo_ratio; 254 unsigned int mtc_period; 255 uint32_t tsc_ctc_ratio_n; 256 uint32_t tsc_ctc_ratio_d; 257 enum intel_pt_param_flags flags; 258 unsigned int quick; 259 }; 260 261 struct intel_pt_decoder; 262 263 struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params); 264 void intel_pt_decoder_free(struct intel_pt_decoder *decoder); 265 266 const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder); 267 268 int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp); 269 270 unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a, 271 unsigned char *buf_b, size_t len_b, 272 bool have_tsc, bool *consecutive); 273 274 int intel_pt__strerror(int code, char *buf, size_t buflen); 275 276 #endif 277