1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ 8 #define INCLUDE__UTIL_PERF_CS_ETM_H__ 9 10 #include "util/event.h" 11 #include <linux/bits.h> 12 13 struct perf_session; 14 15 /* 16 * Versioning header in case things need to change in the future. That way 17 * decoding of old snapshot is still possible. 18 */ 19 enum { 20 /* Starting with 0x0 */ 21 CS_HEADER_VERSION, 22 /* PMU->type (32 bit), total # of CPUs (32 bit) */ 23 CS_PMU_TYPE_CPUS, 24 CS_ETM_SNAPSHOT, 25 CS_HEADER_VERSION_MAX, 26 }; 27 28 /* 29 * Update the version for new format. 30 * 31 * New version 1 format adds a param count to the per cpu metadata. 32 * This allows easy adding of new metadata parameters. 33 * Requires that new params always added after current ones. 34 * Also allows client reader to handle file versions that are different by 35 * checking the number of params in the file vs the number expected. 36 */ 37 #define CS_HEADER_CURRENT_VERSION 1 38 39 /* Beginning of header common to both ETMv3 and V4 */ 40 enum { 41 CS_ETM_MAGIC, 42 CS_ETM_CPU, 43 /* Number of trace config params in following ETM specific block */ 44 CS_ETM_NR_TRC_PARAMS, 45 CS_ETM_COMMON_BLK_MAX_V1, 46 }; 47 48 /* ETMv3/PTM metadata */ 49 enum { 50 /* Dynamic, configurable parameters */ 51 CS_ETM_ETMCR = CS_ETM_COMMON_BLK_MAX_V1, 52 CS_ETM_ETMTRACEIDR, 53 /* RO, taken from sysFS */ 54 CS_ETM_ETMCCER, 55 CS_ETM_ETMIDR, 56 CS_ETM_PRIV_MAX, 57 }; 58 59 /* define fixed version 0 length - allow new format reader to read old files. */ 60 #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1) 61 62 /* ETMv4 metadata */ 63 enum { 64 /* Dynamic, configurable parameters */ 65 CS_ETMV4_TRCCONFIGR = CS_ETM_COMMON_BLK_MAX_V1, 66 CS_ETMV4_TRCTRACEIDR, 67 /* RO, taken from sysFS */ 68 CS_ETMV4_TRCIDR0, 69 CS_ETMV4_TRCIDR1, 70 CS_ETMV4_TRCIDR2, 71 CS_ETMV4_TRCIDR8, 72 CS_ETMV4_TRCAUTHSTATUS, 73 CS_ETMV4_PRIV_MAX, 74 }; 75 76 /* define fixed version 0 length - allow new format reader to read old files. */ 77 #define CS_ETMV4_NR_TRC_PARAMS_V0 (CS_ETMV4_TRCAUTHSTATUS - CS_ETMV4_TRCCONFIGR + 1) 78 79 /* 80 * ETMv3 exception encoding number: 81 * See Embedded Trace Macrocell specification (ARM IHI 0014Q) 82 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors. 83 */ 84 enum { 85 CS_ETMV3_EXC_NONE = 0, 86 CS_ETMV3_EXC_DEBUG_HALT = 1, 87 CS_ETMV3_EXC_SMC = 2, 88 CS_ETMV3_EXC_HYP = 3, 89 CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4, 90 CS_ETMV3_EXC_JAZELLE_THUMBEE = 5, 91 CS_ETMV3_EXC_PE_RESET = 8, 92 CS_ETMV3_EXC_UNDEFINED_INSTR = 9, 93 CS_ETMV3_EXC_SVC = 10, 94 CS_ETMV3_EXC_PREFETCH_ABORT = 11, 95 CS_ETMV3_EXC_DATA_FAULT = 12, 96 CS_ETMV3_EXC_GENERIC = 13, 97 CS_ETMV3_EXC_IRQ = 14, 98 CS_ETMV3_EXC_FIQ = 15, 99 }; 100 101 /* 102 * ETMv4 exception encoding number: 103 * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D) 104 * table 6-12 Possible values for the TYPE field in an Exception instruction 105 * trace packet, for ARMv7-A/R and ARMv8-A/R PEs. 106 */ 107 enum { 108 CS_ETMV4_EXC_RESET = 0, 109 CS_ETMV4_EXC_DEBUG_HALT = 1, 110 CS_ETMV4_EXC_CALL = 2, 111 CS_ETMV4_EXC_TRAP = 3, 112 CS_ETMV4_EXC_SYSTEM_ERROR = 4, 113 CS_ETMV4_EXC_INST_DEBUG = 6, 114 CS_ETMV4_EXC_DATA_DEBUG = 7, 115 CS_ETMV4_EXC_ALIGNMENT = 10, 116 CS_ETMV4_EXC_INST_FAULT = 11, 117 CS_ETMV4_EXC_DATA_FAULT = 12, 118 CS_ETMV4_EXC_IRQ = 14, 119 CS_ETMV4_EXC_FIQ = 15, 120 CS_ETMV4_EXC_END = 31, 121 }; 122 123 enum cs_etm_sample_type { 124 CS_ETM_EMPTY, 125 CS_ETM_RANGE, 126 CS_ETM_DISCONTINUITY, 127 CS_ETM_EXCEPTION, 128 CS_ETM_EXCEPTION_RET, 129 }; 130 131 enum cs_etm_isa { 132 CS_ETM_ISA_UNKNOWN, 133 CS_ETM_ISA_A64, 134 CS_ETM_ISA_A32, 135 CS_ETM_ISA_T32, 136 }; 137 138 struct cs_etm_queue; 139 140 struct cs_etm_packet { 141 enum cs_etm_sample_type sample_type; 142 enum cs_etm_isa isa; 143 u64 start_addr; 144 u64 end_addr; 145 u32 instr_count; 146 u32 last_instr_type; 147 u32 last_instr_subtype; 148 u32 flags; 149 u32 exception_number; 150 u8 last_instr_cond; 151 u8 last_instr_taken_branch; 152 u8 last_instr_size; 153 u8 trace_chan_id; 154 int cpu; 155 }; 156 157 #define CS_ETM_PACKET_MAX_BUFFER 1024 158 159 /* 160 * When working with per-thread scenarios the process under trace can 161 * be scheduled on any CPU and as such, more than one traceID may be 162 * associated with the same process. Since a traceID of '0' is illegal 163 * as per the CoreSight architecture, use that specific value to 164 * identify the queue where all packets (with any traceID) are 165 * aggregated. 166 */ 167 #define CS_ETM_PER_THREAD_TRACEID 0 168 169 struct cs_etm_packet_queue { 170 u32 packet_count; 171 u32 head; 172 u32 tail; 173 u32 instr_count; 174 u64 cs_timestamp; 175 u64 next_cs_timestamp; 176 struct cs_etm_packet packet_buffer[CS_ETM_PACKET_MAX_BUFFER]; 177 }; 178 179 #define KiB(x) ((x) * 1024) 180 #define MiB(x) ((x) * 1024 * 1024) 181 182 #define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL 183 184 #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) 185 186 #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_MAX * sizeof(u64)) 187 188 #define __perf_cs_etmv3_magic 0x3030303030303030ULL 189 #define __perf_cs_etmv4_magic 0x4040404040404040ULL 190 #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) 191 #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) 192 193 #ifdef HAVE_CSTRACE_SUPPORT 194 int cs_etm__process_auxtrace_info(union perf_event *event, 195 struct perf_session *session); 196 int cs_etm__get_cpu(u8 trace_chan_id, int *cpu); 197 int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt); 198 int cs_etm__etmq_set_tid(struct cs_etm_queue *etmq, 199 pid_t tid, u8 trace_chan_id); 200 bool cs_etm__etmq_is_timeless(struct cs_etm_queue *etmq); 201 void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq, 202 u8 trace_chan_id); 203 struct cs_etm_packet_queue 204 *cs_etm__etmq_get_packet_queue(struct cs_etm_queue *etmq, u8 trace_chan_id); 205 #else 206 static inline int 207 cs_etm__process_auxtrace_info(union perf_event *event __maybe_unused, 208 struct perf_session *session __maybe_unused) 209 { 210 return -1; 211 } 212 213 static inline int cs_etm__get_cpu(u8 trace_chan_id __maybe_unused, 214 int *cpu __maybe_unused) 215 { 216 return -1; 217 } 218 219 static inline int cs_etm__etmq_set_tid( 220 struct cs_etm_queue *etmq __maybe_unused, 221 pid_t tid __maybe_unused, 222 u8 trace_chan_id __maybe_unused) 223 { 224 return -1; 225 } 226 227 static inline bool cs_etm__etmq_is_timeless( 228 struct cs_etm_queue *etmq __maybe_unused) 229 { 230 /* What else to return? */ 231 return true; 232 } 233 234 static inline void cs_etm__etmq_set_traceid_queue_timestamp( 235 struct cs_etm_queue *etmq __maybe_unused, 236 u8 trace_chan_id __maybe_unused) {} 237 238 static inline struct cs_etm_packet_queue *cs_etm__etmq_get_packet_queue( 239 struct cs_etm_queue *etmq __maybe_unused, 240 u8 trace_chan_id __maybe_unused) 241 { 242 return NULL; 243 } 244 #endif 245 246 #endif 247