18a9fd832SMathieu Poirier /* SPDX-License-Identifier: GPL-2.0 */ 2a818c563SMathieu Poirier /* 3a818c563SMathieu Poirier * Copyright(C) 2015 Linaro Limited. All rights reserved. 4a818c563SMathieu Poirier * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5a818c563SMathieu Poirier */ 6a818c563SMathieu Poirier 7a818c563SMathieu Poirier #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ 8a818c563SMathieu Poirier #define INCLUDE__UTIL_PERF_CS_ETM_H__ 9a818c563SMathieu Poirier 10440a23b3SMathieu Poirier #include "util/event.h" 11440a23b3SMathieu Poirier #include "util/session.h" 12440a23b3SMathieu Poirier 13a818c563SMathieu Poirier /* Versionning header in case things need tro change in the future. That way 14a818c563SMathieu Poirier * decoding of old snapshot is still possible. 15a818c563SMathieu Poirier */ 16a818c563SMathieu Poirier enum { 17a818c563SMathieu Poirier /* Starting with 0x0 */ 18a818c563SMathieu Poirier CS_HEADER_VERSION_0, 19a818c563SMathieu Poirier /* PMU->type (32 bit), total # of CPUs (32 bit) */ 20a818c563SMathieu Poirier CS_PMU_TYPE_CPUS, 21a818c563SMathieu Poirier CS_ETM_SNAPSHOT, 22a818c563SMathieu Poirier CS_HEADER_VERSION_0_MAX, 23a818c563SMathieu Poirier }; 24a818c563SMathieu Poirier 25a818c563SMathieu Poirier /* Beginning of header common to both ETMv3 and V4 */ 26a818c563SMathieu Poirier enum { 27a818c563SMathieu Poirier CS_ETM_MAGIC, 28a818c563SMathieu Poirier CS_ETM_CPU, 29a818c563SMathieu Poirier }; 30a818c563SMathieu Poirier 31a818c563SMathieu Poirier /* ETMv3/PTM metadata */ 32a818c563SMathieu Poirier enum { 33a818c563SMathieu Poirier /* Dynamic, configurable parameters */ 34a818c563SMathieu Poirier CS_ETM_ETMCR = CS_ETM_CPU + 1, 35a818c563SMathieu Poirier CS_ETM_ETMTRACEIDR, 36a818c563SMathieu Poirier /* RO, taken from sysFS */ 37a818c563SMathieu Poirier CS_ETM_ETMCCER, 38a818c563SMathieu Poirier CS_ETM_ETMIDR, 39a818c563SMathieu Poirier CS_ETM_PRIV_MAX, 40a818c563SMathieu Poirier }; 41a818c563SMathieu Poirier 42a818c563SMathieu Poirier /* ETMv4 metadata */ 43a818c563SMathieu Poirier enum { 44a818c563SMathieu Poirier /* Dynamic, configurable parameters */ 45a818c563SMathieu Poirier CS_ETMV4_TRCCONFIGR = CS_ETM_CPU + 1, 46a818c563SMathieu Poirier CS_ETMV4_TRCTRACEIDR, 47a818c563SMathieu Poirier /* RO, taken from sysFS */ 48a818c563SMathieu Poirier CS_ETMV4_TRCIDR0, 49a818c563SMathieu Poirier CS_ETMV4_TRCIDR1, 50a818c563SMathieu Poirier CS_ETMV4_TRCIDR2, 51a818c563SMathieu Poirier CS_ETMV4_TRCIDR8, 52a818c563SMathieu Poirier CS_ETMV4_TRCAUTHSTATUS, 53a818c563SMathieu Poirier CS_ETMV4_PRIV_MAX, 54a818c563SMathieu Poirier }; 55a818c563SMathieu Poirier 5696dce7f4SLeo Yan /* 5796dce7f4SLeo Yan * ETMv3 exception encoding number: 5896dce7f4SLeo Yan * See Embedded Trace Macrocell spcification (ARM IHI 0014Q) 5996dce7f4SLeo Yan * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors. 6096dce7f4SLeo Yan */ 6196dce7f4SLeo Yan enum { 6296dce7f4SLeo Yan CS_ETMV3_EXC_NONE = 0, 6396dce7f4SLeo Yan CS_ETMV3_EXC_DEBUG_HALT = 1, 6496dce7f4SLeo Yan CS_ETMV3_EXC_SMC = 2, 6596dce7f4SLeo Yan CS_ETMV3_EXC_HYP = 3, 6696dce7f4SLeo Yan CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4, 6796dce7f4SLeo Yan CS_ETMV3_EXC_JAZELLE_THUMBEE = 5, 6896dce7f4SLeo Yan CS_ETMV3_EXC_PE_RESET = 8, 6996dce7f4SLeo Yan CS_ETMV3_EXC_UNDEFINED_INSTR = 9, 7096dce7f4SLeo Yan CS_ETMV3_EXC_SVC = 10, 7196dce7f4SLeo Yan CS_ETMV3_EXC_PREFETCH_ABORT = 11, 7296dce7f4SLeo Yan CS_ETMV3_EXC_DATA_FAULT = 12, 7396dce7f4SLeo Yan CS_ETMV3_EXC_GENERIC = 13, 7496dce7f4SLeo Yan CS_ETMV3_EXC_IRQ = 14, 7596dce7f4SLeo Yan CS_ETMV3_EXC_FIQ = 15, 7696dce7f4SLeo Yan }; 7796dce7f4SLeo Yan 7896dce7f4SLeo Yan /* 7996dce7f4SLeo Yan * ETMv4 exception encoding number: 8096dce7f4SLeo Yan * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D) 8196dce7f4SLeo Yan * table 6-12 Possible values for the TYPE field in an Exception instruction 8296dce7f4SLeo Yan * trace packet, for ARMv7-A/R and ARMv8-A/R PEs. 8396dce7f4SLeo Yan */ 8496dce7f4SLeo Yan enum { 8596dce7f4SLeo Yan CS_ETMV4_EXC_RESET = 0, 8696dce7f4SLeo Yan CS_ETMV4_EXC_DEBUG_HALT = 1, 8796dce7f4SLeo Yan CS_ETMV4_EXC_CALL = 2, 8896dce7f4SLeo Yan CS_ETMV4_EXC_TRAP = 3, 8996dce7f4SLeo Yan CS_ETMV4_EXC_SYSTEM_ERROR = 4, 9096dce7f4SLeo Yan CS_ETMV4_EXC_INST_DEBUG = 6, 9196dce7f4SLeo Yan CS_ETMV4_EXC_DATA_DEBUG = 7, 9296dce7f4SLeo Yan CS_ETMV4_EXC_ALIGNMENT = 10, 9396dce7f4SLeo Yan CS_ETMV4_EXC_INST_FAULT = 11, 9496dce7f4SLeo Yan CS_ETMV4_EXC_DATA_FAULT = 12, 9596dce7f4SLeo Yan CS_ETMV4_EXC_IRQ = 14, 9696dce7f4SLeo Yan CS_ETMV4_EXC_FIQ = 15, 9796dce7f4SLeo Yan CS_ETMV4_EXC_END = 31, 9896dce7f4SLeo Yan }; 9996dce7f4SLeo Yan 10095c6fe97SLeo Yan /* RB tree for quick conversion between traceID and metadata pointers */ 101cd8bfd8cSTor Jeremiassen struct intlist *traceid_list; 102cd8bfd8cSTor Jeremiassen 103a818c563SMathieu Poirier #define KiB(x) ((x) * 1024) 104a818c563SMathieu Poirier #define MiB(x) ((x) * 1024 * 1024) 105a818c563SMathieu Poirier 106a818c563SMathieu Poirier #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64)) 107a818c563SMathieu Poirier 1082507a3d9SMathieu Poirier #define __perf_cs_etmv3_magic 0x3030303030303030ULL 1092507a3d9SMathieu Poirier #define __perf_cs_etmv4_magic 0x4040404040404040ULL 110a818c563SMathieu Poirier #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) 111a818c563SMathieu Poirier #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) 112a818c563SMathieu Poirier 113440a23b3SMathieu Poirier #ifdef HAVE_CSTRACE_SUPPORT 114440a23b3SMathieu Poirier int cs_etm__process_auxtrace_info(union perf_event *event, 115440a23b3SMathieu Poirier struct perf_session *session); 11695c6fe97SLeo Yan int cs_etm__get_cpu(u8 trace_chan_id, int *cpu); 117440a23b3SMathieu Poirier #else 118440a23b3SMathieu Poirier static inline int 119440a23b3SMathieu Poirier cs_etm__process_auxtrace_info(union perf_event *event __maybe_unused, 120440a23b3SMathieu Poirier struct perf_session *session __maybe_unused) 121440a23b3SMathieu Poirier { 122440a23b3SMathieu Poirier return -1; 123440a23b3SMathieu Poirier } 12495c6fe97SLeo Yan 12595c6fe97SLeo Yan static inline int cs_etm__get_cpu(u8 trace_chan_id __maybe_unused, 12695c6fe97SLeo Yan int *cpu __maybe_unused) 12795c6fe97SLeo Yan { 12895c6fe97SLeo Yan return -1; 12995c6fe97SLeo Yan } 130440a23b3SMathieu Poirier #endif 131440a23b3SMathieu Poirier 132a818c563SMathieu Poirier #endif 133