18a9fd832SMathieu Poirier /* SPDX-License-Identifier: GPL-2.0 */ 2a818c563SMathieu Poirier /* 3a818c563SMathieu Poirier * Copyright(C) 2015 Linaro Limited. All rights reserved. 4a818c563SMathieu Poirier * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5a818c563SMathieu Poirier */ 6a818c563SMathieu Poirier 7a818c563SMathieu Poirier #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ 8a818c563SMathieu Poirier #define INCLUDE__UTIL_PERF_CS_ETM_H__ 9a818c563SMathieu Poirier 10440a23b3SMathieu Poirier #include "util/event.h" 11440a23b3SMathieu Poirier #include "util/session.h" 12440a23b3SMathieu Poirier 13a818c563SMathieu Poirier /* Versionning header in case things need tro change in the future. That way 14a818c563SMathieu Poirier * decoding of old snapshot is still possible. 15a818c563SMathieu Poirier */ 16a818c563SMathieu Poirier enum { 17a818c563SMathieu Poirier /* Starting with 0x0 */ 18a818c563SMathieu Poirier CS_HEADER_VERSION_0, 19a818c563SMathieu Poirier /* PMU->type (32 bit), total # of CPUs (32 bit) */ 20a818c563SMathieu Poirier CS_PMU_TYPE_CPUS, 21a818c563SMathieu Poirier CS_ETM_SNAPSHOT, 22a818c563SMathieu Poirier CS_HEADER_VERSION_0_MAX, 23a818c563SMathieu Poirier }; 24a818c563SMathieu Poirier 25a818c563SMathieu Poirier /* Beginning of header common to both ETMv3 and V4 */ 26a818c563SMathieu Poirier enum { 27a818c563SMathieu Poirier CS_ETM_MAGIC, 28a818c563SMathieu Poirier CS_ETM_CPU, 29a818c563SMathieu Poirier }; 30a818c563SMathieu Poirier 31a818c563SMathieu Poirier /* ETMv3/PTM metadata */ 32a818c563SMathieu Poirier enum { 33a818c563SMathieu Poirier /* Dynamic, configurable parameters */ 34a818c563SMathieu Poirier CS_ETM_ETMCR = CS_ETM_CPU + 1, 35a818c563SMathieu Poirier CS_ETM_ETMTRACEIDR, 36a818c563SMathieu Poirier /* RO, taken from sysFS */ 37a818c563SMathieu Poirier CS_ETM_ETMCCER, 38a818c563SMathieu Poirier CS_ETM_ETMIDR, 39a818c563SMathieu Poirier CS_ETM_PRIV_MAX, 40a818c563SMathieu Poirier }; 41a818c563SMathieu Poirier 42a818c563SMathieu Poirier /* ETMv4 metadata */ 43a818c563SMathieu Poirier enum { 44a818c563SMathieu Poirier /* Dynamic, configurable parameters */ 45a818c563SMathieu Poirier CS_ETMV4_TRCCONFIGR = CS_ETM_CPU + 1, 46a818c563SMathieu Poirier CS_ETMV4_TRCTRACEIDR, 47a818c563SMathieu Poirier /* RO, taken from sysFS */ 48a818c563SMathieu Poirier CS_ETMV4_TRCIDR0, 49a818c563SMathieu Poirier CS_ETMV4_TRCIDR1, 50a818c563SMathieu Poirier CS_ETMV4_TRCIDR2, 51a818c563SMathieu Poirier CS_ETMV4_TRCIDR8, 52a818c563SMathieu Poirier CS_ETMV4_TRCAUTHSTATUS, 53a818c563SMathieu Poirier CS_ETMV4_PRIV_MAX, 54a818c563SMathieu Poirier }; 55a818c563SMathieu Poirier 5696dce7f4SLeo Yan /* 5796dce7f4SLeo Yan * ETMv3 exception encoding number: 5896dce7f4SLeo Yan * See Embedded Trace Macrocell spcification (ARM IHI 0014Q) 5996dce7f4SLeo Yan * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors. 6096dce7f4SLeo Yan */ 6196dce7f4SLeo Yan enum { 6296dce7f4SLeo Yan CS_ETMV3_EXC_NONE = 0, 6396dce7f4SLeo Yan CS_ETMV3_EXC_DEBUG_HALT = 1, 6496dce7f4SLeo Yan CS_ETMV3_EXC_SMC = 2, 6596dce7f4SLeo Yan CS_ETMV3_EXC_HYP = 3, 6696dce7f4SLeo Yan CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4, 6796dce7f4SLeo Yan CS_ETMV3_EXC_JAZELLE_THUMBEE = 5, 6896dce7f4SLeo Yan CS_ETMV3_EXC_PE_RESET = 8, 6996dce7f4SLeo Yan CS_ETMV3_EXC_UNDEFINED_INSTR = 9, 7096dce7f4SLeo Yan CS_ETMV3_EXC_SVC = 10, 7196dce7f4SLeo Yan CS_ETMV3_EXC_PREFETCH_ABORT = 11, 7296dce7f4SLeo Yan CS_ETMV3_EXC_DATA_FAULT = 12, 7396dce7f4SLeo Yan CS_ETMV3_EXC_GENERIC = 13, 7496dce7f4SLeo Yan CS_ETMV3_EXC_IRQ = 14, 7596dce7f4SLeo Yan CS_ETMV3_EXC_FIQ = 15, 7696dce7f4SLeo Yan }; 7796dce7f4SLeo Yan 7896dce7f4SLeo Yan /* 7996dce7f4SLeo Yan * ETMv4 exception encoding number: 8096dce7f4SLeo Yan * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D) 8196dce7f4SLeo Yan * table 6-12 Possible values for the TYPE field in an Exception instruction 8296dce7f4SLeo Yan * trace packet, for ARMv7-A/R and ARMv8-A/R PEs. 8396dce7f4SLeo Yan */ 8496dce7f4SLeo Yan enum { 8596dce7f4SLeo Yan CS_ETMV4_EXC_RESET = 0, 8696dce7f4SLeo Yan CS_ETMV4_EXC_DEBUG_HALT = 1, 8796dce7f4SLeo Yan CS_ETMV4_EXC_CALL = 2, 8896dce7f4SLeo Yan CS_ETMV4_EXC_TRAP = 3, 8996dce7f4SLeo Yan CS_ETMV4_EXC_SYSTEM_ERROR = 4, 9096dce7f4SLeo Yan CS_ETMV4_EXC_INST_DEBUG = 6, 9196dce7f4SLeo Yan CS_ETMV4_EXC_DATA_DEBUG = 7, 9296dce7f4SLeo Yan CS_ETMV4_EXC_ALIGNMENT = 10, 9396dce7f4SLeo Yan CS_ETMV4_EXC_INST_FAULT = 11, 9496dce7f4SLeo Yan CS_ETMV4_EXC_DATA_FAULT = 12, 9596dce7f4SLeo Yan CS_ETMV4_EXC_IRQ = 14, 9696dce7f4SLeo Yan CS_ETMV4_EXC_FIQ = 15, 9796dce7f4SLeo Yan CS_ETMV4_EXC_END = 31, 9896dce7f4SLeo Yan }; 9996dce7f4SLeo Yan 1005f7cb035SMathieu Poirier enum cs_etm_sample_type { 1015f7cb035SMathieu Poirier CS_ETM_EMPTY, 1025f7cb035SMathieu Poirier CS_ETM_RANGE, 1035f7cb035SMathieu Poirier CS_ETM_DISCONTINUITY, 1045f7cb035SMathieu Poirier CS_ETM_EXCEPTION, 1055f7cb035SMathieu Poirier CS_ETM_EXCEPTION_RET, 1065f7cb035SMathieu Poirier }; 1075f7cb035SMathieu Poirier 1085f7cb035SMathieu Poirier enum cs_etm_isa { 1095f7cb035SMathieu Poirier CS_ETM_ISA_UNKNOWN, 1105f7cb035SMathieu Poirier CS_ETM_ISA_A64, 1115f7cb035SMathieu Poirier CS_ETM_ISA_A32, 1125f7cb035SMathieu Poirier CS_ETM_ISA_T32, 1135f7cb035SMathieu Poirier }; 1145f7cb035SMathieu Poirier 11595c6fe97SLeo Yan /* RB tree for quick conversion between traceID and metadata pointers */ 116cd8bfd8cSTor Jeremiassen struct intlist *traceid_list; 117cd8bfd8cSTor Jeremiassen 1185f7cb035SMathieu Poirier struct cs_etm_queue; 1195f7cb035SMathieu Poirier 1205f7cb035SMathieu Poirier struct cs_etm_packet { 1215f7cb035SMathieu Poirier enum cs_etm_sample_type sample_type; 1225f7cb035SMathieu Poirier enum cs_etm_isa isa; 1235f7cb035SMathieu Poirier u64 start_addr; 1245f7cb035SMathieu Poirier u64 end_addr; 1255f7cb035SMathieu Poirier u32 instr_count; 1265f7cb035SMathieu Poirier u32 last_instr_type; 1275f7cb035SMathieu Poirier u32 last_instr_subtype; 1285f7cb035SMathieu Poirier u32 flags; 1295f7cb035SMathieu Poirier u32 exception_number; 1305f7cb035SMathieu Poirier u8 last_instr_cond; 1315f7cb035SMathieu Poirier u8 last_instr_taken_branch; 1325f7cb035SMathieu Poirier u8 last_instr_size; 1335f7cb035SMathieu Poirier u8 trace_chan_id; 1345f7cb035SMathieu Poirier int cpu; 1355f7cb035SMathieu Poirier }; 1365f7cb035SMathieu Poirier 1375f7cb035SMathieu Poirier #define CS_ETM_PACKET_MAX_BUFFER 1024 1385f7cb035SMathieu Poirier 139c7bfa2fdSMathieu Poirier /* 140c7bfa2fdSMathieu Poirier * When working with per-thread scenarios the process under trace can 141c7bfa2fdSMathieu Poirier * be scheduled on any CPU and as such, more than one traceID may be 142c7bfa2fdSMathieu Poirier * associated with the same process. Since a traceID of '0' is illegal 143c7bfa2fdSMathieu Poirier * as per the CoreSight architecture, use that specific value to 144c7bfa2fdSMathieu Poirier * identify the queue where all packets (with any traceID) are 145c7bfa2fdSMathieu Poirier * aggregated. 146c7bfa2fdSMathieu Poirier */ 147c7bfa2fdSMathieu Poirier #define CS_ETM_PER_THREAD_TRACEID 0 148c7bfa2fdSMathieu Poirier 1495f7cb035SMathieu Poirier struct cs_etm_packet_queue { 1505f7cb035SMathieu Poirier u32 packet_count; 1515f7cb035SMathieu Poirier u32 head; 1525f7cb035SMathieu Poirier u32 tail; 1535f7cb035SMathieu Poirier struct cs_etm_packet packet_buffer[CS_ETM_PACKET_MAX_BUFFER]; 1545f7cb035SMathieu Poirier }; 1555f7cb035SMathieu Poirier 156a818c563SMathieu Poirier #define KiB(x) ((x) * 1024) 157a818c563SMathieu Poirier #define MiB(x) ((x) * 1024 * 1024) 158a818c563SMathieu Poirier 1595f7cb035SMathieu Poirier #define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL 1605f7cb035SMathieu Poirier 1613399ad9aSMathieu Poirier /* 1623399ad9aSMathieu Poirier * Create a contiguous bitmask starting at bit position @l and ending at 1633399ad9aSMathieu Poirier * position @h. For example 1643399ad9aSMathieu Poirier * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. 1653399ad9aSMathieu Poirier * 1663399ad9aSMathieu Poirier * Carbon copy of implementation found in $KERNEL/include/linux/bitops.h 1673399ad9aSMathieu Poirier */ 1683399ad9aSMathieu Poirier #define GENMASK(h, l) \ 1693399ad9aSMathieu Poirier (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) 1703399ad9aSMathieu Poirier 1713399ad9aSMathieu Poirier #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) 1723399ad9aSMathieu Poirier 173a818c563SMathieu Poirier #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64)) 174a818c563SMathieu Poirier 1752507a3d9SMathieu Poirier #define __perf_cs_etmv3_magic 0x3030303030303030ULL 1762507a3d9SMathieu Poirier #define __perf_cs_etmv4_magic 0x4040404040404040ULL 177a818c563SMathieu Poirier #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) 178a818c563SMathieu Poirier #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) 179a818c563SMathieu Poirier 180440a23b3SMathieu Poirier #ifdef HAVE_CSTRACE_SUPPORT 181440a23b3SMathieu Poirier int cs_etm__process_auxtrace_info(union perf_event *event, 182440a23b3SMathieu Poirier struct perf_session *session); 18395c6fe97SLeo Yan int cs_etm__get_cpu(u8 trace_chan_id, int *cpu); 1840a6be300SMathieu Poirier int cs_etm__etmq_set_tid(struct cs_etm_queue *etmq, 1850a6be300SMathieu Poirier pid_t tid, u8 trace_chan_id); 1865f7cb035SMathieu Poirier struct cs_etm_packet_queue 187c7bfa2fdSMathieu Poirier *cs_etm__etmq_get_packet_queue(struct cs_etm_queue *etmq, u8 trace_chan_id); 188440a23b3SMathieu Poirier #else 189440a23b3SMathieu Poirier static inline int 190440a23b3SMathieu Poirier cs_etm__process_auxtrace_info(union perf_event *event __maybe_unused, 191440a23b3SMathieu Poirier struct perf_session *session __maybe_unused) 192440a23b3SMathieu Poirier { 193440a23b3SMathieu Poirier return -1; 194440a23b3SMathieu Poirier } 19595c6fe97SLeo Yan 19695c6fe97SLeo Yan static inline int cs_etm__get_cpu(u8 trace_chan_id __maybe_unused, 19795c6fe97SLeo Yan int *cpu __maybe_unused) 19895c6fe97SLeo Yan { 19995c6fe97SLeo Yan return -1; 20095c6fe97SLeo Yan } 2015f7cb035SMathieu Poirier 2020a6be300SMathieu Poirier static inline int cs_etm__etmq_set_tid( 2030a6be300SMathieu Poirier struct cs_etm_queue *etmq __maybe_unused, 2040a6be300SMathieu Poirier pid_t tid __maybe_unused, 2050a6be300SMathieu Poirier u8 trace_chan_id __maybe_unused) 2060a6be300SMathieu Poirier { 2070a6be300SMathieu Poirier return -1; 2080a6be300SMathieu Poirier } 2090a6be300SMathieu Poirier 2105f7cb035SMathieu Poirier static inline struct cs_etm_packet_queue *cs_etm__etmq_get_packet_queue( 211c7bfa2fdSMathieu Poirier struct cs_etm_queue *etmq __maybe_unused, 212c7bfa2fdSMathieu Poirier u8 trace_chan_id __maybe_unused) 2135f7cb035SMathieu Poirier { 2145f7cb035SMathieu Poirier return NULL; 2155f7cb035SMathieu Poirier } 216440a23b3SMathieu Poirier #endif 217440a23b3SMathieu Poirier 218a818c563SMathieu Poirier #endif 219