112500902SArnaldo Carvalho de Melo /* SPDX-License-Identifier: GPL-2.0 */ 212500902SArnaldo Carvalho de Melo #ifndef PERF_CACHELINE_H 312500902SArnaldo Carvalho de Melo #define PERF_CACHELINE_H 412500902SArnaldo Carvalho de Melo 512500902SArnaldo Carvalho de Melo #include <linux/compiler.h> 612500902SArnaldo Carvalho de Melo 712500902SArnaldo Carvalho de Melo int __pure cacheline_size(void); 812500902SArnaldo Carvalho de Melo 9*1470a108SFeng Tang 10*1470a108SFeng Tang /* 11*1470a108SFeng Tang * Some architectures have 'Adjacent Cacheline Prefetch' feature, 12*1470a108SFeng Tang * which performs like the cacheline size being doubled. 13*1470a108SFeng Tang */ cl_address(u64 address,bool double_cl)14*1470a108SFeng Tangstatic inline u64 cl_address(u64 address, bool double_cl) 1512500902SArnaldo Carvalho de Melo { 16*1470a108SFeng Tang u64 size = cacheline_size(); 17*1470a108SFeng Tang 18*1470a108SFeng Tang if (double_cl) 19*1470a108SFeng Tang size *= 2; 20*1470a108SFeng Tang 2112500902SArnaldo Carvalho de Melo /* return the cacheline of the address */ 22*1470a108SFeng Tang return (address & ~(size - 1)); 2312500902SArnaldo Carvalho de Melo } 2412500902SArnaldo Carvalho de Melo cl_offset(u64 address,bool double_cl)25*1470a108SFeng Tangstatic inline u64 cl_offset(u64 address, bool double_cl) 2612500902SArnaldo Carvalho de Melo { 27*1470a108SFeng Tang u64 size = cacheline_size(); 28*1470a108SFeng Tang 29*1470a108SFeng Tang if (double_cl) 30*1470a108SFeng Tang size *= 2; 31*1470a108SFeng Tang 32*1470a108SFeng Tang /* return the offset inside cacheline */ 33*1470a108SFeng Tang return (address & (size - 1)); 3412500902SArnaldo Carvalho de Melo } 3512500902SArnaldo Carvalho de Melo 3612500902SArnaldo Carvalho de Melo #endif // PERF_CACHELINE_H 37